JPS61656U

JPS61656U - Signal acquisition circuit

Info

Publication number: JPS61656U
Application number: JP8384084U
Authority: JP
Inventors: 雅一新井
Original assignee: 株式会社明電舎
Priority date: 1984-06-06
Filing date: 1984-06-06
Publication date: 1986-01-06

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案の実施例を示す回路図、第２図は、第１
図の回路の各部の電圧又は電流を示す波形図、第３図、
第４図は、各々従来の信号取り込み回路を示す回路図で
ある。１〜１ｎ・・・フォトカプラ、２・・・整流回路、３・
・・平滑回路、５・・・クロックパルス用フォトヵプラ
、６・・・クロツクパルス発生回路、７・・・インター
フェースを構成するラッチ回路、Ｒｙ〜Ｒｙｎ・・・リ
レー。漠々FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an embodiment of the present invention.
Waveform diagram showing the voltage or current of each part of the circuit shown in Figure 3,
FIG. 4 is a circuit diagram showing each conventional signal acquisition circuit. 1~1n...Photocoupler, 2...Rectifier circuit, 3.
... Smoothing circuit, 5... Photocoupler for clock pulse, 6... Clock pulse generation circuit, 7... Latch circuit constituting the interface, Ry to Ryn... Relay. Vaguely

Claims

[Scope of utility model registration request]

A plurality of series circuits each consisting of a relay contact that opens and closes depending on the state of an external device and an input side of an insulating circuit are connected in parallel to each other to form a parallel circuit, and power is supplied to the parallel circuit from an AC power source, and the A signal corresponding to the opening/closing of a relay contact is taken into the central processing unit via an insulated circuit and an interface connected to the output side thereof, the input side being connected in parallel to the series circuit, and the input side being connected in parallel to the series circuit. A clock pulse isolation circuit is provided whose output side is connected in parallel to the output side of the isolation circuit, and a clock pulse signal is generated on the output side of the clock pulse isolation circuit in response to the peak of the AC voltage of the AC power supply. 1. A signal acquisition circuit comprising: a clock pulse generation circuit for latching an output signal from an insulating circuit of said series circuit in response to input of a clock pulse signal from said clock pulse generation circuit;