JPS6162238A - Switching signal generating circuit - Google Patents

Switching signal generating circuit

Info

Publication number
JPS6162238A
JPS6162238A JP18424884A JP18424884A JPS6162238A JP S6162238 A JPS6162238 A JP S6162238A JP 18424884 A JP18424884 A JP 18424884A JP 18424884 A JP18424884 A JP 18424884A JP S6162238 A JPS6162238 A JP S6162238A
Authority
JP
Japan
Prior art keywords
signal
circuit
alarm
output
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18424884A
Other languages
Japanese (ja)
Inventor
Mitsuo Noguchi
野口 光男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18424884A priority Critical patent/JPS6162238A/en
Publication of JPS6162238A publication Critical patent/JPS6162238A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/74Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for increasing reliability, e.g. using redundant or spare channels or apparatus

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To attain stable switching operation by designing the titled circuit that no switching signal is generated so long as a state is not consecutive for a prescribed time or over that one of an active device and a spare device generates an alarm signal and the other does not generate the alarm signal. CONSTITUTION:An intermittent alarm signal generated due to the deterioration in quality of a line is inputted respectively to alarm signal input terminals 1 and 2 at active and spare devices, and it is led to retriggerable multivibrator circuits 3, 4 as a consecutive signal when the time from the stop of alarm till the generation of alarm again is within a prescribed time and the output appears at points A2, B2. The signal is branched into two at the points A2 and B2 and the branched signal is outputted to a point C1. The signal is branched into two at a point C2; one is led directly to an AND circuit 9 and the other is inputted to a reset input terminal of the counter circuit 8 in order to prevent the output if the difference in the alarm signal is not consecutive for a prescribed time. The switching signal is transmitted to the switching circuit of a transmission line respectively from output terminals 14 and 15.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、冗長構成の通信機器から発生する断続的パル
ス状瞥報信号を利用して、現用機器及び予備機器の警報
′信号の発生頻度に応じて安定した切替信号を発生する
ための切替信号発生回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention uses intermittent pulse-like notification signals generated from redundant communication equipment to determine the frequency of occurrence of alarm signals of working equipment and standby equipment. The present invention relates to a switching signal generation circuit for generating a stable switching signal in response to a switching signal.

(従来の技術) 一般に、通信機器では信頼性や保守性を考鈎して設備に
予備方式を採用することが多く、現用機器と予備機器と
の切替信号には通信機器から発生するD軸信号を使用し
ている。
(Prior art) In general, communication equipment often adopts a standby system for equipment in consideration of reliability and maintainability, and the D-axis signal generated from the communication equipment is used as the switching signal between the active equipment and the standby equipment. are using.

しかし、その警報信号は通信回線の劣化(たとえば、キ
ャリアレベルの劣化や、雑音量の増加)Kよp発生する
警報信号のよりに、ぢ軸信号を発生させる設定点近傍に
おいては、断続的に発生する場合が多い。従って、この
踵の善報信号上そのまま現用予備ルートの切替信号に使
用した場合には、警報信号の発生毎に必要以上にfM繁
に切替動作を行なってしまう。
However, due to deterioration of the communication line (for example, deterioration of the carrier level or increase in the amount of noise), the alarm signal is generated intermittently near the set point where the -axis signal is generated. This often occurs. Therefore, if this heel good news signal is directly used as a switching signal for the active and backup route, the switching operation will be performed more frequently than necessary every time an alarm signal occurs.

この点の解決を目指す回路として本発明の発明者によシ
提案され72:ム報信号変換回路がある(特願昭57−
208005)。この回路は、警報信号をそのまま切替
信号に使用するのではなくパルス波形整形回路とパルス
遅延回路とによって、断続的に発生する善報信号の発生
時間が短かくても、発生頻度が高い場合には、そのよう
な警報信号を安定した切替信号として送出でき、かつ、
そのような警報信号の継続時間の長短によって切替信号
の送出を選択出来る構成になっている。
As a circuit aiming to solve this problem, there is a music signal conversion circuit proposed by the inventor of the present invention.
208005). This circuit does not use the alarm signal as it is as a switching signal, but uses a pulse waveform shaping circuit and a pulse delay circuit to handle the intermittently occurring good news signal, even if the occurrence time is short but the occurrence frequency is high. is capable of transmitting such an alarm signal as a stable switching signal, and
The configuration is such that the transmission of the switching signal can be selected depending on the duration of the alarm signal.

(発明が解決しようとする問題点) 上記の回路は、警報信号をそのまま切替信号に使用する
場合に較べて不必要な高頻度の切替え動作は行わないが
、なお警報信号発生回路の設定のばらつき、あるいは、
パルス波形整形回路とパルス遅延回路の設定のばらつき
によっては、不必要な切替動作を行なってしまう場合妙
Sある。
(Problem to be Solved by the Invention) The above circuit does not perform unnecessary high-frequency switching operations compared to the case where the alarm signal is used as a switching signal as it is, but there is still variation in the settings of the alarm signal generation circuit. ,or,
Depending on variations in the settings of the pulse waveform shaping circuit and pulse delay circuit, unnecessary switching operations may occur.

すなわち、通信回線の劣化により、現用側機器の警報信
号が設定値のばらつきにより、予備側機器より早く発生
し、管轄信号変換回路に入力されたシ、パルス遅延回路
の設定値のばらつきによシ、現用側警報信号変換回路が
予備側より早くf軸信号を発生すれば、いずれは予備側
にも警報信号が発生するにもかかわらず、現用から予備
へと通信機器の不快な切替が行なわれてしまり。また逆
に、通信回線の品質が回復し111ま た場合、現用側機器の善報信号入力が設定値のばらつき
により予備側より早く解除嘔れtり、パルス波形整形回
路の設定値の誤差により、現用側善報信号変換回路が予
備側よυも早く訃報信号を解除したシすればいずれは予
備側も善報信号が解除されるにもかかわらず、予備側か
ら現用側機器への不要な切替が行なわれてしまう。
In other words, due to the deterioration of the communication line, the alarm signal of the active device is generated earlier than that of the backup device due to variations in setting values, and the alarm signal input to the jurisdiction signal conversion circuit is generated earlier than that of the protection device due to variations in setting values of the pulse delay circuit. If the alarm signal conversion circuit on the working side generates the f-axis signal earlier than the standby side, an unpleasant switching of the communication equipment from the working side to the standby side will occur, even though an alarm signal will eventually be generated on the standby side as well. I'm done. Conversely, if the quality of the communication line is restored and the good news signal input to the active device is released earlier than the backup device due to variations in the settings, and due to errors in the settings of the pulse waveform shaping circuit, If the working side good news signal conversion circuit cancels the obituary signal sooner than the standby side, the good news signal will eventually be canceled on the standby side as well, but unnecessary switching from the standby side to the working side equipment will occur. will be carried out.

従って、現用及び予備のむ軸設定値にばらつきがある限
り、回線品質にかかわる警報信号による切替においては
、不必要な切替動作を発生してしまう欠点があった。
Therefore, as long as there are variations in the current and standby axis setting values, switching using alarm signals related to line quality has the drawback of causing unnecessary switching operations.

(問題点を解決するための手段) 本発明の目的は、回線品質の劣化によって発生する断続
的な警報信号によっても安定な現用装置と予備装置間の
切替を可能にするために、現用機器と予備機器の警報信
号を比較し、発生頻度が低く継続時間も短い機器側へ回
線切替を行なうための切替信号を送出する切替信号発生
回路全提供することにある。
(Means for Solving the Problems) An object of the present invention is to enable stable switching between the active equipment and standby equipment even in the case of intermittent alarm signals caused by deterioration of line quality. An object of the present invention is to provide a complete switching signal generation circuit that compares alarm signals of standby equipment and sends a switching signal for switching a line to equipment that occurs less frequently and has a shorter duration.

本発明は上記の目的を達成するために次の構Jffit
−有する。即ち、1個の入力矩形波信号が終了した後予
め設定された時間内に次の矩形波信号が入力として現わ
れた場合には先の矩形波信号と次の矩形波信号を連続さ
せて1個の矩形波信号とし出力する2個のリトリガブル
マルチ回路(第1のリトリガブルマルチ回路と第2のリ
トリガブルマルチ回路)と、前記2個のリトリガブルマ
ルチ回路の出力をそれぞれ反転する2個のインバータ(
第1のインバータと第2のインバータ)と、前記2個の
リトリガブルマルチ回路の出力の相異を検出する排他的
論理和回路と、該排他的論理和回路の出力波形の立ち上
りで立ち下り所定時間経過後立ち上る波形信号を発生す
るカウンタと、該カウンタの出力信号と前記排他的論理
和回路の出力信号との論理積をとる第1の論理積回路と
、該第1の論理積回路の出方信号と前記第1のインバー
タの出力信号との論理積をとる第2の論理積回路と、前
記第1の論理積回路の出力信号と前記第2のインバータ
の出力信号との論理積をとる第3の論理積回路と、前記
第2の論理積回路の出力信号と前記第3の論理積回路の
出力信号を受けて−1の出力信号の立ち上りにより立ち
上り他方の出力信号の立ち上りによシ立ち下る矩形波信
号を発生するフリップフロップ回路とからなる切替信号
発生回路である。
The present invention has the following structure to achieve the above object.
- have. That is, if the next rectangular wave signal appears as an input within a preset time after one input rectangular wave signal ends, the previous rectangular wave signal and the next rectangular wave signal are consecutively combined into one. two retriggerable multi-circuits (a first retriggerable multi-circuit and a second retriggerable multi-circuit) that output a rectangular wave signal, and the outputs of the two retriggerable multi-circuits are each inverted. Two inverters (
a first inverter and a second inverter), an exclusive OR circuit that detects a difference between the outputs of the two retriggerable multi-circuits, and a rising edge and a falling edge of the output waveform of the exclusive OR circuit; a counter that generates a waveform signal that rises after a predetermined period of time has elapsed; a first AND circuit that ANDs the output signal of the counter and the output signal of the exclusive OR circuit; a second AND circuit that takes the AND of the output signal and the output signal of the first inverter; and a second AND circuit that takes the AND of the output signal of the first AND circuit and the output signal of the second inverter; and a third AND circuit that receives the output signal of the second AND circuit and the output signal of the third AND circuit, and receives the output signal of the second AND circuit and receives the output signal of -1 when the output signal rises; This switching signal generation circuit includes a flip-flop circuit that generates a falling rectangular wave signal.

(作 用) 上記本発明の切替信号発生回路の動作は以下の通りであ
る。2つのリトリガブルマルチ回路の入力端には、一方
は現用機器からの、他方は予備機器からのパルス状の善
報信号が入力される。リトリガブルマルチ回路は一定値
(例えばt、I)以下の時間間隔で入って来る複数のパ
ルス信号を1個の連続した幅の広いパルスとして出力す
る。即ち一定以上の頻度で繰り返し発生されるむ報は連
続したθ報として捉える。こうして得られた2系列のe
報信号は、共に排他的論理和回路へ加えられる。排他的
論理和回路の出力には、いずれか一方に警報信号が発生
しており、他方には発生していない場合にのみ信号が現
われる。現用機器及び予備機器が共に警報を発している
場合又は共に(イ報を発していない場合には現用と予備
を切替える必要がないのであるからいずれか一方が管轄
を発し、他方が警報を発していない場合即ち現用と予備
が相異している場合を検出すればよい。前記排他的論理
和回路はこのような状態を検出することになる。
(Function) The operation of the switching signal generation circuit of the present invention is as follows. Pulsed good news signals are input to the input ends of the two retriggerable multi-circuits, one from the current equipment and the other from the standby equipment. A retriggerable multi-circuit outputs a plurality of pulse signals that come in at time intervals less than a certain value (eg, t, I) as one continuous wide pulse. That is, a signal that is repeatedly generated at a frequency higher than a certain level is regarded as a continuous θ signal. The two series e obtained in this way
Both signal signals are applied to an exclusive OR circuit. A signal appears at the output of the exclusive OR circuit only when an alarm signal is generated in one of them and not in the other. If both the active equipment and the standby equipment are emitting an alarm, or if both are not emitting an alarm, there is no need to switch between active and standby equipment, so one of them will have jurisdiction and the other will issue an alarm. It is only necessary to detect a case where there is no one, that is, a case where the current and standby are different.The exclusive OR circuit detects such a state.

更に排他的論理和回路の出力は第1の論理積回路とカウ
ンター回路へ加えられる。
Further, the output of the exclusive OR circuit is applied to the first AND circuit and the counter circuit.

カウンター回路は排他的論理和回路に出力が現われた時
に低レベルになシ予め定められた一定時間(例えば1.
)経過すると自動的に高レベルとなる信号を出力する。
When the output appears in the exclusive OR circuit, the counter circuit remains at a low level for a predetermined period of time (for example, 1.
) automatically outputs a signal that becomes high level.

この出力信号は前記第1Q論理積回路へ加えられ前記排
他的論理和回路の出力との論理積がとられる。この論理
積信号の持つ意味は警報発生に関し現用機器と予備機器
の相異が予め定められた一定時間以内だけ継続したこと
を示す。即ち、相異した状態が一定時間継続した場合1
初めて切替えを行うため    覧の信号として用いら
れる。第1の論理積回路の   li出力信号は2分岐
でれて第2の論理積回路と第3の論理積回路へ加えられ
る。−万、第2の論理積回路へは、第1のすl−I)ガ
ブルマルチ回路の出力信号が第1のインバータへで極性
反転されて加えられている。同じく第3の論理積回路へ
は第2のりトリガブルマルチ回路の出力信号が第2のイ
ンバータで極性反転されて加えられている。これらの信
号は極性反転されることにより、信号あシ(即ち高レベ
ル)の時は警報信号のない状態即ち正常であることを示
す。従って、第1の論理積回路の出力信号との論理積を
とることによシ、−万の回線が書@を発し、他方の回線
が警報を発しないという状態が一定時間継続した時に、
第2の論理積回路と第3の論理積回路のうち警報を発し
ていない系列の論理積回路の出力は高レベルとなカ餐報
を発している系列の論理積回路の出力は低レベルとなる
This output signal is applied to the first Q AND circuit and ANDed with the output of the exclusive OR circuit. The meaning of this AND signal indicates that the difference between the current equipment and the standby equipment regarding the occurrence of an alarm has continued for a predetermined period of time. In other words, if different states continue for a certain period of time, 1
It is used as a signal to check when switching is performed for the first time. The li output signal of the first AND circuit is branched into two branches and applied to the second AND circuit and the third AND circuit. -10,000 The output signal of the first Gable multi circuit is applied to the second AND circuit with its polarity inverted by the first inverter. Similarly, the output signal of the second NOR triggerable multi-circuit is applied to the third AND circuit after its polarity is inverted by the second inverter. The polarity of these signals is reversed, so that when the signal is low (ie, at a high level), it indicates a state in which there is no alarm signal, that is, a normal state. Therefore, by performing an AND with the output signal of the first AND circuit, when the state in which the -10,000 line issues a write @ and the other line does not issue an alarm continues for a certain period of time,
Of the second AND circuit and the third AND circuit, the output of the AND circuit in the series that is not issuing an alarm is at a high level, and the output of the AND circuit in the series that is issuing a warning is at a low level. Become.

この2つの出力信号は7リツプフロツプ回路へ加えられ
る。フリツプフロツプ回路は加えられた2つの信号の高
低即ち極性が反転することにより極性が反転する矩形波
信号を発生する。こうして得られた矩形波信号を現用機
器と予備機器の切替信号として用いる。
These two output signals are applied to a 7 lip-flop circuit. A flip-flop circuit generates a rectangular wave signal whose polarity is reversed by reversing the high and low levels, or polarities, of two applied signals. The rectangular wave signal thus obtained is used as a switching signal between the current equipment and the standby equipment.

以上のように本発明の切替信号発生器は、ある警報信号
と次の警報信号の時間間隔が成る一定値以下である場合
には連続したD報信号として捉え、そのような拌報信号
が一方の機器側で発生し他方の機器側で発生していない
という状態が一定時間継続したときに初めて切替信号を
発生する。従って、従来技術におけるように警報信号の
発生に応じて頻繁に切替信号を発生するということはな
く、更に、共通の原因によって現用機器も予備機器もむ
報信号を発することになる場合において現用機器が予備
機器よりも早く警報信号を発しても一定時間以内に予備
機器も警報信号を発するような場合には無用の切替信号
を発することはない。また共通の原因による障害が解除
される場合において、予備機器の万が現用機器よりも先
に警報信号の発信を停止しても現用機器も一定時間内に
警報信号が停止する場合には無用の切替信号を発するこ
とはない。
As described above, in the switching signal generator of the present invention, when the time interval between one alarm signal and the next alarm signal is less than or equal to a certain value, it is recognized as a continuous D alarm signal, and such a mixed alarm signal is A switching signal is generated for the first time when a state in which one device generates a signal and the other device does not generate a signal continues for a certain period of time. Therefore, unlike in the prior art, switching signals are not frequently generated in response to the generation of alarm signals, and furthermore, when both the working equipment and the standby equipment have to issue alarm signals due to a common cause, the working equipment Even if the backup device issues an alarm signal earlier than the backup device, if the backup device also issues an alarm signal within a certain period of time, the backup device will not issue an unnecessary switching signal. In addition, when a failure due to a common cause is resolved, even if the standby equipment stops emitting alarm signals before the working equipment, if the working equipment also stops emitting alarm signals within a certain period of time, it will become useless. No switching signal is issued.

(実施例) 以下、*発明の実施例を図面に基づいて説明する。(Example) Hereinafter, embodiments of the invention will be described based on the drawings.

第1図は本発明の実施例の構成を示す図である。第2図
は、281図の動作説明全行なうためのタイムチャート
である。現用側及び予備側の8報償号入力端子1及び同
2にそれぞれ、第2図の波形16、同17に示す如き回
紗品質の劣化にともなう断続的な警報信号が入力され、
警報停止から再びθ軸が発生するまでの時間がある一定
時間1d内であれば継続したa報償号として送出される
ように波形整形するだめのリトリガブルマルチ(ret
riggerble rnulti )回路3及び同4
へと等ひかれ第2図の波形18及び同19に変換されA
2点、88点に送出される。A2点、B1点において前
記の波形18及び同19は2分岐ぢれ〜万けそれぞれイ
ンバーター6及び同7へと入力嘔れ、他の一方は排他的
論理和回路5へと入力嘔れ現用・予備ルート間に相異が
ある場合のみ出力される波形20の如き信号へと変換さ
れてC3点へ送出される。C□点において前記波形2 
of′iz分岐され一方は直接論理積回路9へ、他方は
警報信号の相異が、ある一定時間継続しないと出力を送
出しないようにするためにカウンター回路8のリセット
入力端子に入力されカウンター回路8は第2図の波形2
0′で示される信号を出力する。カウンター回路8の出
力は再び前記論理積回路9へと入力されC8点において
波形21に示されるような現用予備相異信号の出力を得
る。C1点において、前記波形21は2分岐され、それ
ぞれ前記インバータ6及び同7との論理積をとるために
論理積回路10及び同11へと入力され、A1点、B1
点においてそれぞれ警報発生の頻度の低い万へ回路切替
信号を出力するための波形22、波形23の出力が得ら
れる。波形22、波形23の出力は論理積回路12及び
同13よフ構成てれるフリップフロップ回路へと入力烙
れ波形23及び波形24て示  −1)嘔れる切替信号
となって出力端子14及び同15からそれぞれ伝送路の
切替回路へと送出される。
FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a time chart for fully explaining the operation of FIG. 281. Intermittent alarm signals due to the deterioration of the cloth quality as shown in waveforms 16 and 17 in FIG.
A retriggerable multi (ret) is used to shape the waveform so that it will be sent as a continuous a reward signal if the time from when the alarm stops until the θ axis occurs again is within a certain period of time 1d.
riggerble rnulti) circuits 3 and 4
is converted into waveforms 18 and 19 in Figure 2.
2 points, sent to 88 points. At points A2 and B1, the waveforms 18 and 19 are branched into two, and the other one is input to the inverters 6 and 7, respectively, and the other one is input to the exclusive OR circuit 5. It is converted into a signal such as waveform 20, which is output only when there is a difference between the preliminary routes, and sent to point C3. The waveform 2 at point C
of'iz is branched, one directly to the AND circuit 9, and the other input to the reset input terminal of the counter circuit 8 to prevent the output from being sent out unless the difference in alarm signal continues for a certain period of time. 8 is waveform 2 in Figure 2
Outputs a signal indicated by 0'. The output of the counter circuit 8 is again input to the AND circuit 9, and a working/standby differential signal as shown in a waveform 21 is obtained at point C8. At point C1, the waveform 21 is branched into two, and is input to AND circuits 10 and 11 in order to perform AND with the inverters 6 and 7, respectively.
Outputs of waveform 22 and waveform 23 are obtained for outputting a circuit switching signal to the points where the frequency of alarm occurrence is low, respectively. The outputs of the waveforms 22 and 23 are input to the flip-flop circuit constituted by the AND circuit 12 and 13. 15 and are respectively sent to the switching circuits of the transmission lines.

ここで、切替信号出力端子14を入力端子1に入力され
る警報信号を発生する機器側の伝送路を選択する切替器
のドライブ回路へ、また逆に切替信号出力端子15を入
力端子2に入力されるδ報償号を発生する機器側の伝送
路を選択する切替器のドライブ回路へそれぞれ接続して
おけば、現用予備で告報信号の発生状態に所定の相異が
あり、かつθ報償号の発生頻度が低く続継時間も短かい
伝送路側を選択することにな少、断続的なむ報償号が入
力されても、安定した切替動作が行なわれることになる
Here, the switching signal output terminal 14 is inputted to the input terminal 1 to the drive circuit of the switch that selects the transmission path of the device that generates the alarm signal, and conversely, the switching signal output terminal 15 is inputted to the input terminal 2. If the transmission path of the device that generates the δ compensation signal is connected to the drive circuit of the switch that selects the transmission path, it is possible to make sure that there is a predetermined difference in the generation status of the report signal in the working and standby, and that the θ compensation signal By selecting the transmission line side in which the occurrence frequency of occurrence is low and the duration is short, stable switching operation can be performed even if intermittent reward signals are input.

(発明の効果) 以上説明したように、本発明の切替信号発生□ 回路に
おいては、ある官報信号と次の警報信号の時間間隔が一
定値以下の時は連続する1個の呑報信号と見做した上で
、現用機器と予備機器との間で−17jL79報信号を
発し他方が警報信号を発していないという状態が一定時
間以上継続しない限フ切替信号は発生嘔れないので、仮
に現用機器がUT続的にθ軸を発したとしても上記の糸
件を滴たさない限り切替わらず、−万上記の条件を満た
した場合には警報信号を発していない予備機器へ切替わ
るので安定した切替動作が行われるという利点がある。
(Effects of the Invention) As explained above, in the switching signal generation circuit of the present invention, when the time interval between one official gazette signal and the next alarm signal is less than a certain value, it is considered as one continuous alarm signal. In addition, unless the condition in which the -17jL79 alarm signal is emitted between the active device and the backup device and the other device does not emit an alarm signal continues for a certain period of time, the switchover signal will not occur, so if the active device Even if the UT continuously emits the θ-axis, it will not switch unless the above-mentioned conditions are met, and if the above-mentioned conditions are met, it will switch to the backup device that is not emitting an alarm signal, so it is stable. This has the advantage that the switching operation can be performed in a controlled manner.

また現用及び予備の機器が共通の原因によって時間的に
前後の差はあっても共に警報信号を発するに至るか或い
は逆に共に回復する場合には、その時間差が予め設定さ
れた時間内である限フ無用の切替え動作は起らないとい
う利点がある。
In addition, if the current and backup devices both issue alarm signals due to a common cause, even if there is a time difference, or conversely, they recover together, the time difference is within a preset time. This has the advantage that no unnecessary switching operations occur.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の構成を示す図、第2図は本発
明にかかる切替信号発生回路の動作を説明するタイミン
グ波形図で6る。 1.2・・・入力端子、  3,4・・・リトリガブル
マルチ回路、  5・・・排他的論理和回路 6,7・
・・インバータ、  8・・・カウンター回路、  9
・・・第1の論理積回路、  lO・・・第2の論理積
回路、11・・・第3の論理積回路、  12.13・
・・ナンド回路、  14.15・・・出力端子、16
.17・・・入力警報信号、  18.19・・・リト
リガブルマルチ回路3及び同4の出力波形、  20・
・・排他的論理利回路5の出力波形、20′・・・カウ
ンター回路8の出刃波形、  21・・・第1の論理積
回路9の出力波形、  22・・・第2の論理積回路1
゜の出力波形、  23川第3の論理積回路11の出力
波形、  24.25・・・出方切替信号代理人 弁理
士 八 幡 G先 博 第 / 図
FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a timing waveform diagram illustrating the operation of the switching signal generation circuit according to the present invention. 1.2... Input terminal, 3, 4... Retriggerable multi circuit, 5... Exclusive OR circuit 6, 7.
...Inverter, 8...Counter circuit, 9
...first AND circuit, lO...second AND circuit, 11...third AND circuit, 12.13.
...NAND circuit, 14.15...Output terminal, 16
.. 17... Input alarm signal, 18.19... Output waveform of retriggerable multi circuits 3 and 4, 20.
...Output waveform of exclusive logic circuit 5, 20'...Deba waveform of counter circuit 8, 21...Output waveform of first AND circuit 9, 22...Second AND circuit 1
Output waveform of ゜, Output waveform of the third AND circuit 11 of the 23rd river, 24.25...Output switching signal agent Patent attorney Yahata G-Sen Hiroshi/Fig.

Claims (1)

【特許請求の範囲】[Claims] 1個の入力矩形波信号が終了した後予め設定された時間
内に次の矩形波信号が入力として現われた場合には先の
矩形波信号と次の矩形波信号を連続させて1個の矩形波
信号とし出力する2個のリトリガブルマルチ回路(第1
のリトリガブルマルチ回路と第2のリトリガブルマルチ
回路)と、前記2個のリトリガブルマルチ回路の出力を
それぞれ反転する2個のインバータ(第1のインバータ
と第2のインバータ)と、前記2個のリトリガブルマル
チ回路の出力の相異を検出する排他的論理和回路と、該
排他的論理和回路の出力波形の立ち上りで立ち下り所定
時間経過後立ち上る波形信号を発生するカウンタと、該
カウンタの出力信号と前記排他的論理和回路の出力信号
との論理積をとる第1の論理積回路と該第1の論理積回
路の出力信号と前記第1のインバータの出力信号との論
理積をとる第2の論理積回路と、前記第1の論理積回路
の出力信号と前記第2のインバータの出力信号との論理
積をとる第3の論理積回路と、前記第2の論理積回路の
出力信号と前記第3の論理積回路の出力信号を受けて一
方の出力信号の立ち上りにより立ち上り他方の出力信号
の立ち上りにより立ち下る矩形波信号を発生するフリッ
プフロップ回路とからなる切替信号発生回路。
If the next rectangular wave signal appears as an input within a preset time after one input rectangular wave signal ends, the previous rectangular wave signal and the next rectangular wave signal are continuous to form one rectangular wave signal. Two retriggerable multi-circuits (first
a retriggerable multi-circuit and a second retriggerable multi-circuit), and two inverters (a first inverter and a second inverter) that invert the outputs of the two retriggerable multi-circuits, respectively; an exclusive OR circuit that detects a difference between the outputs of the two retriggerable multi-circuits, and a counter that generates a waveform signal that falls at the rising edge of the output waveform of the exclusive OR circuit and rises after a predetermined time has elapsed. , a first AND circuit that takes the logical product of the output signal of the counter and the output signal of the exclusive OR circuit, and the output signal of the first AND circuit and the output signal of the first inverter. a second AND circuit that takes an AND; a third AND circuit that takes an AND of an output signal of the first AND circuit and an output signal of the second inverter; A switching signal consisting of a flip-flop circuit that receives the output signal of the product circuit and the output signal of the third AND circuit and generates a rectangular wave signal that rises when one output signal rises and falls when the other output signal rises. generation circuit.
JP18424884A 1984-09-03 1984-09-03 Switching signal generating circuit Pending JPS6162238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18424884A JPS6162238A (en) 1984-09-03 1984-09-03 Switching signal generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18424884A JPS6162238A (en) 1984-09-03 1984-09-03 Switching signal generating circuit

Publications (1)

Publication Number Publication Date
JPS6162238A true JPS6162238A (en) 1986-03-31

Family

ID=16149978

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18424884A Pending JPS6162238A (en) 1984-09-03 1984-09-03 Switching signal generating circuit

Country Status (1)

Country Link
JP (1) JPS6162238A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5097467A (en) * 1988-07-18 1992-03-17 Fujitsu Limited Switching trigger detection circuit in line switching apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5097467A (en) * 1988-07-18 1992-03-17 Fujitsu Limited Switching trigger detection circuit in line switching apparatus

Similar Documents

Publication Publication Date Title
US3786276A (en) Interference suppression device for logic signals
US3751685A (en) Redundant pulse supply system
US4490581A (en) Clock selection control circuit
JPS6162238A (en) Switching signal generating circuit
US4365164A (en) Vital contact isolation circuit
JPS6047531A (en) Fail-safe circuit of multiple signal transmission system
US3764760A (en) Method of and means for emitting interrogation codes to supervise repeaters of pcm telecommunication system
JPH01220913A (en) Digital event generator
GB1535946A (en) Apparatus for indicating whether one or more objects are in motion
SU930682A1 (en) Controllable rate scaler
KR102340899B1 (en) Apparatus for depressing abnoraml high level pulse of pulse width modulation
JPH01126018A (en) Logic circuit
US4553249A (en) Method and circuit arrangement for converting a binary signal, alternating between two levels, to a pulse code signal which comprises data pulses and renewal pulses
JPS5787648A (en) Data transmission controller
JPH01231546A (en) Alarm display system
JPS5913491A (en) Remote controlling device
US4385230A (en) Digital temperature effect generator
KR100605784B1 (en) Pulse generator
SU1478372A2 (en) Control signal switching unit for program-controlled switching circuits
US3510840A (en) Parity determining circuit using a tandem arrangement of hybrid junctions
JPS62128634A (en) Detecting circuit for abnormality of clock signal
SU573852A1 (en) Self-correcting flip-flop with complementing input
JP2901355B2 (en) Output simultaneous operation reduction circuit
JPH0777384B2 (en) Line simulator
SU1167574A1 (en) Electronic time device