JPS6157869U - - Google Patents
Info
- Publication number
- JPS6157869U JPS6157869U JP14221984U JP14221984U JPS6157869U JP S6157869 U JPS6157869 U JP S6157869U JP 14221984 U JP14221984 U JP 14221984U JP 14221984 U JP14221984 U JP 14221984U JP S6157869 U JPS6157869 U JP S6157869U
- Authority
- JP
- Japan
- Prior art keywords
- output
- gate
- generation circuit
- pulse generation
- trigger pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
- Tests Of Electronic Circuits (AREA)
Description
第１図は本考案の実施例を示すブロツク図、第
２図は第１図の各部波形図、第３図、第４図は本
考案による管面表示波形の例を示す図、第５図は
従来例のブロツク図、第６図は第５図の各部波形
図、第７図、第８図は従来例の管面表示波形の例
を示す図。
１：トリガパルス発生回路、２：ゲートパルス
発生回路、３：掃引波形発生回路、４：輝度変調
回路、１０：ＡＮＤゲート。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram of each part of FIG. 1, FIGS. 3 and 4 are diagrams showing examples of screen display waveforms according to the present invention, and FIG. 5 6 is a block diagram of a conventional example, FIG. 6 is a waveform diagram of each part of FIG. 5, and FIGS. 7 and 8 are diagrams showing examples of waveforms displayed on a screen of the conventional example. 1: Trigger pulse generation circuit, 2: Gate pulse generation circuit, 3: Sweep waveform generation circuit, 4: Brightness modulation circuit, 10: AND gate.
Claims (1)
スより掃引波形を発生させるためのゲートパルス
発生回路の出力の論理和をとるゲートを具備し、
該ゲートの出力と前記ゲートパルス発生回路の出
力を入力とし重畳して出力することを特徴とする
輝度変調回路を有するオシロスコープ。 comprising a gate that ORs the output of the trigger pulse generation circuit and the output of a gate pulse generation circuit for generating a sweep waveform from the trigger pulse;
An oscilloscope having a brightness modulation circuit, characterized in that the output of the gate and the output of the gate pulse generation circuit are inputted and output in a superimposed manner.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14221984U JPS6157869U (en) | 1984-09-21 | 1984-09-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14221984U JPS6157869U (en) | 1984-09-21 | 1984-09-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6157869U true JPS6157869U (en) | 1986-04-18 |
Family
ID=30700546
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14221984U Pending JPS6157869U (en) | 1984-09-21 | 1984-09-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6157869U (en) |
-
1984
- 1984-09-21 JP JP14221984U patent/JPS6157869U/ja active Pending
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