JPS6155974A - Constant-voltage diode - Google Patents
Constant-voltage diodeInfo
- Publication number
- JPS6155974A JPS6155974A JP17791084A JP17791084A JPS6155974A JP S6155974 A JPS6155974 A JP S6155974A JP 17791084 A JP17791084 A JP 17791084A JP 17791084 A JP17791084 A JP 17791084A JP S6155974 A JPS6155974 A JP S6155974A
- Authority
- JP
- Japan
- Prior art keywords
- diffusion region
- type
- voltage
- shallower
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009792 diffusion process Methods 0.000 claims abstract description 75
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract description 5
- 238000007493 shaping process Methods 0.000 abstract 1
- 230000000087 stabilizing effect Effects 0.000 description 5
- 230000006641 stabilisation Effects 0.000 description 4
- 238000011105 stabilization Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 150000001204 N-oxides Chemical class 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- H01L29/866—
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は定電圧ダイオードに関し、特に半導体集積回路
に適する定電圧ダイオードに関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a constant voltage diode, and particularly to a constant voltage diode suitable for semiconductor integrated circuits.
(従来技術)
従来、半導体集積回路用定電圧ダイオードは第5図に示
すような構造を有し、第5図において、1はN型半導体
基板、2はPi拡散領域、3はN+凰拡散領域、4は絶
縁膜、5は電極である。すなわち−組のPN接合を用意
すれば良いので非常に多く用いられて来た。しかし製造
上の条件の微妙な変動により安定化電圧が大きく変動し
高精度の定電圧ダイオードを得ることが不可能でおった
。(Prior Art) Conventionally, a constant voltage diode for a semiconductor integrated circuit has a structure as shown in FIG. 5, in which 1 is an N-type semiconductor substrate, 2 is a Pi diffusion region, and 3 is an N+ diffusion region. , 4 is an insulating film, and 5 is an electrode. That is, since it is sufficient to prepare a negative set of PN junctions, it has been used very often. However, the stabilized voltage fluctuates greatly due to subtle variations in manufacturing conditions, making it impossible to obtain a highly accurate voltage regulator diode.
また、集積回路を製造した後に所望の安定化電圧を得る
ことも不可能であり、用途が限定されたものとなってい
た。Furthermore, it has been impossible to obtain a desired stabilized voltage after manufacturing the integrated circuit, and its applications have been limited.
(発明の目的)
本発明の目的は、前記のような従来の定電圧ダイオード
の欠点を除去し、所定の精密な安定化電圧が得られると
共に多種類の安定化電圧が得られ、しかも安定化電圧の
選択ができる優れた定電圧ダイオードを提供することに
ある。(Object of the Invention) The object of the present invention is to eliminate the drawbacks of the conventional voltage regulator diode as described above, to obtain a predetermined precise stabilization voltage, to obtain a wide variety of stabilization voltages, and to provide a stabilized The object of the present invention is to provide an excellent constant voltage diode that allows voltage selection.
(発明の構成)
本発明の定電圧ダイオードは、−導tm半導体基板の主
面上に形成された第2導電型の第一の拡散領域の内部に
前記第一の拡散領域よυ浅い第一導電型の第二の拡散領
域を有し、前記第二の拡散領域の内部に外側となる拡散
領域と比べて浅くしかも高濃度でちる第一導電型の拡散
領域を少なくとも一つ設け、前記第一導を型の第二の拡
散領域と前記少なくとも−クの第一導tm拡散領域の周
囲上に絶縁膜を有し、該絶縁膜上に前記第一導電型の第
二の拡散領域と前記少なくとも一つの第一導電型拡散領
域の周囲を全て覆って形成された電極を有して構成され
る。(Structure of the Invention) The constant voltage diode of the present invention has a first diffusion region shallower than the first diffusion region within a first diffusion region of a second conductivity type formed on the main surface of a -conducting tm semiconductor substrate. a second diffusion region of a conductivity type, at least one diffusion region of a first conductivity type that is shallower and has a higher concentration than an outer diffusion region is provided inside the second diffusion region; an insulating film on the periphery of the first conductive type diffusion region and the first conductive type diffusion region, and the first conductive type second diffusion region and the It is configured to include an electrode formed to completely cover the periphery of at least one first conductivity type diffusion region.
(実施例)
以下、本発明の実施例について、図面を参照して説明す
る。(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.
第1図(a)、(b)は本発明の第一の実施例の平面図
及びそのx−x’断面図である。第1図(a)、(b)
に示すように、N型半導体基板1の主表面にはP型の第
一の拡散領域2が形成され、第一の拡散領域2の内部に
第一の拡散領域2よp浅いN+型の第二の拡散領域3a
が形成され、また第2の拡散領域3aの内部には外側と
なる拡散領域と比べて浅く、シかも高濃度であるrr”
gの拡散領域が少なくとも一つ設けられている。第1図
(a) 、 (b)の場合は高濃度拡散領域3b一つ設
けられた例を示している。FIGS. 1(a) and 1(b) are a plan view and an xx' cross-sectional view of a first embodiment of the present invention. Figure 1 (a), (b)
As shown in FIG. 2, a P-type first diffusion region 2 is formed on the main surface of an N-type semiconductor substrate 1, and an N+-type first diffusion region 2, which is shallower than the first diffusion region 2, is formed inside the first diffusion region 2. Second diffusion area 3a
is formed, and the inside of the second diffusion region 3a is shallower than the outer diffusion region and has a high concentration of rr”.
At least one diffusion region of g is provided. In the case of FIGS. 1(a) and 1(b), an example is shown in which one high concentration diffusion region 3b is provided.
そして、N++拡散領域3a、N”+型拡散領域3bの
全周囲上を環状に覆うように絶縁膜4上にゲート電極5
bを有しておシ、また、定電圧ダイオード電極5aを形
成することにより構成されている。A gate electrode 5 is placed on the insulating film 4 so as to annularly cover the entire periphery of the N++ diffusion region 3a and the N''+ type diffusion region 3b.
It is constructed by forming a constant voltage diode electrode 5a.
本実施例はおいては、上記ゲート電極5bの電位を外部
からN++拡散領域3a、N”+型拡散領域3bに対し
負にバイアスすること釦より前記N+盤拡散領域3a、
N+“型拡散領域3bK対し負にバイアスすることによ
り前記N+ m拡散領域3aの表面の担体濃度を制御し
て降伏電圧を変化させることが主眼でちる。即ちゲート
電圧がN“型拡散領域3a、N”11拡散領域3bに対
してOらるいは浅い負電圧にバイアスされた場合は降伏
はN+鳳拡散領域3aの表面で起こるが、次gKゲート
電極5bの負バイアスを増して行くと、ついにはN+製
領領域3a表面がP狐に反転するため降伏はN”fi拡
散領域3bの表面で起こるようになり、N″型拡散領域
3bの方がN+盤拡散領域3aよ)も高濃度でちるため
に降伏電圧は低下する。以上の説明を図にすると第2図
に示すとおシでおる0すなわち、第2図に示す定電圧ダ
イオードからはゲート電圧を制御することくより2種類
の安定化電圧が選択できることKなる0
第3図は本発明の第二の実施例の断面図でおる0第3図
に付した符号で第1図と同じものは同一部分を示す。第
3図においては、P凰の第一の拡散領域2の内部に第1
の拡散領域2より浅いN+麓の第二の拡散領域3aが形
成され、さらに外側にらるN++拡散領域より浅く、シ
かも高濃度でらるN”を拡散領域3bが形成されている
。これまでの構造は第1図と同じであるが第3図ではN
”型拡散領域3bの内側ICj!KN”W拡散領域3b
より浅<、シかも高濃度でちるN+++ 型拡散領域3
Cが形成されている。すなわち、NWの拡散層の数が増
した構造で第2の拡散領域の内部に外側となる拡散領域
と比べて浅く、シかも高濃度の関係にあるN鑞の拡散領
域が二つ形成され7’C構造である。このようにNfi
拡散層の数を増せば前に説明した理由により更に精密な
安定化電圧が得られ、かつ多種類の安定化電圧が得られ
る。すなわち、第3図に示す構造の定電圧ダイオードで
は第4図に示すゲートのバイアス電圧と安定化電圧の関
係で明らかなように3種類の安定化電圧が選択できるこ
とになる。In this embodiment, the potential of the gate electrode 5b is externally biased negatively with respect to the N++ diffusion region 3a and the N''+ type diffusion region 3b by pressing the button.
The main objective is to control the carrier concentration on the surface of the N+ m diffusion region 3a and change the breakdown voltage by negatively biasing the N+" type diffusion region 3bK. That is, if the gate voltage is N" type diffusion region 3a, When the N''11 diffusion region 3b is biased to a shallow negative voltage, breakdown occurs on the surface of the N+ diffusion region 3a, but as the negative bias of the gK gate electrode 5b is increased, the breakdown finally occurs. Since the surface of the N+ region 3a is reversed to a P fox, breakdown occurs on the surface of the N"fi diffusion region 3b, and the concentration of the N" type diffusion region 3b is higher than that of the N+ disk diffusion region 3a. In other words, the voltage regulator diode shown in Figure 2 has two types of stability that can be achieved by controlling the gate voltage. Figure 3 is a sectional view of the second embodiment of the present invention.The same reference numerals in Figure 3 as in Figure 1 indicate the same parts. is the first diffusion region 2 of P-o.
A second diffusion region 3a at the base of N+ is formed, which is shallower than the N+ diffusion region 2, and a N'' diffusion region 3b, which is shallower than the outer N++ diffusion region and has a high concentration, is formed. The structure up to this point is the same as in Figure 1, but in Figure 3 N
“Inside ICj!KN of type diffusion region 3b” W diffusion region 3b
Shallower N+++ type diffusion region 3 with high concentration
C is formed. That is, in a structure in which the number of NW diffusion layers is increased, two N-oxide diffusion regions are formed inside the second diffusion region, which are shallower than the outer diffusion region and have a higher concentration. 'C structure. In this way, Nfi
By increasing the number of diffusion layers, a more precise stabilization voltage can be obtained for the reasons explained above, and a wide variety of stabilization voltages can be obtained. That is, in the constant voltage diode having the structure shown in FIG. 3, three types of stabilizing voltages can be selected, as is clear from the relationship between the gate bias voltage and the stabilizing voltage shown in FIG.
なお、以上の説明では第一導gL減としてはN型で説明
したが導電盤を入れ換えても本発明4そのまま成立する
ことは言りまでもない。Incidentally, in the above explanation, the first conductive gL reduction was explained using the N type, but it goes without saying that the fourth invention can be implemented as is even if the conductive board is replaced.
(発明の効果)
以上説明したように本発明によれば、何種類でも所望の
安定化電圧が得られるので、集積回路製造後に外部から
ゲート電圧ti節することにより精密な安定化電圧を得
ることも可能であるし、集積回路製造後に安定化電圧を
変更することも容易にできる。(Effects of the Invention) As explained above, according to the present invention, a desired stabilized voltage can be obtained regardless of the number of types, so a precise stabilized voltage can be obtained by adjusting the gate voltage ti externally after manufacturing the integrated circuit. It is also possible to easily change the stabilizing voltage after the integrated circuit is manufactured.
第1図(a)、 (b)は本発明の第一の実施例の平面
図およびx−x’ 断面図、第2図は本発明の第一の実
施例のゲート領域電位と安定化電圧の関係を示す図、第
3図は本発明の第二の実施例の断面図、第4図は本発明
の第二の実施例のゲート領域電位と安定化電圧の関係を
示す図、第5図は従来の定電圧ダイオードの一例の断面
図である。
1・・・・・・NW半導体基板、2・・・・・・P型拡
散領域、3a、3b、3c・・・・・・N型拡散領域、
4・・・・・・絶縁膜、5a・・・・・・定電圧ダイオ
ード電極、5b・・・・・・ゲート電極。
ノ1を一電圧1
ツェナー電圧
↑
□ゲート1カ〜1ヒイ立
第4図
弗5区FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along line xx' of the first embodiment of the present invention, and FIG. 2 is a gate region potential and stabilizing voltage of the first embodiment of the present invention. FIG. 3 is a cross-sectional view of the second embodiment of the present invention, FIG. 4 is a diagram showing the relationship between the gate region potential and stabilizing voltage of the second embodiment of the present invention, and FIG. The figure is a cross-sectional view of an example of a conventional constant voltage diode. 1...NW semiconductor substrate, 2...P type diffusion region, 3a, 3b, 3c...N type diffusion region,
4...Insulating film, 5a... Constant voltage diode electrode, 5b... Gate electrode. Voltage 1 Zener voltage ↑ □ Gate 1 to 1 Hi Figure 4 弗 5 Section
Claims (1)
の第一の拡散領域の内部に前記第一の拡散領域より浅い
第一導電型の第二の拡散領域を有し、前記第二の拡散領
域の内部に外側となる拡散領域と比べて浅くしかも高濃
度である第一導電型の拡散領域を少なくとも一つ設け、
前記第一導電型の第二の拡散領域と前記少なくとも一つ
の第一導電型拡散領域の周囲上に絶縁膜を有し、該絶縁
膜上に前記第一導電型の第二の拡散領域と前記少なくと
も一つの第一導電型拡散領域の周囲を全て覆って形成さ
れた電極とを有することを特徴とする定電圧ダイオード
。A second diffusion region of the first conductivity type, which is shallower than the first diffusion region, is provided inside the first diffusion region of the second conductivity type formed on the main surface of the semiconductor substrate of the first conductivity type; providing at least one diffusion region of the first conductivity type which is shallower and has a higher concentration than the outer diffusion region inside the second diffusion region;
an insulating film is provided around the second diffusion region of the first conductivity type and the at least one first conductivity type diffusion region, and the second diffusion region of the first conductivity type and the 1. A constant voltage diode comprising: an electrode formed entirely around at least one first conductivity type diffusion region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17791084A JPS6155974A (en) | 1984-08-27 | 1984-08-27 | Constant-voltage diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17791084A JPS6155974A (en) | 1984-08-27 | 1984-08-27 | Constant-voltage diode |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6155974A true JPS6155974A (en) | 1986-03-20 |
Family
ID=16039197
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17791084A Pending JPS6155974A (en) | 1984-08-27 | 1984-08-27 | Constant-voltage diode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6155974A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63300752A (en) * | 1987-05-27 | 1988-12-07 | ポール・エイ・クルト | Femoral blood vessel presser |
US5027165A (en) * | 1990-05-22 | 1991-06-25 | Maxim Integrated Products | Buried zener diode |
WO1993019490A1 (en) * | 1992-03-23 | 1993-09-30 | Rohm Co., Ltd. | Voltage regulating diode |
JP2006263637A (en) * | 2005-03-25 | 2006-10-05 | Juki Corp | Adhesive discharge apparatus |
-
1984
- 1984-08-27 JP JP17791084A patent/JPS6155974A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63300752A (en) * | 1987-05-27 | 1988-12-07 | ポール・エイ・クルト | Femoral blood vessel presser |
US5027165A (en) * | 1990-05-22 | 1991-06-25 | Maxim Integrated Products | Buried zener diode |
WO1993019490A1 (en) * | 1992-03-23 | 1993-09-30 | Rohm Co., Ltd. | Voltage regulating diode |
US5475245A (en) * | 1992-03-23 | 1995-12-12 | Rohm Co., Ltd. | Field-effect voltage regulator diode |
JP2006263637A (en) * | 2005-03-25 | 2006-10-05 | Juki Corp | Adhesive discharge apparatus |
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