JPS6154742A - Coupling circuit of control system - Google Patents

Coupling circuit of control system

Info

Publication number
JPS6154742A
JPS6154742A JP17700984A JP17700984A JPS6154742A JP S6154742 A JPS6154742 A JP S6154742A JP 17700984 A JP17700984 A JP 17700984A JP 17700984 A JP17700984 A JP 17700984A JP S6154742 A JPS6154742 A JP S6154742A
Authority
JP
Japan
Prior art keywords
signal
photocoupler
control system
terminal block
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17700984A
Other languages
Japanese (ja)
Inventor
Masakazu Fukunaga
雅一 福永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP17700984A priority Critical patent/JPS6154742A/en
Publication of JPS6154742A publication Critical patent/JPS6154742A/en
Pending legal-status Critical Current

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  • Small-Scale Networks (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To obtain the coupling circuit of a control system which uses a high- speed type photocoupler and has tolerance to a noise and high reliability by equipping an input system with a photocoupler for input connected to the output terminal of a DC stabilized power source through a switching element which is switched in synchronism with the half-wave rectification output of a rectifying means. CONSTITUTION:The output of a diode bridge DB connected to a signal line 7 is connected to the input terminal of the DC stabilized power source 14 which is stepped down and stabilized at the driving source voltage of the high-speed type photocoupler. Then, a transmit signal Vs sent through the signal line 7 is rectified by the diode D0 on half-waveform basis and its half-waveform rectification output is applied to the base of a transistor (TR)Q, which is switched in synchronism with a waveform applied to its base to drive the photocoupler PH. Therefore, the photocoupler PH outputs the unipolar wavefom of the transmit signal V as it is and the signal is sent to a signal processing logical part 9 as it is without requiring any frequency dividing circuit.

Description

【発明の詳細な説明】 【技術分野1 本発明は時分割多重伝送システム系と接続する制御シス
テム結合回路に関するものである。 【背景技術] 第3図は多重伝送系と分散処理システム系の制御システ
ム装r!i1とを入出力インター7エイスユニツトBを
介して結合したシステム接続図を示しており、制御シス
テム装置1はfjS4図に示すようにCPυユニットA
をCPU2とインター7エイス6とで構成し、入力用内
部バス4a、出力用内部バス4bを介して温度コントa
−ラがらの監視データの取り込みや、監視データに基プ
(シーケンサ等の制御を行なうものであり、そのシステ
ム自体で独立した制御監視が行なうことがでさるように
成っている。そして申失制御II監祝装置2に対しては
上述のms図に示す回路からなる端末ブロック3と、制
御データと監視データとをCPU2側に灯し゛〔入出力
させるためのインターフェイス5とからなる人出力イン
ター7エイスユニソト13とIJ号腺7とを介して結合
されており、中9!、all制御監視装置12がら端末
ブロック3を順次呼び出して制i11システムVcli
21とデータの授受を行うようになっている。第6図(
a)(1+)は中央制御監視装置2がらサイクリックに
順次送信される伝送信号V9および端末ブロック11・
・から返送される返送信号VBを示すもので、スタート
信号ST、7ドレスデータ信号AD、制御データ信号S
D、返送待機(U号WPから構成される。端末ブロック
3では、(ff号[7を介して中央制御監視装置i2か
ら伝送される伝送信号Vsを結合回路8を介して受イσ
してそのアドレスデータ信号ADにて送られる呼出用ア
ドレスと自己の設定アドレスとが一致しているかどうか
を信号路理論J1rIS9の制御の下においてアドレス
判別部10で判別し、一致している場合にはそのアドレ
スデータ(II号ADに続いて送られる制御データ信号
SDをil制御信号判別部11が取り込んで各ビットご
とに制御データを出力して制御データが揃った時点で7
ドレス一致信号を出力し、インターフェイス5を介して
CP IIユニット八へ制御データを転送させ、また監
視デー タをインターフェイス5を介して監視人力送出
部12に収り込んで返送待機信号WPに同期して返送す
る。なお、監視データを返送する返送fff号V11は
データに応じて一対の信号線間を適当なインピーダンス
を介して短絡することによりデータ伝送を行うようにし
たいわゆる電流モード信号である。 ところで上記分1il111システム装置1はそれ自体
で独自の′@源を有し、また多重伝送システム系の上記
伝送(ff号vsは第8図(a)に示すようにパルス幅
変調し且っ複極の±24Vのパルスイぼ号からなるため
、両システムをJelNする必要がある。そのため従来
結合回路8は第7図に示すようにfg号線7を介して伝
送される伝送信号VBを全波9流rtDBで第8図(b
)に示すように全波整流し、その全波整流波形の工シノ
部位でトランジスタQをスイッチングさせてホトカプラ
PHをオンさせ、ゼロクロス点に同期した検出パルスを
ホトカプラPHより得て、その検□出パルスをD型7リ
ツプロツプ等の分周回路13で単極の元のパルス波形を
復元していた。ところが従来回路ではダイオードD、と
抵抗R+とトランジスタQと抵抗R2とを介してホトカ
プラPHの発光ダイオードLEDを接続する構成である
ためホトカブ→PHの印加電圧が21) V近くとなり
、現状では高速タイプのものが使用できず、第8図(e
)において破線で示すように検出パルスがなまる傾向が
あった。このことはホトトランジスタPTに20V近く
の電圧を印加し、発光ダイオードLED’が監視人力送
出部12のトランジスタQ1で駆!IIIJされる返送
48号用のホトカプラPH’側でも同様に起きる問題で
も占る。また極(短時間幅の検出パルスを得る為にはP
NP型のトランジスタQのベースに接続しである抵抗R
1の値を大さくしなければならず、そのため動作が不安
定になるという問題があるとともに、検出パルスで分周
回路13をトリがしてデータの信号を復元するためノイ
ズによる誤動作の恐れもあった。 【発明の目的] 本発明は上述の点に鑑、みて為されたもので、その目的
とするところは高速タイプのホトカプラが使えるととも
に、ノイズにも強い信頼性の高い制御システムの結合回
路を提供するにある。 【発明の開示】。 第1図は本発明の実施例の回路を示し、(R号線7に接
続したダイオードブリツノDBの出力は高速タイプのホ
トカプラの駆動電源電圧(例えば  5v)に降下且つ
安定化させる直流安定化電源14の入力端に接続しであ
ろ、そして該直流安定化型[14の出力端には入力用の
ホトカプラPHの発光ダイオードLEDを抵抗R1及び
トランジスタQを介して接続してあろ、トランジスタQ
はベースにダイオードD0で半波整流して抵抗R1、R
6とR1とで分圧しである電圧を接続しである。また直
流安定化電源14の出力端には返送用のホトカプラl”
lビのホトトランジスタ[]′と抵抗1(、との直列回
路を接続しである。抵抗、の両端に発生する電圧はダイ
オードブリッジDBの出力端に接続しであるトランジス
タQ、のベースに抵抗R1を介して接続しである。 しかして信号m7を介して送られてきた第2図(a)に
示す伝送信号■sはダイオードD0で半波整tILされ
、第2図(b)に示すその半波整流出力はトランジスタ
Qのベースに印加されトランジスタQはそのベースに印
加される波形に同期してスイッチングしてホトカブ?P
Hを駆動する。従ってホ)カプラPHの出力には伝送信
号vgの単極波形がそのまま形として発生し、分周血路
ら不要で信号処理論理部9へそのまま送れることになる
。 一方監視人力送出部12の出力でトランジスタQ、が駆
動されると、それに同期してホトカプラPH’も駆動さ
れ、その出力でトランジスタQ2をオンオフさせる。従
ってトランジスタQ!のオン時に信号線7が短絡され電
流モードの返送信号が送出されることになる。 [発明の〃J果1 本発明は端本ブロックに設けられ、信号線にて送られる
伝送48号を半波整流する整流手段と、伝送信号を整流
してホトカプラ駆動用の電圧に降圧安定化する直流安定
化電源と、該直流安定化電源の出力端に上記整流手段の
半波整流出力に同期してスイッチングされるスイッチン
グ素子を介して接続された入力用ホシカブラとを人力系
に備えたのでダイレクトに伝送信号を復元することがで
きるものであって、従来のようなゼロクロス点を検出す
る場合に比べてノイズに対する(i頼性が向上するとと
もに、仲間回路が不要となるという効果があり、しかも
直流安定化mWを用いるため11゛4連タイプのホトカ
プラの電圧を得ることが可能となり、波形復元において
波形のなまりの発生を無くすことができるという効果が
ある。
DETAILED DESCRIPTION OF THE INVENTION Technical Field 1 The present invention relates to a control system coupling circuit connected to a time division multiplex transmission system. [Background technology] Figure 3 shows the control system configuration of a multiplex transmission system and a distributed processing system. This shows a system connection diagram in which the control system device 1 is connected to the CPυ unit A as shown in the fjS4 diagram.
is composed of a CPU 2 and an inter 7/8 6, and temperature control a is provided via an internal bus 4a for input and an internal bus 4b for output.
-The system is designed to take in various monitoring data and control the sequencer, etc. based on the monitoring data, and the system itself is designed to be able to perform independent control and monitoring. For the II supervisory device 2, there is a terminal block 3 consisting of the circuit shown in the above-mentioned ms diagram, and a human output interface 7 consisting of an interface 5 for inputting and outputting control data and monitoring data to the CPU 2 side. The Ace Unisoto 13 and the IJ gland 7 are connected to each other, and the terminal blocks 3 are sequentially called up from the middle 9! and all control and monitoring devices 12 to control the i11 system Vcli.
It is designed to exchange data with 21. Figure 6 (
a) (1+) is the transmission signal V9 which is transmitted cyclically and sequentially from the central control and monitoring device 2 and the terminal block 11.
・This indicates the return signal VB sent back from the start signal ST, 7dress data signal AD, and control data signal S.
D. Return standby (composed of U WP. The terminal block 3 receives the transmission signal Vs transmitted from the central control and monitoring device i2 via the ff [7] via the coupling circuit 8).
Then, under the control of the signal path theory J1rIS9, the address determination unit 10 determines whether or not the calling address sent by the address data signal AD matches the self-set address. The il control signal discriminator 11 takes in the address data (control data signal SD sent following No. II AD, outputs control data for each bit, and when the control data is complete, it becomes 7.
It outputs the address matching signal, transfers the control data to the CP II unit 8 via the interface 5, and also stores the monitoring data into the monitoring manual output section 12 via the interface 5, synchronizing it with the return standby signal WP. and send it back. Note that the return fff signal V11 for returning monitoring data is a so-called current mode signal that performs data transmission by short-circuiting a pair of signal lines via an appropriate impedance depending on the data. By the way, the above-mentioned 1il111 system device 1 has its own '@ source, and the above-mentioned transmission (ff signal vs. Since it consists of a pulse voltage signal of ±24V at the pole, it is necessary to JELN both systems.Therefore, as shown in FIG. Figure 8 (b
), full-wave rectification is performed, the photocoupler PH is turned on by switching the transistor Q at the output point of the full-wave rectification waveform, and a detection pulse synchronized with the zero-crossing point is obtained from the photocoupler PH, and its detection □ The original unipolar pulse waveform was restored using a frequency dividing circuit 13 such as a D-type 7 lipprop. However, in the conventional circuit, the light-emitting diode LED of the photocoupler PH is connected through the diode D, resistor R+, transistor Q, and resistor R2, so the applied voltage from photocube to PH is close to 21) V, and at present it is a high-speed type. Fig. 8 (e) cannot be used.
), the detected pulses tended to become dull, as shown by the broken line. This means that a voltage of nearly 20V is applied to the phototransistor PT, and the light emitting diode LED' is driven by the transistor Q1 of the monitoring human power output section 12! A similar problem will occur on the photocoupler PH' side for the return No. 48 that will be sent back to IIIJ. In addition, the pole (in order to obtain a short-time width detection pulse
A resistor R connected to the base of the NP type transistor Q
The value of 1 must be increased, which causes the problem of unstable operation, and there is also the risk of malfunction due to noise since the frequency divider circuit 13 is triggered by the detection pulse to restore the data signal. Ta. [Object of the Invention] The present invention has been made in view of the above-mentioned points, and its purpose is to provide a coupling circuit for a highly reliable control system that can use a high-speed photocoupler and is resistant to noise. There is something to do. [Disclosure of the invention]. FIG. 1 shows a circuit according to an embodiment of the present invention, in which the output of the diode DB connected to the R line 7 is a DC stabilized power supply that drops and stabilizes the drive power supply voltage (for example, 5V) of a high-speed type photocoupler. 14, and the output terminal of the DC stabilized type [14 is connected to a light emitting diode LED of an input photocoupler PH via a resistor R1 and a transistor Q.
is half-wave rectified with diode D0 at the base and resistors R1, R
6 and R1 to connect a certain voltage. In addition, at the output end of the DC stabilized power supply 14, there is a photocoupler for return.
A series circuit is connected between a phototransistor []' of IBI and a resistor 1 (,).The voltage generated across the resistor is connected to the output terminal of the diode bridge DB, and the resistor The transmission signal s shown in Fig. 2(a) sent via the signal m7 is subjected to half-wave rectification tIL by the diode D0, and the transmission signal s shown in Fig. 2(b) is transmitted via the signal m7. The half-wave rectified output is applied to the base of the transistor Q, and the transistor Q switches in synchronization with the waveform applied to the base of the photocube.
Drive H. Therefore, e) the unipolar waveform of the transmission signal vg is generated as it is at the output of the coupler PH, and can be sent as is to the signal processing logic unit 9 without the need for a frequency dividing line. On the other hand, when the transistor Q is driven by the output of the monitoring human power sending unit 12, the photocoupler PH' is also driven in synchronization with it, and the output turns on and off the transistor Q2. Therefore, transistor Q! When the signal line 7 is turned on, the signal line 7 is short-circuited and a current mode return signal is sent out. [Results of the invention 1] The present invention includes a rectifying means that is provided in the terminal block and half-wave rectifies the transmission number 48 sent through the signal line, and a rectifying means that rectifies the transmission signal and stabilizes the voltage to drive the photocoupler. The human-powered system is equipped with a DC stabilized power source that outputs a DC stabilized power source, and an input converter connected to the output end of the DC stabilized power source via a switching element that is switched in synchronization with the half-wave rectified output of the rectifying means. It is able to directly restore the transmitted signal, and compared to the conventional method of detecting zero-crossing points, it has the effect of improving reliability against noise and eliminating the need for companion circuits. Moreover, since DC stabilization mW is used, it is possible to obtain the voltage of an 11゜ quadruple type photocoupler, and there is an effect that the generation of waveform distortion can be eliminated during waveform restoration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の回路図、ft52図は同上の
動作説明用の波形図、第3図は本発明の基本となるシス
テムの全体構成図、第4図は同上の制御システム装置の
回路構成図、第5図は同上使用の端末ブロックの回路構
成図、第6図は同上使用の伝送信号の7オーマツトを示
す説明図、rjs7図は従来例の回路図、第8図は同上
の動作説明用の波形図であり、1はIII御システム装
α、2は中火制御監視装置、3は端末ブロック、7は4
H号線、8は結合回路、14は直流安定化電源、D、は
ダイオード、Qはトランジスタ、PHはホトカプラであ
る。 代理人 弁理士 石 1)艮 七 第2図 第3図
Fig. 1 is a circuit diagram of an embodiment of the present invention, ft52 is a waveform diagram for explaining the operation of the same as above, Fig. 3 is an overall configuration diagram of the basic system of the present invention, and Fig. 4 is a control system device of the same as above. Figure 5 is a circuit diagram of the terminal block used in the above, Figure 6 is an explanatory diagram showing a 7-ohm transmission signal used in the same, rjs7 is a circuit diagram of a conventional example, and Figure 8 is the same as the above. 1 is a waveform diagram for explaining the operation of
H line, 8 is a coupling circuit, 14 is a DC stabilized power supply, D is a diode, Q is a transistor, and PH is a photocoupler. Agent Patent Attorney Ishi 1) Ai 7 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] (1)多重伝送システム系の中央制御監視装置と、固有
アドレスが設定された分散システム系の各制御システム
装置の端末ブロックとを一対の信号線にて接続し、中央
制御装置から端末ブロックを呼び出すアドレスデータ信
号、制御データ信号および返送待機信号よりなる複極の
伝送信号を各端末ブロックに対して順次サイクリックに
送出し、端末ブロックにて信号線を介して受信された伝
送信号のアドレスデータと自己の固有アドレスデータと
が一致したときその伝送信号の制御データを取り込むと
ともに伝送信号の返送待機信号に同期して制御システム
装置からのデータを返送するようにした制御システムに
おいて、端末ブロックに設けられ、信号線にて送られる
伝送信号を半波整流する整流手段と、伝送信号を整流し
てホトカプラ駆動用の電圧に降圧安定化する直流安定化
電源と、該直流安定化電源の出力端に上記整流手段の半
波整流出力に同期してスイッチングされるスイッチング
素子を介して接続された入力用ホトカプラとを入力系に
備えたことを特徴とする制御システムの結合回路。
(1) Connect the central control and monitoring device of the multiplex transmission system to the terminal block of each control system device of the distributed system system with a unique address set using a pair of signal lines, and call the terminal block from the central control device. A bipolar transmission signal consisting of an address data signal, a control data signal, and a return standby signal is sequentially and cyclically sent to each terminal block, and the address data of the transmission signal received via the signal line at the terminal block is In a control system that captures the control data of the transmission signal when it matches its own unique address data and returns the data from the control system device in synchronization with the return standby signal of the transmission signal, the control system is provided in the terminal block. , a rectifying means for half-wave rectifying the transmission signal sent through the signal line, a DC stabilized power supply for rectifying the transmission signal and stabilizing it down to a voltage for driving the photocoupler, and the above-mentioned at the output end of the DC stabilized power supply. A coupling circuit for a control system, characterized in that the input system includes an input photocoupler connected via a switching element that is switched in synchronization with the half-wave rectified output of a rectifier.
JP17700984A 1984-08-25 1984-08-25 Coupling circuit of control system Pending JPS6154742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17700984A JPS6154742A (en) 1984-08-25 1984-08-25 Coupling circuit of control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17700984A JPS6154742A (en) 1984-08-25 1984-08-25 Coupling circuit of control system

Publications (1)

Publication Number Publication Date
JPS6154742A true JPS6154742A (en) 1986-03-19

Family

ID=16023568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17700984A Pending JPS6154742A (en) 1984-08-25 1984-08-25 Coupling circuit of control system

Country Status (1)

Country Link
JP (1) JPS6154742A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62169549U (en) * 1986-04-17 1987-10-27
EP0547715A2 (en) * 1991-12-19 1993-06-23 NUOVOPIGNONE INDUSTRIE MECCANICHE E FONDERIA S.p.A. Improved interface circuit for control devices of heating appliances, particularly suitable for wall-mounted boilers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62169549U (en) * 1986-04-17 1987-10-27
EP0547715A2 (en) * 1991-12-19 1993-06-23 NUOVOPIGNONE INDUSTRIE MECCANICHE E FONDERIA S.p.A. Improved interface circuit for control devices of heating appliances, particularly suitable for wall-mounted boilers

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