JPS6154314B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates generally to sensing devices and, more particularly, to solid state color image sensing devices.

U.S. Pat. No. 3,985,449, issued to Patrin on October 12, 1976, discloses a solid state color image sensing device in which each element has a It uses an array of semiconductor optical devices that detect a range of wavelengths determined by a bias voltage. Sensing the primary colors can be accomplished by using the same element sequentially at three different bias voltages, or by using groups of three elements, each biased at a different voltage.
can be achieved. The aforementioned US patent suggests that it is advantageous to use groups of three elements so that color information is obtained substantially simultaneously.

As suggested by the aforementioned US patent, the array of three element groups works, but not as well as desired. Since three image parts (Pixels) are used to obtain information for a single region, the resolution is only 1/3 of that obtained if one image part is used. Moreover, the arrangement suggested by the above-mentioned US patent is not effective because only a portion of the light incident on a particular optical element is used to generate a signal. The remaining light incident on such optical elements is wasted. Therefore, conventional devices do not have enough photosensitivity that all the light incident on each optical element is used to generate a signal.

The present invention provides a method for forming multiple buried channels.
The problems of the prior art described above have been overcome by using a semiconductor chip having alternating layers of oppositely conductive silicon. Each channel is sensitive to a particular predetermined wavelength band of light based on its distance from the image receiving surface. Since the channels are superimposed, the resolution is the same as that of a monochromatic image sensing device using a single image section. Furthermore, to generate the image signal, light that is not absorbed in one channel is absorbed in another channel, so that all the light is used to generate the image signal, so no light is wasted. The device also has high photosensitivity.

Buried channel devices, especially buried channel charge coupled devices
device) for more information, see U.S. Patent No. 3792322
Please refer to the issue.

In the present invention, a buried channel charge coupling device (BCCD) typically uses three channels formed by six alternating differently doped silicon semiconductor layers. The first color is
By setting the thicknesses of the first and second layers so as to prevent the third and subsequent layers from entering to an appreciable extent due to different absorption; by setting the thicknesses of the first to fourth layers to prevent the color from entering the fifth and sixth layers to an appreciable extent for absorption; 3 channel color photosensitive
bccd is provided. The first, third and fifth layers are P-doped (acceptor-doped) and the second, fourth and sixth layers (the sixth layer may include a semiconductor substrate) are N-doped. (donor-doped), the first signal channel is connected from the surface of the device to the n-doped second layer, while the P-doped first layer carries the signal charge, if any. , and the second signal channel extends from any part in the n-doped second layer to any part in the n-doped fourth layer, but includes a sanderchched P-doped The third layer is the second signal carrying layer, and finally the third
The signal channel extends from somewhere within the n-doped fourth layer to the n-doped sixth layer, with the sanderch-chipped P-doped fifth layer being the third signal carrying layer. Each of the three signal channels has a width that includes an adjacent non-signal carrier layer, such that photon-generated signal carriers generated within such non-signal carrier layer are connected to the respective signal carrier layer. selectively drift and be processed by those layers.

For example, the first, second and third colors are each blue,
green and red, all the photon generation carriers generated in the first channel by the blue, green and red radiation are transferred to the first channel for processing by the gate electrode on the surface of the device. drift into layers. Similarly, all photon-generated carriers generated in the second channel by green and red radiation drift into the third layer for processing by the gate electrode. All photon-generated carriers generated in the third channel by red radiation then drift into the fifth layer for processing by the gate electrode. Therefore, the gate electrode of bccd is 3
common to all three channels (i.e., including superimposed areas of the device such that the three sets are one after the other) and simultaneously transmit all three color signals in appropriate phase with respect to each other. to be processed.

The configuration of a multi-channel BCCD according to the invention will be described with reference to FIG. 1a, which shows the energy bands. Starting from an original wafer or substrate (6th layer) which may contain, for example, 2×10 ¹⁴ n-type donor impurities per cm ³ , for example a 1 μm thick p-doped (boron) region (5th layer) A layer) is ion-implanted into the wafer, and the doping level of the p-doped region is, for example, 0.6×10 ¹⁶ impurities per cm ³ . Then,
For example, a 2 μm thick n-doped epitaxial layer is produced on top of the p-doped region (layer 5) by heating the wafer in an arsenic-doped silane environment. The doping level of the epigrown layer is ^e.g.
0.8×10 ¹⁶ impurities. Then, for example, 1
The p-doped (boron) region is μm thick and has 1×10 ¹⁶ impurity doping levels per cm ³ .
ions are implanted into the epigrown n-doped layer to form two layers, each of which has a
The third and fourth layers are μm thick. Additionally, an n-doped layer is epitaxially grown on top of the p-doped third layer by heating the wafer in an arsenic-doped silane environment, and this epigrown layer is, for example, 1.3 μm thick. be. For example, by implanting ions into the epigrown layer to a depth of 0.3 μm (3.5×10 ¹⁶ boron impurity per cm ³ ), such a layer can be formed by, for example, 0.3 μm thick and 1 μm thick (i.e. and a second layer). A gate oxide layer 10 is then produced or deposited on top of the device, and then a transparent conductive gate electrode 12 is provided over the oxide layer.

Assembly of the gate oxide layer and conductive gate structure includes:
Type of charge coupling device (CCD), i.e. 2 phase,
Determined by three-phase, four-phase, or interline transition. The appearance of this structure is well known in the art.

Adequate electrical contact must be made to the layers. This is achieved at the input or output end of each line of optical elements or gate electrodes, away from the area of the gate or charge drain electrodes. By so forming an electrical contact, the p-doped first, third and fifth layers are reverse biased with respect to the second and fourth layers and the substrate. [The substrate, second and fourth layers are held at, for example, earth potential, and the first, third and fifth layers are held at a negative voltage in relation to the second and fourth layers and the substrate. Retained. ] The unbiased energy band is shown in FIG. 1b. Application of a reverse bias causes active charge to be drained from the layer, giving the side view of the energy band shown in FIG. 1a. The exact shape of the energy band depends precisely on the doping levels of the various layers, the substrate doping, the thickness of the gate oxide layer, and the voltage applied to the charge and drain electrodes. Once these parameters are known,
Energy band diagrams can be obtained by methods well known in the art.

With a gate oxide thickness of 0.2 μm and a small negative “bias” voltage, the layer thickness and doping level of FIG.
At 0.7 μm and 2.6 μm the associated minima occur in the energy band. The first photosensitive channel is approximately 0.7 μm wide, bounded by the inner surface of the oxide layer 10 and the first energy minimum, ie, the minimum closest to the oxide layer. The second photosensitive channel is approximately 1.9 μm wide bounded by two potential minima. The third photosensitive channel is bounded in FIG. 1a on the left by the minimum of the second energy band and on the right depending primarily on the smaller carrier diffusion length of a few microns in the substrate. The width is 10 μm or more.

The image sensing device formed by the aforementioned bccd is illuminated from the gate side. Both the insulating gate oxide layer and the gate electrode are vertically transparent to visible light. Photons in the visible spectrum are completely absorbed within the layered structure since the penetration depth is between 0.2 μm and 5 μm for a wavelength range between 0.4 μm and 0.7 μm. Blue radiation (0.40~0.49μ
m) is mostly absorbed in the 0.7 μm wide first channel closest to the gate oxide layer. Green radiation is substantially absorbed in the first and second channels proximate to the gate oxide layer. Only red radiation
It penetrates deeper than the boundary between the second and third channels, which lies at 2.6 μm, and is therefore absorbed within the third channel.

For p-channel devices, an absorption event generates a hole as a single charge. Holes are generated at the depth or location within the semiconductor where the absorption event occurs. When a signal hole 14 is formed in the first channel (by red, green or blue photons), it
Drift to potential well 16 (relative to the hole) of the first channel, and similarly,
A signal hole 18 formed in the second channel by a green or red photon drifts into the potential well 20 of the second channel and formed in the third channel (by a red photon). The signal hole 22 is connected to the potential of the third channel.
Drift to well 24. Signal charge accumulates in the channel as radiation impinges on the region under the gate electrode.

Three potentials for accumulating signal charge:
The electrostatic potential of the well can be manipulated by controlling the voltage on the gate electrode. It should be understood that the potential wells associated with all three color channels are controlled by a single gate voltage and therefore the signal holes are also operated simultaneously, e.g. Holes can migrate from a region under one gate to a region under an adjacent gate, just as for conventional charge coupling devices, as is well known in the art.

Referring to FIGS. 2-4, a three-phase linear BCCD imager according to the present invention includes an n-doped silicon wafer (chip) 26 with p-
Doped layer 28 is implanted. An epigrown n-doped layer 30 formed on layer 28 has a p-doped layer 32 ion-implanted therein, and an epigrown n-doped layer 34 formed on layer 32.
has a p-doped layer 36 ion-implanted therein. As suggested in connection with FIG. 1a, layers 28, 32 and 36 each have a
The epigrown layers 30 and 34 are 2 μm thick.

The surface of the device is covered with a transparent oxide layer 38 of SiO ₂ which is the gate oxide, which layer then
Covered with linear rows of transparent gate electrodes 40 suitably interconnected for charge transfer.

A layer 36 extends thereto at one end of the X side of the device. Similarly, layer 28 extends into one end of the Y side of the device. Layer 32 extends at one end of the device towards terminus ZZ.

p-doped diffusions 42, 44 that act as conductors
and 46 extend from windows in non-conductive oxide layer 38 to p-doped layers 28, 32 and 36, respectively. Resistive metal contacts 48, 50 and 5
2 are formed in diffusions 42, 44 and 46, respectively. Channel stop diffusion 47, shown only in FIG. 2, limits photon generation charge to processing by gate electrode 40.

The apparatus of FIGS. 2-4 is typically used for line scanning of images. Typical operation of the device of the present invention has a reverse bias negative voltage applied to contacts (terminals) 48, 50, and 52. Such a voltage depletes active carriers from the signal processing channel formed by layers 28, 32 and 36;
This forms the energy band shown in FIG. 1a. After a period during which photon-generating holes are collected into the channel formed by layers 28, 32 and 36, a negative voltage is applied to the electrode, e.g. below gate electrode 40A (to which zero voltage is normally applied). 40A, while electrode 40B is brought to (or remains at) zero volts. This simultaneously shifts the signal hole in each channel formed by layers 28, 32, and 36 from below gate 40A to below gate 40B. Further processing exists according to techniques known in the art.

As previously mentioned, the present invention provides many improvements over conventional solid state color image sensing devices, namely improved spatial resolution and highly efficient quantum efficiency.

Once the adjusted "superimposed" color signals are simultaneously output from the device, these signals are applied to a matrix circuit containing the appropriate coefficients for the separate colors, as is known in the art. One such matrix circuit is shown schematically in FIG.

Although the invention has been described in detail with particular reference to preferred embodiments thereof, it will be understood that various modifications may be made within the spirit and scope of the invention. For example, although a linear image sensing device is shown in FIGS. 2-4, the concepts of the present invention may be embodied in an area image sensing array, for example in the manner shown in FIG. And, while a p-channel device has been described in connection with FIGS. 1-4, an n-channel device according to the present invention has all the impurity types shown in FIGS. 1 to 4, except that the bias voltage is positive and the bias voltage is positive.
The device is the same as shown in the figure. Also, although a three-channel device has been described, similar devices with any number of channels are within the scope of the invention, provided, of course, that such channels select colors. And, if necessary, filters are provided on the device, for example to limit the response of the device to the visible spectrum. Furthermore, the three-phase device
Although shown in FIGS. 4-4, either two- or four-phase configurations, as well as interline transfer image sensing devices, may embody the invention.

[Brief explanation of the drawing]

Figures 1a and 1b are diagrams useful in explaining the invention. FIG. 2 is a plan view of an embodiment of the invention. 3 is a schematic front view of the embodiment of the invention of FIG. 2; FIG. Figure 4 shows line 4-4 in Figure 2.
3 is a cross-sectional view of the embodiment of FIG. 2 taken along FIG. FIG. 5 is a diagram showing a region array according to the present invention. Explanation of symbols, X, Y... side of device, Z... end of device, 10... gate oxide layer, 12...
Gate electrode, 14... Signal hole (first channel), 16, 20, 24... Potential well, 18... Signal hole (second channel), 2
2...Signal hole (third channel), 26...
N-doped silicon wafer (base material), 28...
p-doped layer (p-doped region), 30... epigrown n-doped layer (epitaxial layer), 3
2... p-doped layer (p-doped region), 34...
...Epigrown n-doped layer, 36...P-doped layer, 38...Transparent oxide layer (SiO ₂ ), 40...
...transparent gate electrode, 40A, 40B... gate electrode, 42, 44, 46... p-doped diffusion, 4
7... Channel stop diffusion, 48, 50, 5
2... Resistance metal contact.

Claims (1)

Claims: 1. A color image sensing device having an image-receiving surface, comprising a semiconductor chip having alternating layers of oppositely conductive silicon forming multiple buried channels, each channel connected to said image-receiving surface. A color image sensing device characterized in that it is sensitive to light in a special predetermined wavelength band based on its distance from the object. 2. A channel closest to the image-receiving surface responsive to red, green and blue light, a channel furthest from the image-receiving surface responsive only to red light, and an intermediate channel responsive only to red and green light. 2. A color image sensing device according to claim 1, characterized by three buried channels. 3. the semiconductor chip has six alternating layers of conductive silicon, the first layer closest to the image-receiving surface having a thickness of less than about 0.7 μm; Claim 1, wherein the third layer has a total thickness of less than about 2.6 μm, and the first, second, third and fourth layers have a total thickness of greater than 2.6 μm. The color image detection device according to item 1.