JPS6153816A - Josephson saw-tooth wave current generating circuit - Google Patents

Josephson saw-tooth wave current generating circuit

Info

Publication number
JPS6153816A
JPS6153816A JP17537784A JP17537784A JPS6153816A JP S6153816 A JPS6153816 A JP S6153816A JP 17537784 A JP17537784 A JP 17537784A JP 17537784 A JP17537784 A JP 17537784A JP S6153816 A JPS6153816 A JP S6153816A
Authority
JP
Japan
Prior art keywords
current
josephson
voltage
current line
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17537784A
Other languages
Japanese (ja)
Inventor
Yasuo Tazo
康夫 田雑
Takuji Nakanishi
中西　卓二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP17537784A priority Critical patent/JPS6153816A/en
Publication of JPS6153816A publication Critical patent/JPS6153816A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape

Abstract

PURPOSE:To obtain a constant output voltage by providing a two-terminal Josephson gate circuit in series relation with a load inductor, and causing transition from a zero-voltage state to a voltage-presence state every time a sea-tooth wave output current is obtained at the load inductor. CONSTITUTION:The two-terminal Josephson gate circuit 1 with a control current line which is composed by using a Josephson junction element is provided with a bias current line 2 and a control current line 3. A rectangular wave input current is inputted to the current line 3 while the current line 2 is supplied with a rectangular wave bias current Ig, and then transition from the zero voltage state to the voltage presence state is caused, generating the constant output voltage between both terminals. Further, the two-terminal Josephson gate circuit 31 having a control current line 33 is connected to the load inductor 21 in series, and the transition from the zero-voltage state to the voltage-presence state is caused every time the current Is is obtained at the inductor 21, generating the constant output voltage Vg.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ジョセフソン接合素子を用いて構成されたジ
ョセフソン鋸歯状波電流発生回路に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a Josephson sawtooth current generating circuit constructed using Josephson junction elements.

従来の技術 ジョセフソン接合素子を用いて構成されたジョセフソン
鋸歯状波電流発生回路として、従来、第２図を伴なって
次に述べる構成を有するものが提案されている。BACKGROUND OF THE INVENTION Conventionally, a Josephson sawtooth wave current generating circuit constructed using a Josephson junction element has been proposed having the configuration described below with reference to FIG.

すなわち、バイアス電流線２と、制御電流線３とを有し
、バイアス電流線２に矩形波状バイアス電流ＩＯが供給
されている状態で、制御電流線３に矩形波状入力電流１
ｃが入力されることによって、零電圧状態から有電圧状
態に転移し、両端間に定電圧出力電圧Ｖ（＋を発生させ
る、ジョセフソン接合素子を用いて構成された制御電流
線付２端子ゲート回路１を有する。That is, it has a bias current line 2 and a control current line 3, and in a state where a rectangular waveform bias current IO is supplied to the bias current line 2, a rectangular waveform input current 1 is supplied to the control current line 3.
A two-terminal gate with a controlled current line configured using a Josephson junction element that transitions from a zero voltage state to a voltage state by inputting c and generates a constant voltage output voltage V (+) between both terminals. It has a circuit 1.

この制御電流線付２端子ジョセフソンゲート回路１は、
原理的な一例として、第３図を伴なって次に述べる構成
を有する。This two-terminal Josephson gate circuit 1 with control current line is as follows:
As an example of the principle, it has the configuration described below with reference to FIG.

すなわち、インダクタ４とジョセフソン接合素子５との
直列回路６と、他のインダクタ７と他のジョセフソン接
合素子８との他の直列回路９との並列回路１０を有し、
その並列回路１０が、バイアス電流線２に介挿され、そ
して、そのバイアス電流線２が、バイアス電流路１１に
介挿されている。That is, it has a parallel circuit 10 including a series circuit 6 of an inductor 4 and a Josephson junction element 5, and another series circuit 9 of another inductor 7 and another Josephson junction element 8,
The parallel circuit 10 is inserted into the bias current line 2, and the bias current line 2 is inserted into the bias current path 11.

また、インダクタ４及び７にそれぞれ磁気結合している
インダクタ１２及び１３の直列回路１４を有し、その直
列回路１４が制ｉｌｌ電流線３に介挿され、そして、そ
の制御電流線３が、入力電流路１５に介挿されている。It also has a series circuit 14 of inductors 12 and 13 magnetically coupled to the inductors 4 and 7, respectively, and the series circuit 14 is inserted into the control current line 3, and the control current line 3 is connected to the input It is inserted into the current path 15.

この場合、バイアス電流線２に供給されるバイアス電流
Ｉ（＋と制御電流線３に供給される入力電流１ｃとに基
く、第４図において、曲線１へ ８及び１９で示されている閾値電流特性が得られるよう
に、インダクタ４．９．１２及び１３、ジョセフソン接
合素子５及び８などの特性が定められている。In this case, based on the bias current I(+ supplied to the bias current line 2) and the input current 1c supplied to the control current line 3, the threshold current indicated by 8 and 19 to curve 1 in FIG. The characteristics of the inductors 4, 9, 12 and 13, the Josephson junction elements 5 and 8, etc. are determined so that the characteristics can be obtained.

なお、制御電流線付２端子ゲ一１〜回路１は、そのバイ
アス電流Ｉ（＋と入力電流ＩＣとにもどずく動作点が、
第４図の曲線１８及び１９で囲まれている範囲内にある
とき、零電圧状態をとるが、曲ｔｌＡ１８及び１９で囲
まれた範囲外にあるとき、有電圧状態をとる。Note that the operating point of the two-terminal gate 1 to circuit 1 with a control current line, which depends on the bias current I(+) and the input current IC, is
When it is within the range surrounded by curves 18 and 19 in FIG. 4, it assumes a zero voltage state, but when it is outside the range surrounded by curves tlA18 and 19, it assumes a voltage applied state.

以上が、制御電流線付２端子ゲート回路１の原理的な一
例構成である。The above is an exemplary basic configuration of the two-terminal gate circuit 1 with a control current line.

また、制御電流線付２端子ジョセフソンゲート回路１と
並列関係に接続され、制御電流線付２端子ジョセフソン
ゲート回路１に発生する定電圧出力電圧ＶＯにもとずき
、鋸歯状波出力電流Ｉｓを流す負荷インダクタ２１を有
する。In addition, based on the constant voltage output voltage VO generated in the two-terminal Josephson gate circuit 1 with a control current line, which is connected in parallel with the two-terminal Josephson gate circuit 1 with a control current line, a sawtooth wave output current is generated. It has a load inductor 21 through which Is flows.

この負荷インダクタ２１は、制御電流線付２端子ゲート
回路１が第３図で上述した構成を有する場合、イの並列
回路１０と並列に接続されている。This load inductor 21 is connected in parallel with the parallel circuit 10 in A when the two-terminal gate circuit 1 with a control current line has the configuration described above in FIG.

以上が、従来提案されているジョセフソン鋸５−．．Ｊ 歯状波電流発生回路の構成である。The above is the conventionally proposed Josephson saw 5-. ．． J This is the configuration of a tooth wave current generation circuit.

このような構成を有するジョセフソン鋸歯状波電流発生
回路によれば、次に述べる動作を行う。According to the Josephson sawtooth wave current generating circuit having such a configuration, the following operation is performed.

■バイアス電流路１１に、矩形波状バイアス電流ｒｂを
供給するものとして、そのバイアス電流１ｂが、第５図
Ａの時点ｔ１前で示すように、零の値を有しており、ま
た、入力電流路１５に、矩形波状入力電流１ｃを供給す
るものとして、その入力電流Ｔｃが、第５図Ｂの時点ｔ
３前で示すように、零の値を有している場合、制御ＩＩ
電流線付２端子ジョセフソンゲート回路１のバイアス電
流線２にバイアス電流１ｏが、第５図Ｃの時点ｔ１前で
示すように、零の値を有し、また、負荷インダクタ２１
に流れる出力電流ＩＳも、第５図の時点ｔ１前で示すよ
うに零の値を有する。　この場合、制御電流線付２端子
ジョセフソンゲート回路１は、その動作点が、第４図の
点Ａにあり、従って、零電圧状態をとっている。■ Assuming that a rectangular waveform bias current rb is supplied to the bias current path 11, the bias current 1b has a value of zero as shown before time t1 in FIG. 5A, and the input current Assuming that the rectangular waveform input current 1c is supplied to the line 15, the input current Tc is at the time t in FIG. 5B.
3. As shown before, if control II has a value of zero,
The bias current 1o in the bias current line 2 of the two-terminal Josephson gate circuit 1 with current line has a value of zero, as shown before time t1 in FIG.
The output current IS flowing through the output current IS also has a value of zero, as shown before time t1 in FIG. In this case, the operating point of the two-terminal Josephson gate circuit 1 with control current line is at point A in FIG. 4, and is therefore in a zero voltage state.

■このＪ：うな状態から、バイアス電流路１１に、矩形
波状バイアス電流１ｂが、第５図Ａに示ずように、時点
ｔ１から時点ｔ２までの間、零の値から定常値ｒＢまで
（ｒ上がり、時点ｔ２から時点１６までの間、定常値Ｉ
Ｂをとり、時点１：６から時点ｔ８までの間、定常値Ｉ
Ｂから雲の値に立下り、時点ｔ８から零の値をとるもの
として供給されれば、そのバイアス電流■Ｂが、２端子
ジョセフソンゲート回路１と負荷インダクタ２１とから
４にるループの磁束が零になるように、２＠子ジヨセフ
ソンゲ一ト回路１と負荷インダクタ２１とに、それぞれ
バイアス電流■０と出力電流１ｓとして、時点ｔ１から
分流して流れる。■ From this J: state, the rectangular waveform bias current 1b is applied to the bias current path 11 from the zero value to the steady value rB (r from time t2 to time 16, the steady value I
B, and from time 1:6 to time t8, the steady value I
If the bias current B falls to the cloud value from B and takes the value zero from time t8, then the bias current B is the magnetic flux of the loop from the two-terminal Josephson gate circuit 1 and load inductor 21 to Bias current 0 and output current 1s are shunted and flowed from time t1 into the 2@Joseph song gate circuit 1 and the load inductor 21, respectively, so that the current becomes zero.

この場合、２端子ジョセフソンゲート回路１のインダク
タンスをｉｏ、負荷インダクタ２１のインダクタンスを
しＳとするとき、ゲート電流１（ｌ及び出力電流Ｉｓは
、バイアス電流ｒｔ＋が定常値Ｉ８をとる時点ｔ２から
次に示す値を呈する。In this case, when the inductance of the two-terminal Josephson gate circuit 1 is io and the inductance of the load inductor 21 is S, the gate current 1 (l) and the output current Is are calculated from the time t2 when the bias current rt+ takes a steady value I8. It has the following values.

ＩＱ　＝Ｉｊ　／　（１−３＋Ｌ（１−・Ｉ−・・・・
・・・・・・・・・・・（１）Ｉｓ　＝Ｌｏ　／　（Ｉ
−ｓ　＋Ｌ（＋−・Ｉ−・・・・・・・・・・・・・・
・（２）この場合、２端子ジョセフソンゲート回路１の
インダクタンスＩ！＋と負荷インダクタ２１のインダク
タンスＬＳとの間に、Ｉｓ＞＞ｌ−ｇ・・・・・・・・
・・・・・・・（３）の関係を右１！シめれば、グー１
〜電流Ｉｇ及び出力電流ｌＳは、（１）及び（２）式に
もとずき、 １（＋さ■−・・・・・・・・・・・・・・・（４）Ｉ
ｓ−０・・・・・・・・・・・・・・・（５）で表され
る値を早し、そして、この場合、制御電流線付２端子ジ
ョセフソンゲート回路１は、イの動作点が第４図の点Ｂ
にあり、従って、零電圧状態をとっている。IQ = Ij / (1-3+L(1-・I-...
・・・・・・・・・・・・(1) Is = Lo / (I
-s +L(+-・I-・・・・・・・・・・・・・・・・
・(2) In this case, the inductance I of the two-terminal Josephson gate circuit 1! + and the inductance LS of the load inductor 21, Is>>l-g...
......The relationship in (3) is right 1! If you close it, goo 1
~Current Ig and output current IS are based on formulas (1) and (2),
In this case, the two-terminal Josephson gate circuit 1 with a control current line is The operating point is point B in Figure 4.
Therefore, it is in a zero voltage state.

なお、以下簡単のため、この動作■において、制御電流
線付２端子ジヨセフソングー１へ回路１の動作点が、第
４図の点Ｂにあるとして説明する。For the sake of simplicity, the following explanation will be given assuming that the operating point of the circuit 1 to the two-terminal Josephson gear 1 with a control current line is at point B in FIG. 4 in this operation (2).

■上述したように、バイアス電流路１１に、矩形波状バ
イアス電流Ｔｂを時点ｔ１から供給した状態で、入力電
流路１５、従って、制御電流線付２端子ゲート回路１の
制御電流線３に、矩形波状入力電流１ｃを、第５図Ｂに
示すように、時点ｔ３から時点ｔ４までの間、零の値か
ら定常値１ｃ　Ｌ　まで立上り、時点ｔ４から時点ｔｃ
までの間、定常値■Ｃ′をとり、時点ｔｃから時点ｔｃ
′までの間、定常値１ｃｌから零の値をとり、時点ｔｃ
’後零の値をとるものとして供給する。(2) As described above, while the rectangular wave bias current Tb is supplied to the bias current path 11 from time t1, the input current path 15, and therefore the control current line 3 of the two-terminal gate circuit with control current line 1, As shown in FIG. 5B, the waveform input current 1c rises from a zero value to a steady-state value 1c L from time t3 to time t4, and from time t4 to time tc
Until then, the steady value ■C' is taken, and from time tc to time tc
', it takes a value of zero from the steady value 1cl, and at time tc
'Supplied as a value with a trailing zero.

しかるときは、制御ｉＩｌ電流線付２端子ジョセフソン
ゲート回路１が、それに用いているジョセフソン接合素
子が零電圧状態から有電圧状態に転移することによって
、動作点が第４図の点Ｂから点Ｃに転移し、よつで、零
電圧状態から有電圧状態に転移し１、その制御電流線付
２端子ジョセフソンゲート回路１の両端間に、制御Ｉｌ
電流Ｉｉｌ付２端子ジョセフソンゲート回路１に用いて
いるジョセフソン接合素子が、そのジョセフソン接合の
エネルギバンドギャップに相当する電圧値において定電
圧特性を呈するので、その定電圧特性を呈する電圧値に
対応している値の定電圧出力電圧Ｖｇが発生する。In this case, the operating point of the two-terminal Josephson gate circuit 1 with control current line changes from point B in FIG. The state transitions to point C, and then the zero voltage state transitions to the voltage state 1, and the control Il is applied between both ends of the two-terminal Josephson gate circuit 1 with the control current line.
The Josephson junction element used in the two-terminal Josephson gate circuit 1 with current Iil exhibits constant voltage characteristics at a voltage value corresponding to the energy band gap of the Josephson junction. A constant voltage output voltage Vg of a corresponding value is generated.

このため、その定電圧出力電圧Ｖ（＋にもとずき、負荷
インダクタ２１に鋸歯状波出力電流Ｉｓが、第５図りに
示すように、時点ｔ３またはその時点ｔ３から僅かに遅
れた時点ｔ３′　（図の場合、時点ｔ　３′）から時点
ｔ５までの間、零の値から直線的にバイアス電流ｙｂの
定常値ＩＢの値まで増加して流れ、時点ｔ５からバイア
ス電流Ｉｂの定常値ＩＢの値に落着く。Therefore, based on the constant voltage output voltage V(+), the sawtooth wave output current Is to the load inductor 21 is generated at the time t3 or at a time t3 slightly delayed from the time t3, as shown in the fifth diagram. ' From time t3' (in the case of the figure) to time t5, the bias current yb increases linearly from zero to the steady-state value IB, and from time t5 the bias current Ib reaches the steady-state value IB. It settles on the value of .

この場合、制ｍＴｉ流線付２端子ジョセフソンゲート回
路１に流れるバイアス電流Ｉ０が、第５図Ｃに示すＪ：
うに、出力電流■Ｓの値が増加づるに応じて、時点ｔ３
または時点１３′　（図の場合時点１−３’）までの間
、定常値ＩＢから零の（的まで直線的に減少し、時点１
：５から零の値をどる。In this case, the bias current I0 flowing through the two-terminal Josephson gate circuit 1 with mTi flow control is J as shown in FIG. 5C:
As the value of the output current ■S increases, the time t3
Or, until time 13' (time 1-3' in the figure), it decreases linearly from the steady value IB to zero (target), and at time 1
: Returns the value from 5 to zero.

このため、制御電流線ｆＮｉ　２端子グー１〜回路１の
動ｆＴ　＋ＡＴが、第４図の点Ｃから点りに移り、よっ
て、制御電流線付２端子ジョセフソンゲート回路１が、
有電圧状態から零電圧状態に転移Ｊ−る。Therefore, the dynamic fT +AT of the control current line fNi 2-terminal goo 1 to circuit 1 moves from point C in FIG.
Transition from a voltage-applied state to a zero-voltage state.

■また、上述したＪ：うに、バイアス電流路１１に矩形
波状バイアス電流１ｂを供給し、また、入力電流路１５
、従って制御電流線３に矩形波状入力電流Ｊｃを供給し
てから制御電流線付２端子ジヨセフソングー１−回路１
に対重るバイアス電流ｒｂが、時点ｔ６から立下れば、
グーｉ・電流ＩＯの値が、時点ｔ６から、零の値から負
方向に立下る。■Also, the rectangular waveform bias current 1b is supplied to the bias current path 11, and the input current path 15 is
, Therefore, after supplying the rectangular waveform input current Jc to the control current line 3, the two-terminal Josephson 1-circuit 1 with control current line is connected.
If the bias current rb with respect to falls from time t6,
The value of the goo i/current IO falls in the negative direction from the zero value from time t6.

そして、制御電流線付２＠子ジヨセフソング一１〜回路
１の動作点が、時点ｔ７で、第４図の点りから点Ｆに移
る。Then, the operating point of the circuit 1 with the control current line 2@child Joseph Song 1 moves from the dot in FIG. 4 to the point F at time t7.

このため、制御電流線付２端子ゲートジョセフソン回路
１が、時点ｔ７から、零電圧状態から有電圧状態に転移
Ｍ−る。Therefore, the two-terminal gate Josephson circuit 1 with a control current line transitions from the zero voltage state to the voltage state M- from time t7.

従って、ゲート電流ＩＣＩが、時点１−７から時点ｔ１
２までの間、負の値から零の値をとり、時点１１２から
零の値をとり、よって、制御電流線付２端了グー１−回
路１の動作点が時点ｔ１２から、第４図の点Ｆから点り
に転移し、制御電流線付２端子グート回路１が１ｈ点ｔ
１２から、有電圧状態から零電圧状態に転移する。Therefore, the gate current ICI changes from time 1-7 to time t1
2, it takes a value of zero from a negative value, and takes a value of zero from time 112, so that the operating point of circuit 1 changes from time t12 to the value shown in FIG. Transfers from point F to point t, and 2-terminal goot circuit 1 with control current wire goes to 1h point t.
From 12 onwards, the voltage state transitions from the voltage state to the zero voltage state.

。また、出力電流Ｔｓが時点ｔ７から時点ｔ１０までの
間、定常値ＩＢの値から負の値まで立下る値をとり、時
点ｔ１０から時点ｔ１１までの間、負の値から零の値を
とり、時点ｔ１１後零の値をとる。. Further, the output current Ts takes a value falling from the steady-state value IB to a negative value from time t7 to time t10, and takes a value from a negative value to zero from time t10 to time t11, It takes a value of zero after time t11.

■さらに、上述した動作■が得られて後、入　　　　　
１カ電流１ｃが時点ｔｃ’から零の値になれば、時点ｔ
ｃ’　が時点ｔ１２よりも進んでいる時点であれば、時
点ｔ１２から、また、時点１−Ｃ′が時点ｔ１２よりも
遅れている時点であれば、時点ｔｃ’から、ゲート電流
ＩＯ及び出力電流１ｓが、ともに零の値をとり、制御Ｉ
電流線付２端子ゲー］・回路１の動作点が、第４図の点
りからＡ点に復帰し、上述した動作■の初期状態に復帰
する。■Furthermore, after the above operation ■ is obtained,
If the current 1c becomes zero from the time tc', then the time t
If c' is ahead of time t12, then from time t12, and if time 1-C' is behind time t12, then from time tc', the gate current IO and the output current are 1s both take a value of zero, and the control I
2-terminal game with current line] - The operating point of the circuit 1 returns from the dot in FIG. 4 to point A, returning to the initial state of operation (2) described above.

■また、上述した動作■が終了して後、再瓜バイアス電
流路１１及び入力電流路１５に、それぞれバイアス電流
１ｂ及び入力電流ＩＣを」二連したように供給すれば、
再疫上述した動作■〜■が得られる。(2) Furthermore, after the above-mentioned operation (2) is completed, if the bias current 1b and the input current IC are supplied to the re-melting bias current path 11 and the input current path 15, respectively, in two series,
Reinfection The above-mentioned operations ① to ② are obtained.

上述したように、第２図に示す従来のジョセフソン鋸歯
状波電流発生回路の構成によれば、バイアス電流路１１
にバイアス電流ｒｈを供給してから、入力電流路１５に
入力電流１ｃを供給すれば、鋸歯状波出力電流１ｓが１
！？られる。As described above, according to the configuration of the conventional Josephson sawtooth current generation circuit shown in FIG.
By supplying the bias current rh to the input current path 15 and then supplying the input current 1c to the input current path 15, the sawtooth wave output current 1s becomes 1
! ? It will be done.

従って、ジョセフソン鋸歯状波電流発生回路どしての機
能を早づる。Therefore, the function of the Josephson sawtooth current generating circuit is accelerated.

発明が　決しようと１」パ引１点 しかしながら、第１図に示すジョセフソン鋸歯状波電流
発生回路の場合、上述した動作■が得られる場合におい
て、バイアス電流１ｂが、時点ｔ６から、定常値ＩＢか
ら立下る値になれば、バイアス電流■９の値が、時点ｔ
６から、零の値ｆ’ｓ　＋ら負の方向に立上るが、バイ
アス電流Ｉｂの定常値が低くなったりして、バイアス電
流１０の値が、制御電流線付２端子ジョセフソンゲート
回路１を零電圧状態から有電圧状態に転移させない値に
なるおそれを有する。すなわち、制御電流線付２端子ゲ
ート回路１の、動作点が、第４図の点Ｆに達せず、点Ｅ
にしか達しななるおそれを有する。However, in the case of the Josephson sawtooth wave current generating circuit shown in FIG. If the value falls from IB, the value of bias current ■9 will be at time t.
6, the value of bias current 10 rises in the negative direction from the zero value f's +, but the steady-state value of bias current Ib becomes low, and the value of bias current 10 changes to 2-terminal Josephson gate circuit 1 with control current line. There is a risk that the voltage will reach a value that does not allow transition from a zero voltage state to a voltage applied state. That is, the operating point of the two-terminal gate circuit 1 with control current line does not reach point F in FIG.
There is a risk that it will only reach the limit.

そして、このように制御電流線付２端子ゲート回路１の
動作点が、点Ｅにしか達しな【ノれば、出力電流ｆｓが
、時点ｔ７から立下るり値を呈せず、点線図示のにうに
、時点ｔｌ後も定常値ＩＢの値を保つ。なお、この場合
、バイアス電流Ｉｇは、制御電流線付２端子ゲート回路
１の動作点Ｆが得られる時点ｔ６’から、点線図示のよ
うに、時点ｔ６’　での値を保つ。If the operating point of the two-terminal gate circuit 1 with a control current line reaches only the point E, the output current fs does not exhibit a falling value from time t7, and as shown by the dotted line, In addition, the steady-state value IB is maintained even after time tl. In this case, the bias current Ig maintains the value at time t6', as shown by the dotted line, from time t6' when the operating point F of the two-terminal gate circuit 1 with a control current line is obtained.

問題を解決づ−るための手段 よって、本発明は、上述した欠点のない、新規なジョセ
フソン鋸歯状波電流発生回路を提案せんとするものであ
る。By means of solving the problem, the present invention seeks to propose a new Josephson sawtooth current generation circuit, which does not have the above-mentioned drawbacks.

本発明によるジョセフソン鋸歯状波電流発生回路は、第
２図で」二連したジョセフソン鋸歯状波電流発生回路の
場合と同様に、同様の制御電流線付２端子ゲート回路と
負荷インダクタとを有する、構成を有する。The Josephson sawtooth current generation circuit according to the present invention is constructed by using a similar two-terminal gate circuit with a control current line and a load inductor as in the case of the double Josephson sawtooth current generation circuit shown in FIG. have, have a configuration.

しかしながら、本発明によるジョセフソン鋸歯状波電流
発生回路は、このような構成を有するジョセフソン鋸歯
状波電流発生回路において、その負荷インダクタを直列
関係に、バイアス電流線を有し、負荷インダクタに上述
した鋸歯状波出力電流が得られる毎に、零電圧状態から
有電圧状態に転移し、定電圧出力電圧を発生する２端子
ジョセフソンゲート回路が接続されている構成を有する
。However, the Josephson sawtooth current generation circuit according to the present invention has a load inductor connected in series with a bias current line, and the load inductor has the above-described connection. Each time a sawtooth waveform output current is obtained, a two-terminal Josephson gate circuit is connected which transitions from a zero voltage state to a voltage state and generates a constant voltage output voltage.

飢−朋 このような構成を有する本発明によるジョセフソン鋸歯
状波電流発生回路によれば、それが上述した構成を有す
るので、詳細説明は省略するが。第２図で上述したジョ
セフソン鋸歯状波電流発生回路の場合と同様に、ジョセ
フソン鋸歯状波電流発生回路としての機能が得られる。Since the Josephson sawtooth current generating circuit according to the present invention having such a configuration has the above-described configuration, a detailed description thereof will be omitted. As in the case of the Josephson sawtooth current generation circuit described above with reference to FIG. 2, the function as a Josephson sawtooth current generation circuit is obtained.

しかしながら、第２図で上述した場合のおそれを有しな
い。However, it does not have the risk of the case described above in FIG.

本発明の効果 このため、本発明によるジョセフソン鋸歯状波電流発生
回路によれば、ジョセフソン鋸歯状波電流発生回路とし
ての機能が、上述したおそれなしに、１ｑられる。Effects of the Invention Therefore, according to the Josephson sawtooth wave current generation circuit according to the present invention, the function as a Josephson sawtooth wave current generation circuit can be improved by 1q without the above-mentioned risks.

実施例 次に、第１図及び第８図を伴なって本発明の第１及び第
２の実施例を述べよう。Embodiments Next, the first and second embodiments of the present invention will be described with reference to FIGS. 1 and 8.

第１図及び第８図において、第２図との対応部分には同
一符号を付して詳細説明を省略する。In FIGS. 1 and 8, parts corresponding to those in FIG. 2 are denoted by the same reference numerals, and detailed description thereof will be omitted.

第１図に示１本発明によりるジョセフソン鋸歯状波電流
発生回路は、負荷インダクタ２１と直列関係に、バイア
ス電流線３２を有する２端了ジヨセフソンゲ一ト回路３
１が接続されている。FIG. 1 shows a Josephson sawtooth current generating circuit according to the present invention.
1 is connected.

この２端子ジョゼフソンゲート回路３１は、第６図に示
すように、ジョセフソン接合素子４１のみからなる構成
として得る。This two-terminal Josephson gate circuit 31 is obtained as a structure consisting only of a Josephson junction element 41, as shown in FIG.

また、第８図に示す本発明によるジョセフソン鋸歯状波
電流発生回路は、第１図に示す構成において、ぞの２端
子ジョセフソンゲ−１〜回路３１が、リセット用電流の
供給される電流路３４に介挿された制御電流線３３を有
する制御電流線付２端子ゲート回路３１′に置換されて
いることを除いて、第１図の場合と同様の構成を有する
。この場合、制御電流線付２端子ゲート回路３１′は、
第３図の構成に準じた第９図に示す構成を有する。Furthermore, in the Josephson sawtooth wave current generating circuit according to the present invention shown in FIG. 8, in the configuration shown in FIG. The circuit has the same configuration as that in FIG. 1, except that the control current line 34 is replaced with a two-terminal gate circuit 31' having a control current line 33 inserted therein. In this case, the two-terminal gate circuit 31' with control current line is
It has the configuration shown in FIG. 9, which is similar to the configuration shown in FIG. 3.

第１図及び第８図に示す本発明による光起電力発生用半
導体装置は、それぞれ第７図及び第一　　１６　− １０図に示す効果が得られる。The semiconductor device for photovoltaic power generation according to the present invention shown in FIGS. 1 and 8 can obtain the effects shown in FIGS. 7 and 16-10, respectively.

【図面の簡単な説明】[Brief explanation of the drawing]

手続ネｄｉ正書（方式） １．事件の表示　　特願昭５９−１７５３７７号２、発
明の名称 ジョセフソン鋸歯状波電流発生回路 ３、補正をする者 事イ′１どの関係　特許出願人 住　所　東京都千代田区内幸町１丁目１番６号名　称　
（４２２）日木電信電話公ネ］代表者　真　　藤　　　
恒 ４　　代　　理　　人 （１所　〒１０２　　東京都千代田区麹町５丁目７番地
　秀和紀尾月町ＴＢＲ８２０号 ５、補ｉＴ命令の日イ」　昭和５９年１１月２７日（発
送日）６、浦Ｗにより増加する発明の数　　なし７、補
正の対象　明細書の図面の簡単な説明の欄８、補正の内
容 （１〉明細書中、図面の簡（）１な説明の欄に、次を記
載する。 ［第１図は、本発明にＪ、るジョセフソン鋸歯状波電流
発生回路の第１の実施例を示す接続図である。 第２図は、従来のジョはフソン鋸南状波電流発生回路を
示す接続図である。 第３図は、第２図に示す従来のジョセフソン鋸歯状波電
流発生回路に使用されており、目つ本発明によるジョセ
フソン鋸歯状波電流発生回路に使用し１ワる制御電流線
イ」２端子グー１〜回路を示す接続図である。 第４図【、１１、その閾値電流特性を示づ一曲線図であ
る。 第５図は、第２図に示ｔ　ｉｆ来のジョセフソン鋸歯状
波電流発生回路の動作の説明に供する波形図である。 第６図（ま、第１図に示η本発明によるジョセフソン鋸
南状波電流発〈を回路の第１の実施例に使用し冑る２端
了ジ」１′！フソング−１−同路を示す接続図である。 第７図は、第１図に示す本発明によるジョセフソン鋸歯
状波電流発生回路の動作の説明に供する波形図である。 第８図は、本発明によるジョセフソン鋸歯状波電流発生
回路の第２の実施例を示す接続図である。 第９図は、第８図に示寸本発明によるジョセフソン鋸歯
状波電流発生回路の第２の実施例に使用し得る２端子ジ
ョセフソンゲ−１〜回路を示す接続図である。 第１０図は、第８図に示す本発明によるジョセフソン鋸
歯状波電流発生回路の動作の説明に供する波形図である
。」 以　　上Procedural manual (method) 1. Description of the case Japanese Patent Application No. 59-175377 2, Name of the invention Josephson sawtooth wave current generating circuit 3, Person making the amendment A'1 Relationship Patent applicant address 1-1-6 Uchisaiwai-cho, Chiyoda-ku, Tokyo Title name
(422) Japan Telegraph and Telephone Network] Representative Makoto Fuji
Tsune 4th Masato (1 location 5-7 Kojimachi, Chiyoda-ku, Tokyo 102 Hidekazu Kiotsuki-cho TBR No. 820 No. 5, Supplementary IT Order Day) November 27, 1980 (shipment date) 6, Ura W Number of inventions increased by None 7, Subject of amendment Column 8 for brief explanation of the drawings in the specification, Contents of the amendment (1> In the specification, the following should be stated in the column for a brief explanation of the drawings. [FIG. 1 is a connection diagram showing a first embodiment of the Josephson sawtooth current generation circuit according to the present invention.FIG. 2 is a connection diagram showing a conventional Josephson sawtooth wave current generation circuit. FIG. 3 is a connection diagram showing a connection diagram used in the conventional Josephson sawtooth current generation circuit shown in FIG. Fig. 4 is a connection diagram showing the control current line A and the two terminal G1 to circuit. Fig. 4 is a curve diagram showing the threshold current characteristics thereof. FIG. 6 is a waveform diagram for explaining the operation of the Josephson sawtooth current generation circuit according to the present invention. FIG. FIG. 7 is a connection diagram showing the connection between the two terminals used in the embodiment of FIG. 8 is a waveform diagram for explaining the operation of the circuit. FIG. 8 is a connection diagram showing a second embodiment of the Josephson sawtooth wave current generating circuit according to the present invention. FIG. 10 is a connection diagram showing a 2-terminal Josephson sawtooth current generating circuit according to a second embodiment of the present invention. FIG. This is a waveform diagram used to explain the operation of Josephson's sawtooth wave current generating circuit.

Claims (1)

【特許請求の範囲】 １、バイアス電流線と、制御電流線とを有し、上記バイ
アス電流線に矩形波状バイアス電流が供給されている状
態で、上記制御電流線に短形波状入力電流が入力される
ことによって、零電圧状態から有電圧状態に転移し、両
端間に定電圧出力電圧を発生させる、ジョセフソン接合
素子を用いて構成された制御電流線付２端子ジョセフソ
ンゲート回路と、 上記制御線付ジョセフソンゲート回路と並 列関係に接続され、上記制御電流線付２端子に発生する
定電圧出力電圧にもとずき、鋸歯状波出力電流を流す負
荷インダクタとを有するジョセフソン鋸歯状波電流発生
回路において、 上記負荷インダクタと直列関係に、バイア ス電流線を有し、上記負荷インダクタに上記鋸歯状波出
力電流が得られる毎に零電圧状態から有電圧状態に転移
し、定電圧出力電圧を発生する、ジョセフソン接合素子
を用いて構成された２端子ジョセフソンゲート回路が接
続されていることを特徴とするジョセフソン鋸歯状波電
流発生回路。 ２、特許請求の範囲第１項記載のジョセフソン鋸歯状波
電流発生回路において、 上記負荷インダクタと直列関係に接続され ている２端子ジョセフソンゲート回路が、上記鋸歯状波
出力電流にもとずき、零電圧状態から有電圧状態に転移
することを特徴とするジョセフソン鋸歯状波電流発生回
路。 ３、特許請求の範囲第１項記載のジョセフソン鋸歯状波
電流発生回路において、 上記負荷インダクタと直列関係に接続され ている２端子ジョセフソンゲート回路が、パルス乃至矩
形波状のリセット用電流が供給される制御電流線を有し
、上記リセット用電流にもとずき、零電圧状態から有電
圧状態に転移することを特徴とするジョセフソン鋸歯状
波電流発生回路。[Claims] 1. It has a bias current line and a control current line, and in a state where a rectangular waveform bias current is supplied to the bias current line, a rectangular waveform input current is input to the control current line. a two-terminal Josephson gate circuit with a controlled current line configured using a Josephson junction element, which transitions from a zero voltage state to a voltage state by being connected to a voltage state and generates a constant voltage output voltage between both ends; A Josephson sawtooth gate circuit with a control line and a load inductor connected in parallel with the Josephson gate circuit with a control current line to flow a sawtooth wave output current based on the constant voltage output voltage generated at the two terminals with the control current line. The wave current generating circuit has a bias current line in series with the load inductor, and each time the sawtooth wave output current is obtained in the load inductor, the circuit transitions from a zero voltage state to a voltage state, and outputs a constant voltage. A Josephson sawtooth wave current generating circuit, characterized in that a two-terminal Josephson gate circuit configured using a Josephson junction element is connected to generate a voltage. 2. In the Josephson sawtooth wave current generating circuit according to claim 1, a two-terminal Josephson gate circuit connected in series with the load inductor is based on the sawtooth wave output current. 1. A Josephson sawtooth wave current generating circuit characterized in that the circuit transitions from a zero-voltage state to a voltage-applied state. 3. In the Josephson sawtooth wave current generating circuit according to claim 1, the two-terminal Josephson gate circuit connected in series with the load inductor supplies a pulsed or rectangular wave reset current. 1. A Josephson sawtooth wave current generating circuit, characterized in that the Josephson sawtooth wave current generating circuit has a control current line in which the reset current is applied, and transitions from a zero voltage state to a voltage applied state based on the reset current.
JP17537784A 1984-08-23 1984-08-23 Josephson saw-tooth wave current generating circuit Pending JPS6153816A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17537784A JPS6153816A (en) 1984-08-23 1984-08-23 Josephson saw-tooth wave current generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17537784A JPS6153816A (en) 1984-08-23 1984-08-23 Josephson saw-tooth wave current generating circuit

Publications (1)

Publication Number Publication Date
JPS6153816A true JPS6153816A (en) 1986-03-17

Family

ID=15995038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17537784A Pending JPS6153816A (en) 1984-08-23 1984-08-23 Josephson saw-tooth wave current generating circuit

Country Status (1)

Country Link
JP (1) JPS6153816A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007287696A (en) * 1993-03-11 2007-11-01 3M Co Tapered multilayer lighting apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753138A (en) * 1980-09-16 1982-03-30 Nippon Telegr & Teleph Corp <Ntt> Generating circuit for josephson trigger pulse

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753138A (en) * 1980-09-16 1982-03-30 Nippon Telegr & Teleph Corp <Ntt> Generating circuit for josephson trigger pulse

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007287696A (en) * 1993-03-11 2007-11-01 3M Co Tapered multilayer lighting apparatus

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