JPS6150446A - Line state display system - Google Patents

Abstract

PURPOSE:To display accurately the transmission/reception state of a line with simple constitution by providing a register holding the line number of a line in making transmission/reception and a display means displaying the line during transmission or reception. CONSTITUTION:When the interruption from a line is informed to a microprocessor 11, a microprogram discriminates it as transmission request, reception request or others, and when it is the transmission request interruption, the data to be transmitted next is prepared, it is used as the line state display to discriminate whether the display is effective or not and if effective, a transmission display command is given together with the character transmission command. If ineffective, only the character transmission command is given. When the reception request is given, after the character reception command is given and the reception display command is given if effective. When the microprocessor 11 gives the transmission display command or the reception display command, the content of the command is stored in an instruction storage register and its content is transmitted to a command decoder 17 as a command bus signal 16.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for displaying line status in a data communication system.

(Prior art) In a data communication system consisting of a central processing unit (hereinafter referred to as CPU), a communication control unit (hereinafter referred to as CCE), etc., an attempt is made to visually display the status of messages flowing over a line and the status of communication. In this case, the conventional method is to: i) provide a dedicated line display device as the CPU's input/output device (10) and display the line status according to the CPU's instructions; A method of displaying the line status by a CPU command to the line display addition mechanism added in the CCE based on judgment by a program, ii*) A circuit for displaying the line status on each line corresponding part of the line control unit of the CCE. Methods such as adding .

FIG. 6 is an example of the above-mentioned item 1), in which the data from the lines indicated by 3-1 to 3-n is transmitted and received by CCE2, and is passed to CPU via bus 4, and the line status is displayed by the program of CPU1. Processing for this purpose is performed, and an instruction to display the line status is issued to the line display device 5 via the bus 4.

FIG. 7 is an example of the above-mentioned section 11), in which the data from the lines 3-1 to 3-n are controlled to be transmitted and received by the CCE2, and the bus 4
The information is passed to the CPU 1 through the CCE 2, and the program performs processing for displaying the line status, and the result is instructed to be displayed via the CCE 2 to the line status display addition mechanism 6 connected to the CCE 2.

FIG. 8 is an example of the above-mentioned item 111), and as in the previous example, data from the lines 3-1 to 3-n is sent to the CCE 2 through the line corresponding parts 7-1 to 7-n included in the CCE 2. is passed to the CPU 1 via the bus 4. In addition, in order to display the status of the line 3, the line corresponding section 7 is equipped with hardware corresponding to each line, and the line status is individually displayed using the interface lines 8-1 to 8-n to the line status display section 6'. The line status is displayed by transmitting this information.

(Problems to be Solved by the Invention) However, in the method shown in FIG. 6, the line display device 5 becomes an input/output device for the CPU 1;
This method requires half the amount of hardware, and since the CPU 1 program performs processing for displaying the line status, it has the drawback of increasing the load on the program.

Further, in the method shown in FIG. 7, since an additional mechanism for line display is connected to CCE 2, the amount of hardware of CCE 2 increases, and furthermore, in order to have the program of CPU 1 perform line display processing, This had the disadvantage of increasing the program load.

Furthermore, in the method shown in FIG. 8, dedicated hardware must be added to the line handling section 7, and a separate interface line 8 is used in the line handling section 7, so when the number of lines increases, The disadvantage is that the number of interface lines increases.

In addition, in the asynchronous line, the mark lights up when the polarity is space, and the light goes out when the polarity is the same, so when a line disconnection occurs and the space polarity remains, the light turns off, and when the frame synchronous type If flag codes are continuous on the line due to time filler between frames, etc., the light will remain lit, and in any case, the line status display device will indicate that no data is being sent or received, even though no data is actually being sent or received. The problem was that it was displayed as if it were being performed.

Therefore, an object of the present invention is to accurately display the transmission/reception status of a line with a simple configuration without imposing a load on the CPUK program or increasing the amount of CCE hardware (without increasing the number of interface lines). The purpose of the present invention is to provide a line status display method that enables the following.

(Means for Solving the Problems) The present invention provides a communication control device that includes a microprocessor and controls the transmission and reception of data between a central processing unit and a line. A register for holding a line number of a line, and a display means for displaying a line for transmitting and a line for receiving are provided, and the display means is configured to display a transmitting display command or a receiving command in a microprogram sent from the microprocessor. The line status display method is characterized in that a corresponding line is displayed based on a display command and a line number read from the register.

(Operation) The microprocessor determines whether the line to be displayed is a transmission request or a reception request, and sends a transmission display command or a reception display command to the display means. Further, the line number of the line is stored in a register, and this line number is sent to the display means.

The display means displays the corresponding line based on this information.

(Example) The present invention will be described below based on an example with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, and shows the internal details of a communication control equipment (CCE).

The channel interface section 10 is a section that controls an interface with a CPU (not shown), and is connected to a microprocessor 11. 11 is a microprocessor including a program memory, data memory, sequencer instruction holding register, interrupt control circuit, etc. (not shown);
This is the part that controls transmission and reception of the CE. The line 3 is connected to a line corresponding section 15 corresponding to each line, and the line corresponding section 15
performs juxtaposition or stone conversion of transmitted and received data, and interrupts the microprocessor II through an interrupt circuit (not shown) for each character data. The microprocessor 1 stores the line number that generated the interrupt in the line number register (LNR) 13, and the switching circuit 14 sends the line number corresponding to each line 15-1 to 15-.
The line corresponding to the line number set in LNFt13 from n is connected to the microprocessor 1 through the data line 12.
Connect to 1. As a result, the microprocessor 11 communicates with the line corresponding unit that generated the interrupt, determines the content of the interrupt request, and performs processing as necessary depending on the content.

Figure 2 shows the details of the processing. When a line interrupt is notified to the microprocessor 11, the microprocessor 110 microprogram determines whether it is a transmission request, a reception request, or something else. If it is a transmission request interrupt, the next step is performed. The data to be transmitted is prepared, and it is determined whether or not the data is valid for display as a line status display. If it is valid, a transmitting display command is issued at the same time as the character transmitting command. If invalid, only a character transmission command is issued. If it is a reception request, first a character reception command is issued, and then it is determined whether the received characters are valid for display as a line status display, and if valid, a reception display command is issued.

When a transmitting display command or a receiving display command is issued by the microprocessor 11, the contents of the command are held in a command holding register (not shown) in the microprocessor 11.
The contents are sent to the command decoder 17 as a command bus signal 16.

Figure 3 shows the contents of the instruction holding register, including an arithmetic control field that controls microprocessor arithmetic operations, a memory address control field that controls memory address designation, etc., a transmit/receive display command control field that controls transmit/receive display commands, and line correspondence. It consists of a transmission/reception command control field, etc. for controlling commands for communicating with the section.

When the command decoder 17 decodes the transmitting display command, the signal line 1
8-1 and decodes the receiving display command, the signal line 1
Output to 8-2. At this time, it is sent to LNR13.
The number of the line that issued the incoming call display command or the incoming call display command is held, and is input to the buffer via signal line ]9. Also, the buffer mark is the signal line 1 mentioned above.
8-1 and 18-2 are also input, and the output of the buffer is sent to the line status display device n and signal line 21-1.21-2.
．． It is connected using 21-3.

FIG. 4 shows the details of signal #J21 when displaying the line status of the branch line. Signal 21-3 corresponds to 5 bins (K) of line numbers 0 to 4, and signal 21-1 corresponds to the transmitting display command, and the signal 21-2 corresponds to the receiving display command.

Figure 5 shows the details of the line status display control B, and the signal line 2 between the signal line buffer and the buffer in the CCE.
1, and the signal line 24-3 corresponds to the signal line 21-3 and means the line number.
The signal line 24-1 corresponds to the signal line 21-1 and means a display command during transmission, and the signal line 24-2 corresponds to the signal line 21-2 and means a display command during reception.

When the microprocessor 11 of the CCE issues a transmitting display command, a signal 24-1 is output, and the line number 24-3 is output.
is decoded by decoder B, and the transmitting display latch n
Among them, it is sent to the transmitting display latch corresponding to the line number, and is displayed by the light emitting diode path. Similarly, when a receiving display command is issued from the microprocessor 11, a signal 24-2 is output, and the line number 24-3 is sent to the decoder 26.
It is decoded by , and set in the receiving display latch corresponding to the line number among the receiving display latches 29 and displayed by the light emitting diode.

(Effects of the Invention) As explained above, the present invention allows the line status display control command to be controlled by the microprogram in the communication control equipment (CCE), thereby reducing the load on the CPU program and reducing the load on the CCE. Since the microprogram also normally determines the transmission control character, it is sufficient to perform line status display control at the same time, and there is an advantage that the load on the CCE does not increase. In addition, the amount of CCE software can only be increased by adding one command field and a decoder for that command, and the only interface lines are one each for sending and receiving display commands and the line number.
It is a minor problem for the overall E, and since the line status display device only requires a line number decoder, a display latch for each line, and a light emitting diode for display, it is possible to realize an economical line display device. There are advantages.

In the explanation of the CCE microprocessor of the present invention, an example of a horizontal microprocessor has been shown, but it goes without saying that it can also be easily implemented using a general-purpose microprocessor.

Furthermore, by using start-stop synchronization, character synchronization, and frame synchronization synchronization methods and various transmission control procedures, messages are not displayed when space polarity is displayed, when flags are being carried, and when polling sequences are not displayed during message transmission and reception. C for fine-grained control such as displaying only
A flexible data communication system can be constructed by making minor changes to the CE microprogram.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an operation flowchart of the microprocessor shown in FIG. 1, and FIG. 3 is a diagram showing the contents of an instruction holding register in the microprocessor shown in FIG. 4 is a detailed diagram of the signal line 2 shown in FIG. 1, FIG. 5 is a detailed block diagram of the line status display device 22 of FIG. 1, and FIGS. 6 to 8 are each a conventional line display system. FIG. 1...Central processing unit (CPU), 2...Communication control device (CCE), 3-1 to 3-n...Line, 4...Pass line, 5...Line display device, 6. ... Line status display addition mechanism, 6'... Line status display section, 7-1 to 7-n... Line corresponding section, 8-1 to 8-n... Interface line, 10... Channel Interface section, 11...Microprocessor +, 12...Data line, 13...Line number register (LNR), 14...Switching circuit, 15-1 to 15-3...Line correspondence section , 16... Command bus signal, 17... Command decoder, 18-1.18-2.19.21-1 to 21-3...
Signal line, addition...Buffer 1, n...Line status display device,...Signal line buffer, 24-1...Signal corresponding to sending display command, 24-
2...Signal corresponding to the receiving display command, 24-3...
・Line number, 5.26...Decoder, 27-1.27-2...Sending display latch, 28-1
．． 28-2... Light emitting diode, 29-1.29-2
...Receiving display latch, 30-1.30-2...Light emitting diode.

Claims (1)

[Claims] In a communication control device that has a microprocessor and controls the transmission and reception of data between a central processing unit and a line, there is a register that holds the line number of the line when transmitting or receiving, and a register that holds the line number of the line that is being transmitted. and display means for displaying the line on which reception is being performed, and the display means is configured to display a transmission display command or a reception display command in the microprogram sent from the microprocessor and the line number read from the register. A line status display method characterized by displaying the corresponding line based on the following information.