JPS6150393A - Method of soldering terminal board to circuit substrate - Google Patents

Method of soldering terminal board to circuit substrate

Info

Publication number
JPS6150393A
JPS6150393A JP17307684A JP17307684A JPS6150393A JP S6150393 A JPS6150393 A JP S6150393A JP 17307684 A JP17307684 A JP 17307684A JP 17307684 A JP17307684 A JP 17307684A JP S6150393 A JPS6150393 A JP S6150393A
Authority
JP
Japan
Prior art keywords
soldering
solder
circuit pattern
terminal
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17307684A
Other languages
Japanese (ja)
Inventor
正 鈴木
石ケ谷 章二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Star Micronics Co Ltd
Original Assignee
Star Micronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Star Micronics Co Ltd filed Critical Star Micronics Co Ltd
Priority to JP17307684A priority Critical patent/JPS6150393A/en
Publication of JPS6150393A publication Critical patent/JPS6150393A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔技術分野〕 本発明はDIP半田を介して回路基板に電子部品を半田
付は後回路パターン側に後付けされる端子板の半田付は
方法の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an improvement in a method for soldering electronic components to a circuit board via DIP soldering and for soldering a terminal board later attached to a circuit pattern side.

〔従来技術〕[Prior art]

従来の該端子部材半田付方法としては、あらかしめ回路
パター/における該部材取付部にマスキングテープによ
りマスクされた状態にて、DIP半田槽を通し電子部品
が半田付けされた後、マスキングテープをはがし、該取
付部に端子部材を半田付は固定していた。これはDIP
半田工程において、あらかじめ、前記回路パターン上の
端子部材取付部に半田が付着すると、該半田付着部によ
面 す一な設定を行うための工数を要すると共に、 ・溶け
た半田が回路パターン上の該部材取付部外にはみ出すた
め、ショートする危険性を有し、作業性が悪いための処
置として行われている。そして。
The conventional method for soldering terminal members is to solder the electronic components through a DIP solder tank while masking the mounting portion of the component with masking tape in a preliminary circuit pattern, and then peeling off the masking tape. The terminal member was fixed to the mounting portion by soldering. This is DIP
In the soldering process, if solder adheres to the terminal member attachment part on the circuit pattern in advance, it will require a lot of man-hours to make a uniform setting to face the solder attachment part, and the following will occur: This is done as a measure against the problem of poor workability as there is a risk of short-circuiting as the part protrudes outside the part where the member is attached. and.

通常、回路基板への実装部品構成において、DIP半田
後で回路基板全体を同時に洗浄することが不向きな電解
コンデ/すや防水タイプでない電子ングテープ貼付は作
業工数を削減すべく回路パターン設計が行われると共に
、マスキングテープが、これら後付は部品との兼合いに
て慣用的に半田付は作業工程の一つとして使用されてい
るため、組立上、マスキングテープの貼付け、はがす工
数を要すると共に、特に、回路パターン設計スペースが
限定された入り組んだ部分へのマスキング作業時におい
て顕著である。
Normally, when configuring components to be mounted on a circuit board, it is not suitable to clean the entire circuit board at the same time after DIP soldering.When attaching electrolytic condenser/non-waterproof type electronic tape, the circuit pattern is designed to reduce the number of work steps. At the same time, masking tape is customarily used for these retrofitting parts and soldering is used as one of the work processes, so it requires man-hours to apply and remove masking tape during assembly, and is This is noticeable when masking a complicated part with a limited circuit pattern design space.

〔目的〕〔the purpose〕

本発明は前記欠点を除去するものであり、マスキング作
業時減にて後付は部品を有するDIP半田使用における
回路基板の半田付は作業の合理化と共に、回路パターン
設計の合理化をはかることを目的とする。
The present invention is intended to eliminate the above-mentioned drawbacks, and aims to streamline the soldering work of circuit boards using DIP soldering, which has components that can be retrofitted, by reducing the time required for masking work, as well as rationalizing circuit pattern design. do.

〔構成〕〔composition〕

以下、本発明を第1図、第2図に示す一実施例にて説明
する。
The present invention will be explained below with reference to an embodiment shown in FIGS. 1 and 2.

1は回路基板、2は回路パターン部、3は後付、   
    18 t’l#M−Pi 40(fE11te
iJ11突5゛′”880る位置決め用穴である。回路
パターン部2は前記端子板4の位置決め用突起5が回路
基板1の位置決め用穴3に嵌合された状態で、該端子板
半田付は部6の外形より所定の間隙を有するよう形成し
ている。
1 is a circuit board, 2 is a circuit pattern part, 3 is a retrofit,
18 t'l#M-Pi 40 (fE11te
iJ11 is a positioning hole with a protrusion of 5"'"880.The circuit pattern portion 2 has a positioning hole 5 of the terminal board 4 fitted into the positioning hole 3 of the circuit board 1, and the terminal board is soldered. is formed to have a predetermined gap from the outer shape of the portion 6.

なお、前記回路パターンにおける前記端子板取付部、及
び、前記間隙分のスペースにDIP半田時において半田
が付着するのを防止するために公知のレジスト処理にて
行ってもよい。
Note that in order to prevent solder from adhering to the terminal board mounting portion and the space of the gap in the circuit pattern during DIP soldering, a known resist treatment may be performed.

図示なし)をDIP半田することにより、前記回路ハタ
ーン部2には、既に半田が付着されている。
Solder is already attached to the circuit pattern portion 2 by DIP soldering (not shown).

次に端子板4が面述の如く回路基板1の位置決め用穴3
に位置決め用突起5を嵌合することにより、而 回路基板に^−に位置決めした後、半田ごてを該端子板
4の半田付は部6と回路パターン部2に触れるようにし
て位置を決めて当てることにより、半田ごての熱が両部
に伝達すると共に、既に半田が付着されている回路パタ
ーン部2の半田が溶けて流れ出し、半田ごてと両部間の
隙間を液状になった半田の毛細管現象により、端子板4
の半田付は部6に半田が到達する。更に、既に該半田付
は部6が十分熱されているために、該半田の表面張力に
て該半田付は部6の全体に半田が広がってゆく。半[B
付は部6全体に半田が広がった状態にて、半田ごてを離
すことにより、該端子部材4の後付は作業が完了する。
Next, the terminal plate 4 is inserted into the positioning hole 3 of the circuit board 1 as described above.
After positioning the circuit board ^- by fitting the positioning protrusion 5 to the terminal board 4, position the soldering iron so that it touches the soldering part 6 of the terminal board 4 and the circuit pattern part 2. By applying the soldering iron to the soldering iron, the heat from the soldering iron was transferred to both parts, and the solder on the circuit pattern part 2, which had already been soldered, melted and flowed out, and the gap between the soldering iron and the two parts became liquid. Due to capillary action of solder, the terminal board 4
When soldering, the solder reaches part 6. Furthermore, since the soldering part 6 is already sufficiently heated, the solder spreads over the entire soldering part 6 due to the surface tension of the solder. Half [B
By releasing the soldering iron with the solder spread over the entire mounting portion 6, the subsequent mounting of the terminal member 4 is completed.

なお、該作業時に半田付部のスペースの兼合い、及び、
半田の流れをよりよくするために予備半田を追加しても
よい。又、前記端子板4の半田付は部6と回路パターン
部2との間の隙間は、実験より、端子板半田付は部6の
板厚の2倍以内であれば、十分半田の粘性1こより回路
パターン部2と半田付は部6とが固着することを確認し
ている。
In addition, during this work, the space of the soldering part and
Preliminary solder may be added to improve solder flow. Furthermore, experiments have shown that when soldering the terminal board 4, if the gap between the part 6 and the circuit pattern part 2 is within twice the thickness of the part 6, the solder viscosity 1 is sufficient. From this, it was confirmed that the circuit pattern portion 2 and the soldering portion 6 were firmly attached.

又、回路パターン部2は該実施例の如く、半田付は部6
に対し全周囲に隙間を設けるよう形成した例であるが、
第3図、第4図1こ示す他の実施例の如く、その一部分
を半田付は部6と重なるように突起2bを有した回路パ
ターン部2を形成してもよい。この場合DIP半田によ
り回路パターン部2の突起2bにも半田が付着し、端子
板4を回路基板1に位置決めした状態で、端子板4が回
路基板1に対し傾斜するが、突起2b上の半田量も少く
、後付は時に半田ごてを突起2bと端子板4の半田付は
部6に当てることにより、核部の半田が溶は出すと共1
こ、該傾斜が矯正されるため支障はなく、反面、該突起
2bは半田付は時に半田ごての熱により、半田付は部6
へ流れ出してゆく流路パターンとしても働くため、予備
半田を施す必要がなくなると共に、しかも、回路基板の
寸法精度によっては前記実施例の如く、半田付は部に対
し全周に隙間をもたせる回路パターン部構成の場合、相
対的な位置スレにより、万一、所定の隙間より大になっ
た場合、半田の粘性のみで両部間を固着することがむず
かしくなる場合も考えられるが、面記突起2bを設けれ
ば半田付けの信頼性が向上する効果を有する。
Also, as in the embodiment, the circuit pattern portion 2 is soldered to the portion 6.
This is an example in which a gap is provided around the entire circumference.
As in other embodiments shown in FIGS. 3 and 4, a portion of the circuit pattern portion 2 may be soldered to form the circuit pattern portion 2 having the protrusion 2b so as to overlap the portion 6. In this case, solder also adheres to the protrusions 2b of the circuit pattern portion 2 due to DIP soldering, and the terminal plate 4 is tilted with respect to the circuit board 1 with the terminal plate 4 positioned on the circuit board 1, but the solder on the protrusions 2b The amount is small, and when soldering is done later on, sometimes by applying the soldering iron to the protrusion 2b and the terminal board 4 to the part 6, the solder in the core part melts and melts.
There is no problem because the inclination is corrected, but on the other hand, when soldering the protrusion 2b, the heat of the soldering iron sometimes causes the soldering to occur at the part 6.
Since it also acts as a flow path pattern flowing out to the circuit board, there is no need to apply preliminary soldering.Moreover, depending on the dimensional accuracy of the circuit board, as in the above embodiment, soldering can be done in a circuit pattern that leaves gaps around the entire circumference. In the case of two parts, if the gap becomes larger than the predetermined gap due to relative positional scratches, it may be difficult to fix the two parts together with only the viscosity of the solder. Providing this has the effect of improving soldering reliability.

〔効果〕 以上、本発明によれば、従来の如<DIP半田後の後付
けを必要とする端子板の半田付は方法において、マスキ
ングテープの貼付け、はがしといった工数削減にて、組
立作業合理化をはかることができると共に、更に、回路
パターン設計において、マスキノグテープの貼付は作業
等を留意した設計をする必要がなく、且、小型化に適用
できるため効果大である。
[Effects] As described above, according to the present invention, in the conventional method for soldering terminal boards that requires retrofitting after DIP soldering, assembly work can be streamlined by reducing man-hours such as pasting and peeling off masking tape. In addition, in circuit pattern design, pasting maskinog tape does not require designing with consideration to work etc., and can be applied to miniaturization, which is highly effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は本発明による端子板半田付は方法の一
実施例を示し、第1図は斜視図、第2図□は第1図を上
からみた平面図、第3図、第4図は他の実施例を示すも
のであり、第3図は斜視図、第4図は第3図を上からみ
た平面図である。 1:回路基板 2:回路パターン部 3:位置決め用穴
 4:端子板 5:位置決め用突起6:半田付は部
1 and 2 show an embodiment of the terminal board soldering method according to the present invention, in which FIG. 1 is a perspective view, FIG. 2 □ is a plan view of FIG. 1 viewed from above, and FIG. 4 shows another embodiment, FIG. 3 is a perspective view, and FIG. 4 is a plan view of FIG. 3 viewed from above. 1: Circuit board 2: Circuit pattern part 3: Positioning hole 4: Terminal board 5: Positioning protrusion 6: Soldering part

Claims (1)

【特許請求の範囲】[Claims] DIP半田にて回路基板に電子部品を半田付け後、後付
けされる端子板の半田付け方法において、前記DIP半
田時に該基板の回路パターン側に後付される端子板の取
付け部に半田が付着しないよう、もしくは、一部以外の
部分に半田が付着しないようにレジスト処理、もしくは
回路パターンを形成してなり、前記DIP半田にて付着
した該端子部近傍の半田を溶かすことにより、該融解半
田の粘度を利用し端子板を回路基板に半田付けすること
を特徴とした回路基板と端子板との半田付け方法。
In a method for soldering a terminal plate that is attached later after soldering electronic components to a circuit board using DIP soldering, solder does not adhere to the mounting portion of the terminal plate that is attached later to the circuit pattern side of the board during the DIP soldering. Alternatively, a resist treatment or a circuit pattern is formed to prevent the solder from adhering to any part other than a certain part, and by melting the solder near the terminal part that has adhered with the DIP solder, the molten solder can be removed. A method of soldering a circuit board and a terminal board, characterized by soldering the terminal board to the circuit board using viscosity.
JP17307684A 1984-08-20 1984-08-20 Method of soldering terminal board to circuit substrate Pending JPS6150393A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17307684A JPS6150393A (en) 1984-08-20 1984-08-20 Method of soldering terminal board to circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17307684A JPS6150393A (en) 1984-08-20 1984-08-20 Method of soldering terminal board to circuit substrate

Publications (1)

Publication Number Publication Date
JPS6150393A true JPS6150393A (en) 1986-03-12

Family

ID=15953761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17307684A Pending JPS6150393A (en) 1984-08-20 1984-08-20 Method of soldering terminal board to circuit substrate

Country Status (1)

Country Link
JP (1) JPS6150393A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5716265B2 (en) * 1972-11-29 1982-04-03
JPS5724757B2 (en) * 1978-03-03 1982-05-26

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5716265B2 (en) * 1972-11-29 1982-04-03
JPS5724757B2 (en) * 1978-03-03 1982-05-26

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