JPS6150284U - - Google Patents
Info
- Publication number
- JPS6150284U JPS6150284U JP13536184U JP13536184U JPS6150284U JP S6150284 U JPS6150284 U JP S6150284U JP 13536184 U JP13536184 U JP 13536184U JP 13536184 U JP13536184 U JP 13536184U JP S6150284 U JPS6150284 U JP S6150284U
- Authority
- JP
- Japan
- Prior art keywords
- angle
- memory
- wave
- buffer memory
- wave value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
- 230000002194 synthesizing effect Effects 0.000 description 1
Landscapes
- Radar Systems Or Details Thereof (AREA)
- Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
Description
第１図はこの考案による座標変換表示装置の一
例を示すブロツク図、第２図はその動作の説明に
供するためのタイムチヤート、第３図は角度メモ
リ２８の記憶例を示す図、第４図は表示器におけ
る角度目盛を示す図である。
１１……アンテナ、１２……モータ、１３……
送信トリガ発生器、１４……送信器、１５……受
信器、１６……ＡＤ変換器、１７……バツフアメ
モリ、１９……角度パルス発生器、２３……水平
垂直走査形表示器、２４……表示制御部、２５…
…読出し用Ｘアドレス発生器、２６……読出し用
Ｙアドレス発生器、２７……主メモリ、３１……
角度カウンタ、２８……角度メモリ、３３……読
出し用カウンタ、３６……書込み用Ｘアドレス発
生器、３７……書込み用Ｙアドレス発生器、３２
……ラツチ回路、３５，３８，３９……切換回路
、４４……目盛信号発生器、４７……合成回路。
FIG. 1 is a block diagram showing an example of the coordinate conversion display device according to this invention, FIG. 2 is a time chart for explaining its operation, FIG. 3 is a diagram showing an example of storage in the angle memory 28, and FIG. 4 FIG. 2 is a diagram showing an angle scale on a display. 11...Antenna, 12...Motor, 13...
Transmission trigger generator, 14... Transmitter, 15... Receiver, 16... AD converter, 17... Buffer memory, 19... Angle pulse generator, 23... Horizontal/vertical scanning display, 24... Display control unit, 25...
...X address generator for reading, 26... Y address generator for reading, 27... Main memory, 31...
Angle counter, 28...Angle memory, 33...Reading counter, 36...Writing X address generator, 37...Writing Y address generator, 32
... Latch circuit, 35, 38, 39 ... Switching circuit, 44 ... Scale signal generator, 47 ... Synthesizing circuit.
Claims (1)
動パルスの反射波を受波する受信器と、その受信
器の受信出力を一定周期で標本化してデジタル信
号に変換するＡＤ変換器と、そのデジタル信号が
一時記憶されるバツフアメモリと、上記波動パル
スの送波方向を順次変化させる手段と、その波動
パルスの送波方向を示す角度信号を検出する手段
と、各角度の正弦波値と余弦波値とが交互に順次
記憶された角度メモリと、上記波動パルスの送波
ごとに上記受信信号のバツフアメモリへの取込み
の後から次の波動パルスの送波終了までに上記検
出した角度信号に対応して上記角度メモリを２回
ずつ読出してその角度の正弦波値と余弦波値とを
得る読出し手段と、水平垂直走査により表示を行
う表示器と、その表示器の表示走査と同期して読
出される主メモリと、上記バツフアメモリを順次
読出し、その読出しごとに上記角度メモリより読
出された正弦波値及び余弦波値とをそれぞれ累積
加算し、これら累積加算値をアドレスとして上記
主メモリへ上記バツフアメモリの読出し出力を書
込む転送手段とを具備する座標変換表示装置。 A transmitter that repeatedly transmits wave pulses, a receiver that receives reflected waves of the wave pulses, an AD converter that samples the received output of the receiver at a fixed period and converts it into a digital signal, and the digital signal. a buffer memory in which signals are temporarily stored, means for sequentially changing the transmission direction of the wave pulse, means for detecting an angle signal indicating the transmission direction of the wave pulse, and a sine wave value and a cosine wave value of each angle. and an angle memory in which are stored alternately and sequentially, and an angle memory corresponding to the detected angle signal from after the received signal is taken into the buffer memory for each transmission of the wave pulse until the end of transmission of the next wave pulse. reading means for reading out the angle memory twice to obtain the sine wave value and cosine wave value of the angle; a display device for displaying by horizontal and vertical scanning; The main memory and the buffer memory are sequentially read, and each time the sine wave value and the cosine wave value read from the angle memory are cumulatively added, the buffer memory is read to the main memory using these cumulatively added values as an address. A coordinate conversion display device comprising a transfer means for writing output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13536184U JPH0241593Y2 (en) | 1984-09-05 | 1984-09-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13536184U JPH0241593Y2 (en) | 1984-09-05 | 1984-09-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6150284U true JPS6150284U (en) | 1986-04-04 |
| JPH0241593Y2 JPH0241593Y2 (en) | 1990-11-06 |
Family
ID=30693850
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13536184U Expired JPH0241593Y2 (en) | 1984-09-05 | 1984-09-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0241593Y2 (en) |
-
1984
- 1984-09-05 JP JP13536184U patent/JPH0241593Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0241593Y2 (en) | 1990-11-06 |
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