JPS6150126A - Automatic dimming electronic flash device - Google Patents

Abstract

PURPOSE:To vary an optical peak value with the accurate quantity of emitted light and to perform continuous synchro-flash photography in a short time by providing an FET in series with a flash discharging tube and stopping application of a voltage which makes the FET conductive when the quantity of light received from an object becomes a prescribed value. CONSTITUTION:A DC-DC converter 10 is provided with an oscillating transformer 13 and an oscillating transistor TR14 and converts a DC power 11 to a boosted DC. A flash discharging tube 14 consumes the charged electric charge of a main capacitor C1 to emit light, and an FER15 is connected in series to the discharging tube 14. A voltage control means 16 controls the applied voltage of the FET15. The means 16 consists of a constant voltage generating circuit 17, a circuit 18 which generates a control volage given to the FET15, a circuit 19 which controls the operation of the circuit 18, a control operation stopping circui 20 which receives a light emission stop signal from a light receiving part 34 to operate and stops applying an operation input signal from the operation control circuit 19 to the control voltage generating circuit 18, and a start switch circuit 21 of a device. Thus, the optical peak value is varied with the accurate quantity of emitted light and continuous synchro-flash photography is performed in a short time.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an electronic flash device used as an artificial light source for photography, etc., and more particularly to a device that can receive reflected light from a subject and automatically control the amount of light emitted.

Conventional structure and its problems Many of the recent automatic dimming electronic flash devices connect a 5CR3 in series with the flash discharge tube 2 as shown in FIG. When the amount of light received by the light receiving section 8 that receives the reflected light from the subject reaches a predetermined value, the 5CR is activated.
si is turned on and the charging charge of commutation capacitor 5 is 5CR.
The mainstream is to apply a reverse bias between the anode and cand (No. 3) to turn off and stop emitting light.

In this conventional device, as shown in FIG. 2, if the amount of light received by the subject reaches a predetermined value and the light emission is stopped at time T, 5CRs is turned on even though the amount of light is appropriate, and 5
Even if a reverse bias is applied between the main electrodes of CR3 and 5CR3 is turned off, the flash discharge tube 2 and the commutating capacitor 5.5
Since current still flows through the CRsi, extra light as shown by diagonal lines is emitted, resulting in an excessive amount of light emission.

In addition, there are times when it is desired to repeatedly take photographs in a short period of time, and commutating capacitor 5, resistor 6. The final charging time constant ensures that 5CR3 is turned off every time light is emitted, but if the resistor 6 is made too small in order to reduce the time constant, 5CR9 will not turn off.

Also, when using a high-speed film, compared to a low-speed film, it is necessary to control the light emission in a short time, especially when photographing a subject at a close distance, for example, using a 10-odd micrometer formula. If the light emission is controlled by , the problem of reciprocity law failure occurs.

OBJECTS OF THE INVENTION It is an object of the present invention to provide an automatic dimming electronic flash device that solves the above-mentioned problems.

Structure of the Invention The main structure of the present invention is to connect a field effect transistor in series with a flash discharge tube, and to provide voltage control means for controlling conduction of the field effect transistor by controlling the voltage applied between its gate and source. , a light receiving section that receives object light and stops applying voltage to the field effect transistor by the voltage control means when the amount of the received light reaches a predetermined value.

DESCRIPTION OF THE EMBODIMENTS FIG. 3 is an electrical circuit diagram of a first embodiment of the automatic light control electronic flash device of the present invention. In the figure, reference numeral 10 includes an oscillation transformer 13 having a primary winding 13-1, a secondary winding 13-2, an auxiliary winding 13-3, an output winding 13-4, an oscillating transistor 12, etc., and a DC power supply. 11 is a DC-DC converter which is a power source for converting boosted direct current Kf, 14 is a flash discharge tube that emits light by the charge charged in the main capacitor 1, 15 is a field effect transistor connected in series with the flash discharge tube 14, and 16 is a field effect A voltage control means 33 for controlling the voltage applied to a transistor (hereinafter referred to as FET) is a flash discharge tube 14.
A trigger circuit 34 is a light receiving section that receives subject light and applies a light emission stop signal to the voltage control means 16 when the amount of light received reaches a predetermined value.

The voltage control means 16 includes a constant voltage generation circuit 1 and an EFTl.
5, a circuit 19 that controls the operation of the control voltage generation circuit 18, and a light receiving section 34.
The operation control circuit 19 operates upon receiving a light emission stop signal from the
The device comprises a control operation stop circuit 20 for stopping the application of an operation input signal to the control voltage generation/generating circuit 1B, and a start switch circuit 21 for the device.

Next, the operation of the device having the above configuration will be explained with reference to the time chart in FIG. An output voltage is generated from the secondary winding 13-2 and the output winding 13-4, and the main capacitor 1 is charged to a high voltage with the voltage obtained by converting the output voltage of the secondary winding 13-2 into DC using a diode.

A constant voltage of a predetermined value appears at the emitter of the transistor 37 of the constant voltage generating circuit 17 due to a constant voltage diode. In this state, if the switch 36 in the starting switch circuit 21 is turned on at time T1 as shown in FIG. 4A,
Transistor 29 becomes conductive and NAND gate 26
Since the input terminal I of the NAND gate 2 becomes L level,
The output of 6 is inverted to H level, and the capacitor 3o and resistor 3
A pulse voltage set with a time constant of 1 is generated, and the NAN
applied to NAND gate 28 via D gate 2,
An output as shown in FIG. 4B is generated from the NAND gate 28 and input to the control voltage generation circuit 18. This NAN
The output time @T4 Tl of the D gate 28 is determined by the capacitor 30 and the resistor 31 so that the time required for the charge in the main capacitor 1 to fully discharge through the flash discharge tube 14 is equal to or longer than that. Adjusted by constant.

The transistor 22 becomes conductive due to the output of the NAND gate 28, and the transistor 23 also becomes conductive, as shown in FIG.
A voltage V divided by is generated across the resistor 260, and this voltage is applied between the gate and source of FET1s,
5 is in a conductive state. Due to the conduction of Q FET 1s, current flows through the trigger converter 39 of the trigger circuit 33 and the primary winding of the trigger transformer 38, so that the current flows from the secondary winding of the trigger transformer 38 as shown in the fourth diagram. A trigger voltage is generated, which causes the flash discharge tube 14 to be excited at time T2 in FIG. It emits light like that.

The light emitted from the flash discharge tube 14 is irradiated onto the subject, and the reflected light from the subject is incident on the light receiving element 36 of the light receiving section 34. When the amount of light received reaches a predetermined value at time T3 in FIG.
A light emission stop signal is applied from the light receiving section 34 to the voltage control means 16, and this light emission stop signal makes the transistor 32 conductive and short-circuits both ends of the resistor 310.
The outputs in Figures B and 4C disappear, and the transistors 22 and 23 of the control voltage generation circuit 18 become non-conductive.
No voltage is generated across the resistor 25, the FET 15 is turned non-conductive, and the flash discharge tube 14 stops emitting light at time T3 in FIG. 4.

Therefore, the light emission from the flash discharge tube 14 is from T2 to T3 in FIG. 4E.

It operates as described above, but by changing the ratio of the resistor 24 and the resistor 25 and increasing the voltage generated at the resistor 25, the FET 16
If the current I flowing through f is increased, light can be emitted at a light peak value H2 higher than the light peak value H1 shown in Fig. 4E, as shown in Fig. 4F, or vice versa. By reducing the light emission voltage of the resistor 25, light can be emitted at a light peak value lower than Hl. Further, the operation of the trigger circuit 33 is also caused to be performed based on the charging current via the trigger capacitor 39 by conduction of the FET 1s, but the trigger capacitor 39 is charged in advance as shown in FIG. 21 switch 3
If 6 and switch 40 are linked, switch 36
When the switch is turned on, the trigger capacitor 39 is discharged through the primary winding of the trigger transformer 38, and a high trigger voltage is generated in the secondary winding to excite the flash discharge tube 14. Furthermore, DC as a power source
-Although a DC converter power source is used, it goes without saying that other high-voltage stacked batteries may be used.

FIG. 6 is an electric circuit diagram showing a second embodiment of the automatic dimming electronic flash device of the present invention. It is composed of a first control voltage generation port P41 and a second control voltage generation circuit 42, which are generated at the same time and applied between the gate and source of the FET 15, and the operation control circuit of the control voltage generation circuit is controlled by the first control voltage generation port P41. An operation control circuit that includes a first operation control circuit 43 and a second operation control circuit 44 that control the operations of the voltage generation circuit 41 and the second control voltage generation circuit 42, respectively, and further controls the control voltage generation circuit. The control operation stop circuit of the light receiving section 34
It is activated by the light emission stop signal from the first. It is configured to stop the operation of the second operation control circuits 43 and 44.

Components with the same figure numbers as those in the first embodiment have the same functions, so the explanation will be omitted and the operation will be explained below with reference to the time chart of FIG. 7.

Main capacitor 1 due to operation of DC-DC converter 1o
In the charged state, the switch 36 in the starting switch circuit 21 is turned on at time T5 in FIG. The output of the NAND gate 52 of the circuit 43 is inverted to H level, and the output of the NAND gate 53 is connected to the capacitor 54.
Based on the time constants of the resistor 55 and the resistor 55, the output becomes as shown in FIG.
becomes conductive, and a voltage is generated across the resistor 25 with a value corresponding to the resistance ratio of the resistor 48 and the resistor 25. This voltage is applied between the gate and source of the FET 1s, and the FET 15 becomes conductive, causing the trigger circuit 33 to A trigger pulse such as is generated, the flash discharge tube 14 is excited, and T as shown in FIG.
At time 6, the main condenser 1 starts emitting light due to the charged charge, and irradiates the subject.

The output from the first operation control circuit 43 shown in FIG. The output of the NAND gate 56 of the circuit 44 is inverted to H level, and the inverted output based on the time constants of the capacitor 57 and resistor 58 is as shown in FIG. 7C, similar to the operation of the first operation control circuit 43. is generated from the NAND gate 59 at time T7, and this output causes the second control voltage generation circuit 42
The transistor 49 becomes conductive, and the transistor 5o becomes conductive.
conducts.

On the other hand, at time T7, the output from the NAND gate 53 disappears, so the transistors 46 and 47 become non-conductive.

Due to conduction of transistors 49 and 50, resistor 61 and resistor 2
A voltage based on the resistance ratio of 5 is generated in the resistor 25, and a voltage different from the voltage caused by the operation of the first control voltage generating circuit 41 is applied between the gate and north of the FET 1s. Now, if the value of the resistor 61 is adjusted and the voltage obtained at the resistor 26 is made larger due to the resistance ratio of the resistor 61 and the resistor 25 than that due to the resistance ratio between the resistor 48 and the resistor 25, the voltage obtained at the resistor 26 will be increased. Therefore, as shown in FIG. 7E, the flash discharge tube 14 emits light with a large optical peak value after time T7.

The light emitted from the flash discharge tube 14 irradiates the subject with the start of light emission at 16 hours shown in FIG. 7, and the reflected light is received by the light receiving section 34. When the amount of light received reaches a predetermined value at time T8, the light emission stops. When a signal is issued from the light receiving section 34 to the control operation stop circuit 45, the transistor 60 becomes conductive due to this light emission stop signal, and the resistor 58'jf: is short-circuited.
The output of the operation control circuit 44 is inverted to the L level at time T8 as shown in FIG. On the other hand, as shown in FIG. 7E, the light emission from the flash discharge tube 14 ends at time T8.

Note that the object is relatively close and the second operation control circuit 44 and the second control voltage generation circuit 42 start operating at time T7.
For example, when the amount of light received by the light receiving section 34 reaches a predetermined value at time 10, the transistors 60, 61 are turned on by the light emission stop signal from the light receiving section 34, and the resistors 55, 61 are turned on.
58 is short-circuited, as described above, no voltage can be obtained across the resistor 25, υ, and therefore, the light emission of the flash discharge tube 14 ends at time Tlo in FIG.

FIG. 8 is an electrical circuit diagram showing a third embodiment of the automatic dimming electronic flash device of the present invention. Second operation control circuit 43.
A switch 62 for selecting and switching the operation of 44 is added to the start switch circuit 21 of the second embodiment, and the other circuit configuration is the same as that of the second embodiment, and this embodiment is shown in FIG. This will be explained along with the time chart.

Now, if the selector switch 62 is switched to 62-1,
The operation is similar to that of the second embodiment, and when the switch 36 is turned on at time T11 as shown in FIG. 9A, the NAND gate 63 of the operation control circuit 43 of 7A1 as shown in FIG. 9B as described above. It emits an output with a time span from T to T13, and outputs from the flash discharge tube 14 as shown in FIG.
At time 13, the second operation control circuit 44
The output shown in the figure is emitted, and as a result, light is emitted at a light peak value of H4 higher than that of H3 as shown in FIG. 9E.

At time T14 when the amount of light received by the light receiving section 34, which receives the reflected light from the subject due to the light emitted by the flash discharge tube 14, reaches a predetermined value, the resistor 65 is short-circuited and the light emission ends, as described above.

Next, with the changeover switch 62f62-2 switched on, the switch 36 is turned on at time T11, and when the two transistors become conductive, the N A of the second operation control circuit 44 is turned on.
The output of the ND gate 56 is inverted to H level, and an output based on the time constant of the capacitor 57 and resistor 58 is generated as shown in FIG. 9F. 11 The second control voltage generation circuit 42 is operated, and the flash discharge tube 14 emits light with the peak value H4 shown in FIG. 9E, as shown in FIG. 9G, and irradiates the subject with the reflected light. When the amount of light received reaches a predetermined value at time T16, the light emission stop signal from the light receiving section 34 short-circuits the resistor 58, so that the output from the NAND gate 59 is no longer applied to the second control voltage generation circuit 42, and the FET 1s becomes non-conductive and stops emitting light.

Note that the NAND gate 5 of the second operating side ■circuit 44
9 output time (T16 "1'3" T1□-T11)
As shown by the broken line in FIG. 9G, the time required for all of the charge in the main capacitor 1 to be consumed by the flash discharge tube 14 and emit light, or so-called full light emission, is equal to or around the same time.
The time constants of the capacitor 57 and the resistor 58 are adjusted so as to achieve the above.

Effects of the Invention Although the embodiments of the present invention have been described in detail above, the effects of the automatic dimming electronic flash device of the present invention are generally as follows.

(1) The amount of light emitted can be controlled simply by connecting an FET as a switch element for controlling light emission in series with the flash discharge tube, and controlling the operation of the FET using a voltage control means that applies a control voltage to the gate of this FET. This eliminates the problem of excessive light emission due to increased light emission at turn-off when 5CRi is used in the conventional device described at the beginning.

(2) In the conventional device, when a high-sensitivity film is used, reciprocity law failure may occur, especially on the short distance side, but in the device of the present invention, the peak value of light emission from the flash discharge tube is transferred to the FET. Since this can be adjusted by controlling the voltage application, the light peak value can be lowered and the flash duration can be increased compared to conventional devices, so there is no such problem at all.

(3) Second. In the third embodiment, by emitting light with a low peak value at the initial stage of light emission and then emitting light at a higher peak value than that, the contrast in the early stage of light emission is achieved in order to illuminate a subject located at a short distance. After eliminating the problem of reciprocity failure, when illuminating a subject at a medium distance or longer where the problem of reciprocity failure hardly occurs, high-intensity light emission with a high peak value is performed to achieve the same light emission as the conventional device. Can illuminate the subject.

(4) With conventional equipment, the flash duration is 1m5 even when the light is fully emitted.
eC, and focal plane shutters can only be tuned at low shutter speeds (generally 1/60 seconds or less), but the flash emission time with the device of the present invention depends on the magnitude and duration of the voltage applied to the FET by the voltage control means. By adjusting the length, it is possible to easily take pictures that can be made as long as 3, 4...m5ec.

(5) Furthermore, in the third embodiment, in the initial stage of light emission, the light peak value is lowered, and then light emission with a higher light peak value is performed.
Since it is possible to select between the light emission mode of It is possible to take pictures with light emission.

(6) In the device of the present invention, light emission can be controlled by applying or not applying gate voltage to the FET, and unlike conventional devices, there is no need for a turn-off circuit for a switch element. There is no limit to the number of times the light can be emitted repeatedly within a short period of time.
Continuous synchronized light emission photography can be carried out in a short period of time without any problems simply by synchronizing the switch operation of the start switch circuit in accordance with the photographing operation of the camera.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram of a conventional automatic dimming electronic flash device, FIG. 2 is a flash waveform diagram of the conventional device shown in FIG. 1, and FIG. 3 is a first embodiment of the automatic dimming electronic flash device of the present invention. FIG. 4 is a time chart of the first embodiment of the present invention, and FIG.
The figure is an electric circuit diagram showing another embodiment of the trigger circuit in the first embodiment, FIG. 6 is an electric circuit diagram showing a second embodiment of the automatic dimming electronic flash device of the present invention, and FIG. FIG. 8 is a time chart of the second embodiment of the invention, and FIG. 9 is an electric circuit diagram showing the third embodiment of the automatic dimming electronic flash device of the invention.
The figure is a time chart of a third embodiment of the present invention. 1...DC-DC converter, 14...
・Flash discharge, 15...FET, 16...
...Voltage control means, 33...Trigger circuit, 3
4... Light receiving section. Name of agent Patent attorney Toshio Nakao and one other person Old figure No. 9 Td4 1aTy T8 %--÷a! Figure 8L---1--Eng-1u TttTn 10,000/77J7n7hda
η5 one hour

Claims (1)

[Claims] a power supply, a main capacitor charged by the power supply, a flash discharge tube that emits light by consuming the charge of the main capacitor, and the light emission provided within the discharge loop of the main capacitor via the flash discharge tube. a voltage control means for controlling the voltage applied to the gate of the FET to control the control operation of the FET; An automatic dimming electronic flash device comprising: a light receiving section that applies a light emission stop signal to the voltage control means and controls the voltage applied to the gate of the FET by the control means.