JPS6148947A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the reliability of the titled semiconductor device by a method wherein the push-up force working on the hardened sealing resin of the upper layer is prevented by providing a dispersing chamber with which the amount of thermal expansion of gel-formed resin can be relieved. CONSTITUTION:An insulative substrate 2 is adhered to the upper surface of a heat radiating plate 1, and a collector electrode 3, an emitter electrode 4 and a base electrode 5 are adhered thereon. The chip 6 of a transistor is adhered to the electrode 3. An outer casing 13 consists of an insulating material, and a partition wall 13a is hanging down. When gel-formed resin 9 is filled in the outer casing 13 in the depth L or deeper from the upper face of a heat radiating plate 1, closed space 14 is obtained, and even when hardening sealing resin 10 is filled from the upper aperture of the outer casing, no hardening sealing resin 10 is filled in the closed space 14. Accordingly, the closed space 14 can be used as an escape chamber even when the gel-formed resin 9 is thermally expanded, thereby enabling to reduce the push-up force working on the resin 10.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method of sealing a semiconductor element placed in an outer container by surrounding the semiconductor element with a gel-like insulating material and then injecting a curable sealing resin thereon. This invention relates to improvements in fixed-type semiconductor devices. The structure of a transistor module will be described below as an example of this type of semiconductor device, taking as an example a case in which one element is assembled in one outer container.

[Prior art]

Figure 1 is a cross-sectional view showing the structure of a conventional device.
An insulating substrate (2) is fixed on the top surface of the insulating substrate (2).
On top are the collector electrode (3), the emitter electrode (4) and the base electrode. (5) is glued. These electrodes are bent and connected to collector external terminals (
3a).

Emitter external terminal (4a) and pace external terminal (5a)
) is pulled upwards. And the collector electrode (
A transistor chip (6) is bonded on top of 3), and the emitter and base electrode pads on the upper surface of this chip (6) and the corresponding emitter electrodes (4) and bases 'fE, lff1 (5) and An outer container (8) made of an insulating material such as a synthetic resin molded product, each of which is wire-bonded with an aluminum (Al) wire (7), is placed on the heat sink (1) at its periphery so as to surround the assembly. External terminals (4a), (4
b), (4C) are drawn out. And the outer container (
8) A gel-like resin (9) such as silicone resin is injected into the interior to the middle height, and it wraps and protects the transistor chip (6) and the bonding 1' wire (7).
The inside is sealed with a curable sealing resin αO such as an epoxy resin filled and cured thereon.

External terminals (3a), (4a), and (5a) are mechanically held.

By the way, in the above-mentioned conventional device, the filling and sealing resin in the outer container u (8) is composed of the gel-like resin (9) and the curable sealing resin αO.
Since it has a zF7I structure, when the temperature of the device rises, the lower gel-like resin (9) expands, and a force pushing up the cured sealing resin 00 acts as shown by arrow P in the figure. The coefficient of linear expansion of the shaped resin (9) is 4 to 7'X 10
-'/°C, the linear expansion coefficient of the cured sealing resin αQ is 2~
Since it is larger than 8×10-5/°C, a large force will be applied. This cures the sealing resin α.
External terminal (3a) fixed at O.

(4a) and (5a) directly receive this pulling force. Therefore, under usage conditions such as intermittent energization, the external terminals (3a), (4a), and (5a) of each electric picture (3) are pulled out.

Adhesive layer α between (4), (5) and the insulating substrate (2)
υ, and the adhesion between the insulating substrate (2) and the heat sink (1)/
Repeated application of tensile force to the transistor chip 15 (6) causes repeated fatigue, eventually causing a peeling state, and the efficiency of conducting heat settled in the transistor chip (6) decreases. If the temperature rises above the allowable upper limit temperature, the transistor chip (6) will be destroyed and AI! This results in accidents such as 4% (7) of disconnections. As described above, conventional devices have had problems in terms of reliability.

[Summary of the invention]

This invention was made in view of the above-mentioned points, and the upper part of the outer container is not filled with hardened sealing resin, but communicates with the gel resin at the bottom, and absorbs the thermal expansion of the gel resin. By providing an escape chamber through which the molten metal can escape, upward force is not applied to the cured sealing resin in the upper layer, thereby providing a highly reliable semiconductor device.

[Embodiments of the invention]

FIG. 2 is a cross-sectional view showing the structure of an embodiment of the present invention, in which the same reference numerals as in the conventional example of FIG. 1 indicate equivalent parts, and the description thereof will be avoided from duplication. (to) is the outer container used in this embodiment, which is made of an insulating material such as a 1×52 resin molded product, like the outer container (8) in the conventional device, and its lower end is a heat dissipation board (1
) is glued along the periphery on top.

A partition wall (13a) having an opening at the top and partitioning a part of the inside thereof hangs down from near the opening end to a position a distance B from the upper surface of the heat sink (1) to which the lower end is bonded.

Using an outer container with this structure, gel resin (
9) is injected to a depth n or more from the top surface of the heat sink (1), the closed space α surrounded by the above-mentioned partition wall (13a) →
The curable sealing resin α is released from the upper opening of the outer container α.
Even if filled with O, the sealed space α→ is not filled with the curable sealing resin αO.

Therefore, in this embodiment, even if the lower layer gel-like resin (9) injected into the outer container [alpha] expands thermally due to temperature rise, the volumetric expansion will enter the sealed space [alpha] from below and be accommodated. Therefore, the pushing up force acting on the upper layer of the cured sealing resin αO becomes extremely small.

That is, the closed space α→ acts as a relief chamber for the expansion. In this way, Den! (3) , <4) , (
5) The tensile core force generated in the adhesive layer αη between the insulating substrate (2) and the adhesive layer @ between the insulating substrate (2) and the heat sink (1) can also be significantly reduced, reducing fatigue. Detachment settlement is prevented.

Note that although the above example shows the case of a transistor module in which only one transistor chip element is sealed, a second transistor module that is housed in an outer container, wrapped with a gel-like resin, and further sealed with a hardened sealing resin is also used. The present invention can be applied to the sealing of any semiconductor element as long as it has a layer sealing structure.

〔Effect of the invention〕

As explained above, in the semiconductor device according to the present invention,
When a gel-like resin is injected into the lower layer in an outer container, a curable resin is filled on top of the lower layer, and the resin is cured and injected, there is an enclosed space in the outer container whose lower part is connected to the gel-like resin and is not filled with the cured resin. Since a relief chamber is provided, the force applied to the expanded resin due to temperature rise is small, preventing damage due to thermal expansion and achieving high reliability.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing the structure of a conventional semiconductor device. FIG. 2 is a sectional view showing the structure of an embodiment of the present invention. In the figure, (1) is a heat sink, (2) is an insulating board, (
3a). (4a), (5a) are external terminals, (6) is a semiconductor (transistor) chip, (8) is an outer container, (9) is a gel-like resin, αO is a curable resin, α3 is an outer container, (13
a) is a partition wall. Alpha is a closed space. Note that the same reference numerals in Figure 1 indicate the same or equivalent items.

Claims (2)

[Claims] (1) A semiconductor chip with external terminals drawn upward is mounted on a substrate constituting the bottom plate of an outer container, and a gel-like resin is injected into the outer container to a depth that covers the semiconductor chip, and A curable resin is filled and cured on the gel-like resin, and the outer container is sealed with the cured resin and the external terminal is fixedly held. A semiconductor device characterized in that a part of the upper portion thereof is provided with a sealed space that communicates with the gel-like resin and is not filled with the curable resin. (2) The semiconductor according to claim 1, further comprising a partition wall inside the outer container that hangs down from near the open end of the upper wall thereof and reaches the gel-like resin, and partitions a part of the inside of the outer container. Device.