JPS6146180A - Rectified voltage multiplier circuit - Google Patents

Abstract

PURPOSE:To control an output voltage by a simple configuration by composing rectifying means in combination of a plurality of rectifiers and a capacitor, and controlling a current flowed to the capacitor. CONSTITUTION:A plurality of diodes D1-D8 are connected in series between the midtap and the output terminal (o) of the seconary winding n2 of a transformer T, and capacitors C1-C8 are connected between one terminal of the secondary winding n2 and the prescribed connecting point of the diodes D1-D8. The voltage of the output terminal (o) is detected by resistors R1, R2 and a differential amplifier OP, a transistor Q is controlled by the detection output to control a current flowed to the capacitor C4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a rectifier voltage multiplier circuit that combines a plurality of diodes and capacitors to obtain a high DC voltage from an AC input voltage.

[Technical Background of the Invention and Problems Therewith] Generally, a rectifier voltage multiplier circuit that combines a plurality of diodes and capacitors is often used as a means for obtaining a high direct current voltage from an alternating current voltage. Conventionally, output control of the input power supply or output control using a shunt regulator in the output stage has been considered to control fluctuations in the output voltage, but the former is difficult due to the complexity of the circuit, and the latter is difficult to control. There were problems in that voltage-resistant protection measures were required.

[Objective of the Invention] This invention was made in order to improve the above-mentioned problems, and its purpose is to provide a rectifier voltage multiplier circuit that can effectively control the output voltage with an extremely simple circuit configuration. shall be.

[Summary of the Invention] That is, the rectifying voltage multiplier circuit according to the present invention includes a rectifying means formed by connecting a plurality of rectifying elements in series so that the rectifying direction is the same, and a plurality of capacitors being connected between both ends of the rectifying means. Each capacitor is connected in series, and each connection point of the capacitor is connected to the first connection point between the predetermined rectifying elements, and a capacitor to which an alternating current voltage is applied is connected to a connection point other than the first connection point, so that each capacitor is connected in series. The rectifying means are connected to each other so as not to overlap with each other, and the current flowing through at least a portion of a plurality of capacitors connected in series between both ends of the rectifying means is controlled. It is something to do.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG.

FIG. 1 shows its configuration, in which the primary winding n1 of the transformer T is an AC power source 3! which outputs square wave AC power. A is connected. The secondary winding n2 of the transformer T is provided with an intermediate tap m, and both terminals a and b of the transformer secondary winding and the intermediate tap m serve as first to third AC input terminals, respectively. Note that tap m, which is the third input terminal, is grounded. Further, a plurality of diodes D1 to D8 are connected in series between the tap m and the output terminal 0 so that the rectification directions are the same. That is, the anode of the diode D1 is connected to the tap m, and the cathode of the diode D8 is connected to the output terminal 0.

Also, one terminal a of the secondary winding n2 which is the first input terminal
A plurality of capacitors 01 to C3 are connected between predetermined connection points of the diodes D1 to D8. That is, the capacitor C1 is connected between the terminal a and the connection point 0 between the diodes D2 and D3.

In addition, capacitors C2 and C3 are connected to terminal a and diode D.
7 and D8 are connected in series, and the connection point between these capacitors C2 and C3 is connected to the connection point between diodes D5 and D6. In addition, a capacitor C4: cs is connected between the anode of the diode D1 and the cathode of the diode D8.
are connected in series.

The connection point between capacitors C4 and C5 is diode D.
It is connected to the connection point f between 3 and D4.

On the other hand, a plurality of capacitors C6 to C8 are connected between the other terminal of the secondary winding n2, which is the second input terminal, and predetermined connection points of the diodes D1 to D8. That is, a capacitor C is connected between the terminals and the connection point 6 between the diodes D1 and D2.
6 is connected. Also, the terminals and diodes D6 and D7
Capacitors C7 and C8 are connected in series between connection point 1 of . The connection point between capacitors C7 and 08 is connected to the connection point q between diodes D4 and D5.

Further, resistors R1 and R2 are connected in series between the output terminal 0 and the ground. This series circuit of resistors R1 and R2 is for detecting the output level of this rectifier voltage multiplier circuit, and the connection point of resistors R1 and R2 is connected to one input terminal (+) of differential amplifier OP. A reference power source EO is connected to the other input terminal (-) of this differential amplifier ○P, and its output terminal is connected to the base of the transistor Q. This one
The collector of the helangistor Q is connected to the connection point f between the diodes D3 and D4 via a resistor R3, and the emitter is grounded. That is, the transistor Q and the resistor R3 constitute a current control circuit.

The operation of the above configuration will be described below.

That is, the square wave AC power supplied to the primary winding n1 of the transformer T first causes both terminals a of the secondary winding n2 to
, b, such that a voltage of <2E[V] is generated such that point a becomes positive. At this time, the capacitor C6 is charged through the diode D1 to a voltage of E[V] with the point d being positive and the point b being negative.

Next, when the voltage is reversed, both terminals a and b of the secondary winding n2
If point b is positive, <2E[V] is generated. In this case, the point e of the capacitor C1 becomes positive up to 3E[V], which is the sum of the voltage 2E[V] across the secondary winding n2 through the diode D2 and the E[V] in the same direction charged in the capacitor C6. It will be charged like this.

Here, when the voltage is reversed again, the capacitor C4 is connected to the voltage E [V] generated between the tap m of the secondary winding n2 and the terminal 8 through the diode D3 and the voltage 3E [V] charged in the capacitor C1. is added and charged to 4E [V] so that the f point becomes positive. At the same time, capacitor C6 is again connected to E'[V] through diode D1.
will be charged up to.

Similarly, when the voltage is sequentially reversed, capacitors C7 and C
2, C8, C3, and C5 are charged in this order, and 1 is charged at the output terminal 0.
A high DC voltage of 2E [V] begins to appear.

It is generally known that in this type of rectifier voltage multiplier circuit, capacitors C4 and C5 are involved in the output ripple voltage, and other capacitors C1 to C3 and C6 to C8 are involved in the DC voltage drop of the output. This is also confirmed by circuit analysis and the following experiment.

In other words, if a variable resistor is connected between point f and ground (between the terminals of capacitor C4) and the current is increased,
Due to the voltage drop caused by the capacitors C1 and C6, the voltage between point f and ground can be significantly reduced. During that time, the voltage between point f and output terminal 0 does not change at all. This shows that the regulation of the output by the load current is relatively stable, and it can be seen that this is an extremely advantageous control means for stabilizing against load fluctuations.

Moreover, the voltage applied to the variable resistor is 1/3 of the output voltage.
Therefore, voltage resistance considerations are extremely easy.

Furthermore, the voltage drop between point f and ground is capacitor C1
Since the voltage drop is caused by C6 and C6, power consumption is extremely small. If the capacitors C1 and C6 are configured with small capacitances, the range of change in the output voltage can be achieved with a smaller control current.

According to experiments, capacitors CI and C6 are set to 100 [pF
l, C2, C3, C7, C8 at 250 [pFl, C4
, C5 is 1000 [pF], and the input voltage amplitude E is 3
00 [■], the frequency was 20 [kHz], and when the variable resistance was changed from ω to 0.7 [MEGΩ], nothing! Load output 3600[V]
In contrast, the output voltage decreased to about 2900 [V].

The voltage between point f and ground at this time is 1200 [V]
to 500 [V]. The power consumed by the variable resistor was only 0.35 [W].

Therefore, the rectifier voltage multiplier circuit configured as shown in FIG.
By detecting P and the reference power source EO and controlling the current flowing through the transistor according to the amount of change, it is possible to effectively suppress fluctuations in the output voltage with a simple configuration and extremely low power consumption.

Other embodiments are shown in FIGS. 2 to 5. However, in FIGS. 2 to 5, the same parts as in FIG. 1 are denoted by the same reference numerals, and different parts will be described here.

First, in FIG. 2, capacitors C11 to C13 are connected in series between the terminals a and j of the secondary winding n2 of the transformer T, the connection point of C11 and 012 is connected to the f point, and the connection point of C12 and 013 is connected in series. The connection point with is connected to h. Also,
Capacitors C14 and C15 are connected between tap m and output terminal 0.
are connected in series, and the connection point of 014 and 015 is connected to point e. Roughly speaking, a capacitor 016 is connected between terminals S and point d, and a capacitor C is connected between terminals S and point i.
17 and C18 are connected in series, and the connection point between C17 and C18 is connected to point 0. A current control circuit consisting of the resistor R3 and the transistor Q is connected to the point e.

Next, in the third factor, in addition to the intermediate tap m, the secondary winding n2 of the transformer T is provided with a tap a' between the intermediate tap m and the terminal a. A tap b' is provided between them. Capacitors C21 and C22 are connected in series between terminals a and j,
The connection point between 021 and 022 is connected to point h. In addition, a capacitor C23 is connected between the terminals a' and e, and a capacitor C23 is connected between the intermediate tap m and the output terminal 0.
24°C25 are connected in series, and the C24 and 02
Connection point 5 is connected to point 9. Roughly, tap above b
A capacitor C26 is connected between the - and d points, a capacitor Q27.028 is connected between the terminals 027 and 1, and the connection point between 027 and 028 is connected to the 9th point 6. A current control circuit consisting of the resistor R3 and transistor Q is connected between point f and ground.

Next, in FIG. 4, capacitors C31 to C33 are connected in series between terminals a and j of the secondary winding n2 of the transformer T, and the connection point between 031 and 032 is connected to point e, and the connection point between C32 and The connection point with 033 is connected to h. Also,
Capacitors C34 and C35 are connected between tap m and output terminal 0.
are connected in series, and the connection point between C34 and 035 is connected to point f. Furthermore, capacitors C36, C37, and C38 are connected in series between the terminals and one point, and the connection point between C36 and 037 is connected to point d, and the connection point between 037 and C38 is connected to point d.
The connection point of is connected to the 0 point. A current control circuit consisting of the resistor R3 and the transistor Q is connected to the point f.

In addition, in FIG. 5, the secondary winding n2 of the transformer T is not provided with a tap, and in the series circuit of diodes 01 to D6, the anode of the diode D1 is grounded, and the cathode is connected to the output terminal O. .

And capacitors 041 to 041 are connected between the terminals a and h.
C43 are connected in series, the connection point between 041 and 042 is connected to point d, and the connection point between C42 and C43 is connected to point f. Further, capacitors 044 to 046 are connected in series between the terminal 0 and the output terminal 0, and the capacitors 044 and 045 are connected in series.
The connection point between C45 and 046 is connected to point e, and the connection point between C45 and 046 is connected to point 0. Roughly speaking, a current control circuit consisting of the resistor R3 and the transistor Q is connected to the point e.

That is, each of the rectifying voltage transmitting circuits shown in FIGS. 2 and 3 is constructed so that the voltage applied to the current control circuit is lower than that of the circuit shown in FIG. This makes it possible to further reduce voltage resistance considerations.

In addition, each rectifier voltage multiplier circuit shown in FIGS. 4 and 5 is
Compared to the circuit shown in Figure 1, it is somewhat disadvantageous in terms of output regulation, but when the voltage between point e and the ground is changed, the voltage between point e and output terminal 0 also changes depending on the number of multiplication stages between them. Since the change increases proportionally, a larger range of change can be expected.

In the above embodiment, the secondary winding of the transformer is used as the input power source, but it goes without saying that any other AC power source can be used as long as the phases match. Furthermore, the tap m provided on the transformer T does not necessarily have to be at the midpoint of the secondary winding n2, and in this case, the same implementation as described above is possible.

[Effects of the Invention] As described in detail above, according to the present invention, it is possible to provide a rectifier voltage multiplier circuit that enables effective control of output voltage with an extremely simple circuit configuration.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of a rectifying voltage multiplier circuit according to the invention, and FIGS. 2 to 5 are circuit diagrams showing other embodiments of the invention. A...AC power supply, ■...Transformer, nl, n2...
・Primary, secondary @ line, m... intermediate tap, 0-・output end, Dl ~ D8-5 i; t-do, C1 ~ c8. C21~
C28, C31-C38, C41-c48... Capacitor, R1-R3... Capacitor, OP... Differential amplifier, EO... Reference power supply, Q... Transistor. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (2)

[Claims] (1) A rectifying means formed by connecting a plurality of rectifying elements in series so that the rectifying direction is the same, and a plurality of capacitors connected in series between both ends of this rectifying means, and connecting each connection point of the capacitors to the above-mentioned predetermined location. a first capacitor means connected to a first connection point between the rectifying elements; and a second capacitor means connected to a capacitor to which an alternating current voltage is applied to a connection point other than the first connection point. and the first and second
A rectifier voltage multiplier circuit in which capacitor means are connected to each of the rectifier means so as not to overlap with each other, further comprising a current control means for controlling a current flowing through at least a part of the first capacitor means. A rectifier voltage multiplier circuit featuring: (2) The rectifier voltage multiplier circuit according to claim 1, wherein the current control means controls the current according to the output of the rectifier.