JPS6146065A - Charge coupled device - Google Patents

Abstract

PURPOSE:To divide signals into signals at some fixed level or lower and signals at some fixed level or higher and output them by constituting an output section by two or more of output sections and dividing signal charges transmitted at every one clock into the output sections and outputting them. CONSTITUTION:A first output section is constituted by a first gate electrode 9 and a drain electrode 10, and a second output section is constituted by a second gate electrode 11, a floating diffusion layer 12, a reset transistor 14 and an output amplifier 13. In such an area CCD solid-state image pickup element, incident- beam signals converted into signal charges by a photoelectric conversion section are outputted as signals, from which signals at some fixed level or higher are not outputted, white-clipped signals, when they are outputted outside the area solid-state image pickup element as signal output voltage. Accordingly, voltage applied to the first gate electrode 9 is set properly, thus avoiding a phenomenon in which the amplifier is saturated, then preventing the deformation of signal waveforms.

Description

Detailed Description of the Invention (Technical Field) The present invention relates to a charge-coupled device. CO
As shown in FIG. 4 (al) and FIG. 4(b), there are two known configurations for extracting the output signal current or voltage to the outside of D (C, H).

5EQUIN and M, F, TOMPSETT; C
HARGETRANS FER DEVICE; P53)
. FIG. 4(a) shows the configuration used in the early COD, with the electrode Φ1 below the photoelectric conversion unit and the vertical transfer register 7.
．． The structure is such that the signal charge transferred by the charge transfer section 6 composed of Φ2 is taken out directly to the drain electrode 10 as a current through the output gate electrode 1. One output gate electrode 1 is provided adjacent to the electrode Φ2 which is the final electrode of the charge transfer section 6, and all signal charges from the charge transfer section 6 pass through the output gate electrode 1 and drain. Electrode 1
Output to 0.

Next, in FIG. 4 (bl is a configuration that is also commonly used at present, and the output section is output gate electrode 1. floating diffusion layer 2. reset) - gate electrode 3. Reset drain electrode 4. It is composed of an output amplifier 5. All signal charges from the charge transfer section 6 are injected into the floating diffusion layer 2 through the output gate electrode 1. This floating diffusion layer 2 is reset and reset immediately before signal charges are injected.
by the reset pulse applied to the gate electrode 3), a certain voltage (by the voltage applied to the reset drain electrode 4,
and reset gate electrode 3 and 70-ting diffusion layer 2
(voltage determined by the stray capacitance between 70 and the capacitance of the diffusion layer 2). This voltage and 7
The charge determined by the capacitance of the 0-Ting diffusion layer 2 is discharged by the signal charge injected into the 70-Ting diffusion layer 2 through the output gate electrode 1t, and the discharged amount is output as a signal voltage via the output amplifier 5. be done. In this way, all signal charges from the charge transfer section 6 are outputted through the gate electrode 1.

In this way, in the conventional COD, all signal charges from the charge transfer section 6 are outputted as output signal current or output signal voltage, so when signal processing is performed using the output signal of the COD, excessive The disadvantage is that the amplifier saturates for a large output signal and the output signal waveform is distorted.

(Object of the Invention) An object of the present invention is to provide a charge-coupled device that eliminates the drawbacks of the prior art and facilitates signal processing.

(Structure of the Invention) The structure of the present invention includes a charge transfer section for transferring signal charges, and a charge transfer section provided on one side of the charge transfer section so as to output the signal charges transferred by the charge transfer section to the outside. In the charge-coupled device comprising an output section, the output section has two output sections.
The present invention is characterized in that the signal charge sent from the charge transfer section every clock is divided and outputted from the output portions through two or more output portions.

(Example) Next, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing a charge coupled device according to an embodiment of the present invention. In the figure, this example shows a two-dimensional CO
This was implemented on a D solid-state image sensor. This device is composed of a photoelectric conversion section, a vertical transfer register 7, and a charge-coupled device that operates with two-phase clock pulses to horizontally transfer signal charges transferred from the vertical transfer V distaff for each horizontal scanning period. a charge transfer section 8, a first gate electrode 9, a drain electrode 10, a second gate electrode 11,
It is configured to include a floating diffusion layer 12, an output amplifier 13, and a reset transistor 14 whose source electrode is connected to the floating diffusion layer 12. here,
The first gate electrode 9 and the drain electrode 10 constitute a first output section, and the second gate electrode 11, the floating diffusion layer 12, the reset transistor 14, and the output amplifier 1
3 constitutes the second output section. This second output is
It may have the same configuration as described in the prior art and will operate in the same way.

The operation of this embodiment will be explained using FIGS. 2 and 3. FIG. 2 shows the voltage waveforms applied to the two-dimensional COD solid-state image sensing device of this embodiment shown in FIG. Waveform C is a DC voltage applied to the second gate electrode 11, and waveform d is a gate pulse applied to the first gate electrode 9. Two types of clock pulses (a,
b) has complementary waveforms with opposite polarities, and the signal charge transfer operation is such that when electrode Φ1 falls, electrode Φ2 rises, and the signal charge accumulated directly under electrode Φ1 is It is transferred and accumulated directly under the electrode Φ2. When the electrode Φ2 falls and the electrode Φ2 rises, this signal charge is transferred and accumulated directly under the electrode Φ. The signal charges sequentially transferred in this manner are sent to the first output section and the second output section.

Next, the operation of the first and second output sections at the portions of the charge transfer section closest to the output section will be described. A gate pulse d is applied to the first gate electrode 9, and this gate pulse rises immediately before the fall of the clock pulse applied to the electrode Φl. From the end of the falling period until the rising, E3V (E+ > E3
) is the pulse. In addition, the direct a voltage EzV applied to the second gate electrode 11, El>El>E3
It is a voltage having an O relationship. That is, the potential level directly below the first and M2 gate electrodes 11 is shallowest when E and V are applied to the first gate electrode 9, and the next level is immediately below the second gate electrode 11 to which E2V is always applied. The deepest potential level is when EIV is applied to the first gate electrode 9.

Therefore, readout of signal charges at each time from TI to T4 in FIG. 2 will be explained using FIG. 3. At time T, voltage is applied to electrode Φl, so electrode Φ
The signal is stored directly below l. At time T, the voltage applied to the electrode Φl decreases and the voltage applied to the electrode Φ2 increases, so that the signal charge is generated at the electrode Φ2.
As a potential well is formed directly under the
The signal charge stored directly under the electrode Φ1 flows into the potential well directly under the electrode Φ2.

At this time, the potential level directly below the first gate electrode 9 is deeper than the potential level directly below the second gate electrode, so the Φl electrode Φ! which is closest to the output section! L
A part of the signal charge stored directly below passes through the first gate electrode 9t'' and is absorbed by the drain electrode 10. Therefore, the maximum amount of signal charge stored directly below the electrode φ2 closest to the output section QIIIAI is determined by the difference between the potential level when EIV is applied to the first gate electrode 9 and the potential level at the bottom of the potential well directly below the electrode ψ2.In other words, at time T3, the signal charge of QMA1 or more is directly below the φIL electrode. Even if the excess signal charge is transferred from the φ21 electrode directly below the first gate electrode 9
The φ2. ．．
Only signal charges below QMAX can be stored directly under the electrode. At time T4, the potential level directly below the second gate electrode 11 is lower than the potential level of the first gate electrode ti9, so the signal charge stored directly below the N pole of φzb is transferred to the second gate electrode 11t. Through, 70
- is injected into the diffusion layer 12, passes through the output amplifier 13, and is output as a signal voltage. That is, this two-dimensional CC
In a D solid-state image sensor, an incident optical signal converted into a signal charge in a photoelectric conversion section is output as a signal output voltage to the outside of the two-dimensional solid-state image sensor, so that a signal exceeding a certain level is not output. Therefore, by appropriately setting this white clipping level, that is, the voltage of EIV applied to the first gate electrode 9, the signal processing circuit that processes this output signal, The phenomenon of amplifier saturation can be avoided,
This has the effect of preventing the signal waveform from being deformed.

As described above, regarding the embodiments of the present invention, two-dimensional COD
Although the explanation has been made using a solid-state image sensor, this can also be applied to a one-dimensional COD solid-state image sensor using a charge transfer element, as well as a two-dimensional solid-state image sensor such as a CPD in which the horizontal charge transfer section is composed of COD. It's obvious what you can do.

(Effects of the Invention) According to the present invention, as explained above, two output sections are provided at one end of the charge transfer section that transfers signal charges, and the signal charges sent every clock are output from these two output sections. By dividing the signal into parts and outputting it, it is possible to divide and output the signal for each clock into a part of the signal below the level and a part of the signal above the level. When performing signal processing, it is possible to realize a signal processing circuit that does not cause waveform distortion.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a charge coupled device according to an embodiment of the present invention, Fig. 2 is a voltage waveform diagram applied to some electrodes of the embodiment shown in Fig. 4(a) and 4(bl) are block diagrams showing the conventional charge-coupled device, respectively.In the top view, 1.9
．． 11... Gate electrode, 2°12... 70-ting diffusion layer, 3... Reset gate electrode, 4... Reset drain electrode, 5, 13... Output amplifier, 6
, 8... Charge transfer section, 1o pad drain electrode, 7...
Photoelectric conversion unit and vertical transfer register.

Claims (1)

[Claims] A charge-coupled device comprising a charge transfer section for transferring signal charges and an output section provided at one end of the charge transfer section so as to take out the signal charges transferred by the charge transfer section to the outside. The section includes at least two output sections, a first and a second output section, and the signal charge sent from the charge transfer section every clock is transmitted to at least the first and second output sections.
A charge-coupled device characterized by having a configuration in which the output is divided into a second output portion.