JPS614466A - Dc/dc converter - Google Patents
Dc/dc converterInfo
- Publication number
- JPS614466A JPS614466A JP12394584A JP12394584A JPS614466A JP S614466 A JPS614466 A JP S614466A JP 12394584 A JP12394584 A JP 12394584A JP 12394584 A JP12394584 A JP 12394584A JP S614466 A JPS614466 A JP S614466A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- diode
- voltage
- transistor
- transformer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/338—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野１
この発明は、ブロッキング発振を利用した、ＤＣ−ＤＣ
コンバータ装置に関する。[Detailed Description of the Invention] [Industrial Application Field 1] This invention is a DC-DC system using blocking oscillation.
The present invention relates to a converter device.
し従来技術とその問題点］
第３図に従来のＤＣ−ＤＣコンバータの回路を示す。二
の回路の簡単な動作説明をすると、１）起動時 直流電
源ＥＤｏを投入した一番最初は抵抗Ｒ２を介しトランジ
スタＴ１
のベースに電流が流れる。この時の
電流は小さい為、長い間トランジス
タＴ１をオンする事は出来ないが、
−瞬トランジスタＴ１が、オンする
事により、トランスＴｒの巻線ｎ１
抵抗Ｒ１・コンデンサＣ１を介しト
ランジスタＴ１にベース電流を供給
する。Prior Art and its Problems] FIG. 3 shows a circuit of a conventional DC-DC converter. A simple explanation of the operation of the second circuit is as follows: 1) At startup When the DC power supply EDo is turned on, current flows to the base of the transistor T1 via the resistor R2. Since the current at this time is small, it is not possible to turn on the transistor T1 for a long time. supply.
２）オン時 第４図にオン時の各部の電圧、電流波形を
示す。2) When turned on Figure 4 shows the voltage and current waveforms of each part when turned on.
トランスＴｒの巻線ｎ１から供給さ
れるべ“−スミ流１ｂは、バイパスコンデンサＣ１と抵
抗Ｒ１の時定数で減
少してくる。一方トランジスタＴ１
のコレクタ電流ｉｃはトランス１次巻
線ｌｉｐのインダクタンスｆｏｐをオンするため直線的
に増加する。従ってト
ランジスタＴ１のコレクタ電流ｉｃが
電流増幅率ｈｆｅＸ１ｂ＜ｉｃとなった時トランジスタ
Ｔ１はオフする。The base current 1b supplied from the winding n1 of the transformer Tr decreases with the time constant of the bypass capacitor C1 and the resistor R1. On the other hand, the collector current IC of the transistor T1 decreases due to the inductance fop of the transformer primary winding lip. Therefore, when the collector current ic of the transistor T1 becomes the current amplification factor hfeX1b<ic, the transistor T1 is turned off.
３）オフ時 第５図にオフ時の各部の波形を示す。3) When off: Figure 5 shows the waveforms of various parts when off.
トランジスタＴ１が一瞬オフすると 巻線ｎ１に逆起電圧−Ｅｌが発生し Ｒ１−Ｃ１を介しトランジスタＴ１ に逆バイアス電流を流し完全にＴ１ をオフさせる。オン期間にコンデン サＣ１に蓄えられた電荷は抵抗Ｒ２ により放電される。（ＴＩの逆バイ アス電流は一瞬で、流れなくなって しまう。） このオフ期間ＴＯＦＦはトランジス タＴ１のオン期間にトランスＴｒに 蓄えられたエネルギーが負荷ＲＬで 消費され巻線ｎ１の逆起電力が低下 する迄続く。When transistor T1 turns off momentarily, A back electromotive force -El is generated in the winding n1. Transistor T1 via R1-C1 A reverse bias current is applied to completely T1. turn off. Condensation during on period The charge stored in the resistor C1 is the resistor R2 is discharged by. (TI reverse buy The ass current stops flowing in an instant. Put it away. ) This off period TOFF is a transistor During the ON period of T1, the transformer Tr is The stored energy is applied to the load RL. consumed and the back electromotive force of winding n1 decreases It will continue until it is done.
以上の動作が繰り返される事により、スイッチング動作
を行う。また、パルス幅制御回路７は入力電圧ＥＤｃを
徐々に上げていった場合出力電圧Ｅｏが目標値まで達し
すこ以後動作する。また出力型わされる。By repeating the above operations, a switching operation is performed. Furthermore, when the input voltage EDc is gradually increased, the pulse width control circuit 7 operates after the output voltage Eo reaches the target value. It is also an output type.
上述の従来技術の回路に於て入力電圧Ｅ、。が低い電圧
から出力電圧Ｅｏを目標値にまで達する様にするには、
ｉ） コンデンサＣ１の容量を大外（する。（トランジ
スタＴ１のオン時のコンデンサＣ１の充電時定数を大と
くする）
ｉｉ）抵抗Ｒ２の抵抗値を小さくする（ トランジスタ
Ｔ１のオフ時のコンデンサＣ１の放電時定数を小さくす
る）
方法がある。In the prior art circuit described above, the input voltage E,. In order to make the output voltage Eo reach the target value from a low voltage, i) Increase the capacitance of the capacitor C1 (increase the charging time constant of the capacitor C1 when the transistor T1 is on) ii) There is a method of reducing the resistance value of the resistor R2 (reducing the discharge time constant of the capacitor C1 when the transistor T1 is off).
特に１１）の場合入力電圧ＥＤｃが高い場合抵抗Ｒ２の
損失が天外くなり許容損失の大きい抵抗が必要となる。Particularly in the case of 11), when the input voltage EDc is high, the loss of the resistor R2 becomes extraordinary, and a resistor with a large allowable loss is required.
ｉ）の場合もやはりコンデンサ、抵抗が天外くなり、コ
ストの上昇や寸法が大型化するなどの問題点がある。In the case of i), the capacitors and resistors are too large, and there are problems such as increased cost and increased size.
［発明の目的］
この発明は入力直流電圧が低い場合でも所望の高い出力
直流電圧およびまたは多くの電力を得ることができる、
小型で安価なりＣ−ＤＣコンバータな提供することを目
的とするものである。[Object of the invention] The present invention can obtain a desired high output DC voltage and/or a large amount of power even when the input DC voltage is low.
The purpose is to provide a compact and inexpensive C-DC converter.
［発明の構成］
第１図において、トランジスタＴ１のベース電流供給用
のバイパスコンデンサＣ１の抵抗Ｒ２との接続側端子と
電源Ｅ、。どの間に放電用のダイオードＤ２がそのカソ
ードをコンデンサＣ１側に向けて接続される。[Structure of the Invention] In FIG. 1, the connection side terminal of the bypass capacitor C1 for supplying the base current of the transistor T1 to the resistor R2 and the power source E. In between, a discharge diode D2 is connected with its cathode facing the capacitor C1.
他の構成は第３図に示した回路と同様である。The other configurations are similar to the circuit shown in FIG.
基本的な動作は従来技術の項で説明したものと全く同じ
であるが、放電用のダイオードＤ２を設けることにより
トランジスタＴ１のオフ時に、ダイオードＤ２を介して
バイパスコンデンサＣ１の電荷を強制的に放電する。こ
の時の各部電圧・電流波形を第２図に示す。The basic operation is exactly the same as that explained in the prior art section, but by providing a discharging diode D2, when the transistor T1 is off, the charge of the bypass capacitor C1 is forcibly discharged via the diode D2. do. Figure 2 shows the voltage and current waveforms at each part at this time.
午、トランジスタＴ１のオン時にコンデンサＣ１に充電
される場合の時定数が同じであるとするとオフ状態から
オン状態に変化する時点のコンデンサＣ１の両端電圧Ｖ
Ｃが低い程、スイッチングトランジスタＴ１に、より長
い時間大きなベース電流を供給でトる。第２図に示すよ
うにコンデンサＣ１の両端電圧ＶＣはＴｏＦＦの期間中
にダイオードＤ２によりすみやかに放電されるとともに
、逆起電圧−Ｅｌにより十分に低い電位、すなわち逆方
向に高い電位まで引き下げられる。このように、ダイオ
ードＤ２の追加で前記した本発明の目的か達成される。If the time constant is the same when the capacitor C1 is charged when the transistor T1 is turned on, the voltage across the capacitor C1 at the time of changing from the off state to the on state is V.
The lower C is, the longer a large base current can be supplied to the switching transistor T1. As shown in FIG. 2, the voltage VC across the capacitor C1 is quickly discharged by the diode D2 during the ToFF period, and is lowered to a sufficiently low potential, that is, a high potential in the reverse direction, by the back electromotive voltage -El. In this way, the above-mentioned object of the present invention is achieved by adding the diode D2.
［発明の効果］
この発明によれば゛、ダイオードによってブロッキング
発振用コンデンサを放電させて、２次電圧増加を可能と
したものであり抵抗Ｒ２、コンデンサＣ１に非常に小さ
い部品が使用できかつ大きな容量のＤＣ−ＤＣコンバー
タの実現できると共に低い入力電圧ＥＤｃから安定した
出力電圧が得られる。[Effects of the Invention] According to this invention, it is possible to increase the secondary voltage by discharging the blocking oscillation capacitor using a diode, and it is possible to use very small components for the resistor R2 and the capacitor C1, and to achieve a large capacitance. This DC-DC converter can be realized and a stable output voltage can be obtained from a low input voltage EDc.
第１図はこの発明の一実施例を示す回路図、第２図は第
１図の動作説明図、第３図は従来のＤＣ−ＤＣフンバー
クの一例を示す回路図、第４図と第５図は第３図の回路
の動作説明図である。
Ｔｒ・・・トランス
Ｔ１・・・トランンスタ
Ｅ、。・・・直流電源
Ｃ１・・・バイパス用のコンデンサ
Ｄ２・・・ダイオード。
特許出願人 富士電機製造株式会社
代 理 人 弁理士 青白 葆 外２名第２図
ＩＯＩFIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of FIG. The figure is an explanatory diagram of the operation of the circuit of FIG. 3. Tr...Transformer T1...Transformer E. ...DC power supply C1...Bypass capacitor D2...Diode. Patent applicant: Fuji Electric Seizo Co., Ltd. Agent: Patent attorney: 2 people including Aobai Ao and others Figure 2 IOI
Claims (1)
タに於て、トランスの一次側に接続されたスイッチング
トランジスタのベース電流供給用バイパスコンデンサの
放電時間を強制的に早めるようにこのコンデンサにダイ
オードを接続したことを特徴とするＤＣ−ＤＣコンバー
タ。(1) In a DC-DC converter that uses blocking oscillation, a diode is connected to the bypass capacitor connected to the primary side of the transformer to forcibly accelerate the discharge time of the bypass capacitor that supplies the base current of the switching transistor. A DC-DC converter characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12394584A JPS614466A (en) | 1984-06-15 | 1984-06-15 | Dc/dc converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12394584A JPS614466A (en) | 1984-06-15 | 1984-06-15 | Dc/dc converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS614466A true JPS614466A (en) | 1986-01-10 |
Family
ID=14873232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12394584A Pending JPS614466A (en) | 1984-06-15 | 1984-06-15 | Dc/dc converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS614466A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11672334B2 (en) | 2010-07-30 | 2023-06-13 | Ergotron, Inc. | Display positioning apparatus and method |
-
1984
- 1984-06-15 JP JP12394584A patent/JPS614466A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11672334B2 (en) | 2010-07-30 | 2023-06-13 | Ergotron, Inc. | Display positioning apparatus and method |
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