JPS6144427B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in switching systems used in digital communication systems. In particular, it relates to multiplexing and distribution processing of time division multiplexed data in a group of central office line termination equipment (hereinafter referred to as "DCEC") of a time division line data exchange.

Regarding multiplexing and distribution processing equipment for time division multiplexed data in the central office side line termination equipment group of conventional time division line data exchange equipment, please refer to Research and Practical Application Report, Vol. 25, published by Musashino Telecommunications Research Institute, Nippon Telegraph and Telephone Public Corporation.
No. 12 (1976).

In conventional equipment, when accommodating DCECs with different line speeds in one DCEC group, line speed information for each DCEC is required when time division multiplexing distribution of data to each DCEC is performed by the DCEC group control unit. , and the speed information alone may result in vacant mounting positions within the group. Also multiple
When the DCEC is assembled as a single hardware unit, there is a drawback that all the devices cannot be used. The above disadvantages can be eliminated if each DCEC or DCEC group has storage location information, but since this information is located in a different location from the exchange itself, there is a disadvantage that there may be a mismatch with the information held in the exchange itself. Ta.

The present invention eliminates the above drawbacks by transmitting accommodation position information of each device in the DCEC group to the control unit of the device in synchronization with the transfer of transmitted data and received data between the DCEC group and the communication path. and DCEC
If there is no unnecessary empty space in the device storage location within a group, and if multiple devices are grouped together as a single hardware unit, it is recommended to provide a time-division line data exchange that can use all of the devices. This is the purpose.

The present invention provides information on communication paths of line data exchange equipment.
A reception data buffer buffers the time-division multiplexed reception data sent from the DCEC group, reads it periodically according to the call connection information, and sends the read data out to the communication path. Writes the incoming data according to the call connection information, reads it according to the line speed and accommodation position of each DCEC in the corresponding DCEC group, and writes the read data.
A line control memory LCM is provided corresponding to a pair of transmission data buffers that are sent to a group of DCECs and distributed to each DCEC in the common part. This LCM
The accommodating position information of each DCEC in this DCEC group is stored in the DCEC group, and the line control memory is read out in synchronization with the data transfer between the DCEC group and its corresponding receiving data buffer and transmitting data buffer, and the accommodating position information is stored in the DCEC group. Sends information to its DCEC group control unit. The DCEC group control unit performs time-division multiplexing of received data from each DCEC and distribution of read data from the transmission data buffer to each DCEC according to this accommodation position information.
To eliminate the need for speed information that a DCEC group control unit receives from each DCEC, and to allow DCEC storage positions to be arbitrarily assigned from the exchange main body. Furthermore, when a plurality of DCECs are integrated into one piece of hardware, a time-division line data exchange is configured that can use the plurality of DCECs without waste.

In addition, when a number that is not used as an accommodation position is sent to a DCEC group as information indicating a DCEC accommodation position in the data exchanger described above, within that DCEC group, the sent data corresponding to the accommodation position information is folded as received data. It is characterized by configuring a data exchanger having a function of returning data. This function enables automatic loopback testing of each control unit in each DCEC group.

In addition, in the above data exchange, by adding other control information to the information indicating the DCEC accommodation position, this additional control information allows the DCEC to be
The present invention is characterized by configuring a time-division data exchange capable of various types of control. This feature allows DCEC
This enables automatic loopback testing and automatic connection of the line to the testing machine.

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a timing chart of some of the signals, and FIG. 3 is a partially enlarged timing chart. In Figure 1, SDB1 (K) is the transmit data buffer, RDE1 (K) is the receive data buffer, LCM1 (K) is the line control memory, and the three memories are the DCEC group (office side line termination equipment group) 1 (K). When transmitting and receiving data, an address is given by the data read from the channel allocation memory CAM1(K). All channel allocation memories are periodically given the same address. This cycle is one frame shown in Figure 2,
In this embodiment, one frame consists of 10 channels. The address is generated by a decimal counter.

As shown in FIG. 3, one channel of transmission data SD and reception data RD consists of 8 bits of information (6 data bits + F bits + S bits). Mutual transmission and reception of transmitted and received data within the exchange, that is, communication between the DCEC and the transmitting and receiving buffers and between the transmitting and receiving buffers via the time division switch, is all performed in this unit. Also, line control memory
Read from LCM1(K), DCEC group 1
(K) Line control data LCD1 (K) for controlling the multiplexing and distribution of transmitted and received data in the common section consists of 4-bit data _B1 to _B4 for each channel, as shown in FIG.

The data received by each DCEC in the DCEC group is
8 bits of information (6 data bits + F
It can be summarized in the form of bit + S bit). One DCEC is selected for each channel by the read data LCD of the line control memory LCM, and the received data summarized in the form of 8-bit information is sent as received data RD to the received data buffer RDB, and the channel allocation memory CAM is written to the address specified by the output MA. Receive data buffer
The data written to the RDB is written according to the call connection information.
Read as highway reception data HWRD,
After passing through the time division switch, the transmission data buffers SDB1 to SDBK are selected according to the call connection information.
is written to one address in one of the buffers. The data written to the transmission data buffer SDB is read by selecting one address of the transmission data buffer SDB for each channel by the output MA of the channel allocation memory CAM, and the data written to the transmission data buffer SDB is read out by selecting one address of the transmission data buffer SDB for each channel.
It is sent to the DCEC group control unit as a. There, one DCEC is selected for each channel by the line control data LCD as in the case of received data, and the data sent as received data RD is selected by the line control data LCD.
The data is sent to the DCEC, which then sends this data to the subscriber.

As mentioned above, when the data received by each DCEC is multiplexed as reception data RD, and when the data multiplexed as transmission data SD is multiplexed,
When distributing data to DCECs, the DCEC group control unit can select any DCEC according to the line control data LCD, and the line control data LCD writes data from the switch control unit to the line control memory LCM. By doing so, it is possible to arbitrarily specify the mounting position of the DCEC, making it possible to flexibly allocate the mounting position of the DCEC.

Figures 4 to 7 show one DCEC group in Figure 1, memory address MA, line control data.
The relationship between the mounting positions of LCD and DCEC is shown for two examples. Two types of DCEC, namely DCEC-
There is A and DCEC-B, and DCEC-B is DCEC-A.
Assume that the data rate is twice that of . Therefore, one DCEC is accessed once in one frame, whereas DCEC-A accesses one DCEC once in one frame.
In DCEC-B, it has been twice. In addition, the hatched portions in FIG. 5 or 7 indicate DCEC mounting positions or unused portions such as memory addresses.

In Fig. 4, the numbers 1, 2, 3, 7, 6, 5, 4, 8,
Data is written in the positions shown at 9 and 10, and when read out in synchronization with the transmission data SD and the reception data RD, the transmission data SD from channel 1 to channel 10 as shown in FIG.
are the corresponding codes DCEC1, 2, 3,
7, 6, 5, 4, 8, 9, 10. Conversely, the data from those DCECs are multiplexed in that order into channels 1 to 10 of the received data RD.

In Figure 6, the 4th and 7th DCECs in the DCEC group are twice as fast as the other DCECs, and channel 3 and channel 8 are respectively implemented in one frame as shown in Figure 7. , channel 5 and channel 10 are accessed twice each. The number of usable channels in one frame is 1
In the case of FIG. 6, since DCECs with high speed are connected, the number of DCECs is 8 in total, and the DCEC mounting positions 9 and 10 are not used.

In this example, it is connected to one DCEC group.
While the maximum number of DCECs is 10, the number of mounting positions that can be specified by the line control data LCD is 16.
Therefore, the mounting positions 11 to 16 can be used for another purpose.

FIG. 8 shows an embodiment in which the mounting position 11 is used as a return signal path for testing. Data sent now
Line control data for one SD channel
When the mounting position 11 is specified on the LCD, the data of that channel is input again to the DCEC group control unit via this test return signal path, and the received data
It is multiplexed as an RD and sent to the reception data buffer RDB. Using this function, from the main body of the exchange,
By sending data to the return signal path of each DCEC group and comparing it with the return data, each
It becomes possible to test the DCEC group control unit from the switch itself.

In Figure 3, sending data SD and receiving data RD
Each channel consists of 8 bits of data, whereas the line control data LCD uses only 4 bits. Use this vacant position to
It is possible to send control data to DCEC and perform various controls on DCEC.

In FIG. 9, a return signal path is provided in the DCEC, and a selection circuit for selecting either the data from the subscriber line or the return signal path is provided on the subscriber line side of the receiving circuit. Line control data
An example will be described in which control can be performed using the vacant position of the LCD, and tests can be performed from the exchange main body of each DCEC.

In Fig. 10, a lead-in circuit to the tester is provided at the exit from the DCEC to the subscriber line, and this lead-in circuit can be similarly controlled using the vacant position on the line control data LCD. An example will be described in which automatic test of the user line can be performed.

As explained above, the present invention provides a line control memory LCM for a pair of transmission data buffers and reception data buffers.
LCM is a pair of data buffers and corresponding DCEC
It is read in synchronization with the transmission and reception of data between groups, and selects one DCEC for each channel of that data. Furthermore, since the contents of this line control memory LCM can be arbitrarily controlled from the main body of the exchange, it is possible to flexibly allocate the mounting position of the DCEC.
Especially when DCEC with different speeds are mixed
Efficient use of mounting positions within the group can be achieved. Furthermore, when multiple DCECs are integrated into one piece of hardware, it becomes possible to use DCECs without waste.

Furthermore, there is plenty of DCEC number that can be specified on the line control data LCD, and it is not possible to actually implement it.
If the number is larger than the number of DCECs, use the margin to provide a test return signal path for the DCEC group.
It becomes possible to test the DCEC group control unit from the switch itself.

Furthermore, if there is a margin in the amount of information that can be sent to the DCEC group using the line control data LCD, and control information other than the DCEC number can be sent, this margin can be used to perform automatic loopback tests for each DCEC. Entrance exams, etc. will be possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a switch showing an embodiment of the present invention. FIG. 2 is a timing chart showing the state of some signals in FIG. 1. Figure 3 is a timing chart with a part of it enlarged. FIG. 4 is a block diagram showing a configuration example in which one DCEC group is extracted from the example of FIG. 1 and all DCECs in that group are composed of the same DCEC. FIG. 5 is a timing chart showing the state of the signal. Figure 6 shows DCEC within the group.
FIG. 3 is a block diagram showing an example of a configuration when the DCEC is composed of two types of DCEC. FIG. 7 is a timing chart showing the state of the signal. Figure 8 is an example of setting up a test loop signal path using vacant DCEC numbers. Figure 9 shows how to use the free information position on the line control data LCD.
An example of controlling the return signal path and subscriber line selection circuit installed in the DCEC so that DCEC return tests can be performed from the switch itself. Figure 10 shows an example in which the vacant information position is also used to control the lead-in circuit to the tester installed in the DCEC to enable automatic lead-in testing of the DCEC. SDB...Transmission data buffer, RDB...Reception data buffer, LCM...Line control memory, SD
...Transmission data, RD...Reception data, LCD...
Line control data, DCEC...station side line termination equipment,
CAM...Channel allocation memory, MA...Memory address, HWSD...Highway transmission data,
HWRD...Highway reception data, 10CTR...
...Decimal counter, CH...channel.

Claims (1)

[Claims] 1. A group of a plurality of station-side line termination devices (DCEC) constituting a communication path and the station-side line termination devices (DCEC)
In a line data exchange method in which transmission data and received data are time-division multiplexed in units of multiple bits between buffer memories placed corresponding to each group, and signals are time-divisionally exchanged in units of multiple bits, the above method is used. Information indicating the accommodation position in the station-side line termination equipment group, which is read out in synchronization with the time division multiplexed data from the line control memory placed corresponding to the buffer memory for multiplexing and/or distribution of the transmitted data and received data. A time-division data exchange system characterized in that the data transfer between the buffer memories is performed according to the connection information that the exchange has for calls. 2. When the number of an unaccommodated position is sent to the station-side line termination equipment group as information indicating the accommodation position, the data corresponding to the information indicating the accommodation position is sent back within the station-side line termination equipment group. control to do so. A time division line data exchange system according to claim 1, characterized in that: 3. The time-division line data exchange system according to claim 1, characterized in that test control information is added to the information indicating the accommodation position, and a test is performed in accordance with this control information.