JPS6143796A - Voice recorder - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Field) The present invention relates to an audio recording device, and in particular to an audio recording device that is equipped with a number of different encoding circuits and can be selectively switched to improve the quality of recorded sound.

(Prior art) Pulse code encoding method (P
CM), delta modulation method (DM).

Adaptive data modulation method (ADM), differential pulse code method (DPCM), adaptive differential pulse code method (ADMPC)
M) etc. Here, pulse code encoding method (PCM
) samples the audio waveform at certain intervals, converts the audio value at each sampling point from analog to digital, and displays the value by code of 0 and l. When 5 signal values are digitally encoded. The required Pino 1-loss is determined by the request for how faithfully you want to record the original analog signal; the more bits you increase, the more minute changes in the signal will be recorded, and the less noise will be caused by digital errors. Although the sound quality is good and the sound is close to the actual sound waveform, the disadvantage is that it requires a large amount of memory. In order to record a lot of audio information in the limited memory capacity,
There is a delta modulation method (DM) in which audio information must be compressed efficiently, and the information of one audio signal has a minimum of 1 bit. In the DM system, by simply comparing this signal with the next signal at a certain timing and seeing whether it has gone up or down, it is possible to determine whether the primary audio signal value is higher or lower than the current value, and if it is higher, then The code 1 is given, and if it is low, the code O is given, and the audio signal is encoded.

Therefore, the memory only needs to be one bit for each sampling clock.In this way, it requires less memory, so it can be stored for a long time. With this method, you can memorize up to 100 seconds, which is 10 times to 8 times. However, since the analog value changes by only one step for one crotch, there is a drawback that the sound quality deteriorates. In addition, there is a differential pulse code modulation (DPCM) that can be called an intermediate method between these DM and PCM methods, in which the 1-bit quantization part in the delta modulation method is replaced with multiple bits, and the predicted audio signal value is This method directly uses the residual signal value from the voice. However, in this case, it is not possible to memorize the slope at which it is ascending, and the adaptive delta modulation method (ADM) attempts to take this slope into account, and the amplitude value was constant in the DM method, but The ADM system is designed to be changeable.

Other adaptive differential pulse code variation methods (ADP CM
), etc., and all 1 and above have advantages and disadvantages.

[Disadvantages of conventional technology]

In other words, in conventional recording functions, the encoding method for recording audio is generally fixed, so the same data compression rate or bit rate is used for audio of any nature. If there are restrictions on the size or cost of equipment such as
It was difficult to utilize it.

For example, in order to obtain the required characteristics (commutability, clarity, fidelity, bandwidth, etc.) even for the most difficult input voice,
Even if an input voice with many redundant parts, such as low fifths, is input, the ratio of the redundant parts to the recorded data is large because the same encoding method is used. In addition, if the practical characteristics are maintained at 61", the memory capacity is limited and practical recording time cannot be achieved.Also, the memory capacity can be increased, but the shape of the tJ31 is also large, making it suitable for use in wristwatches, etc. Not only will this not be possible, but it will also become more expensive.

Furthermore, in order to adopt the optimum encoding method for general speech, not all of the various input speech may be optimally recorded and reproduced. In other words, it may be unsuitable for the characteristics and sound quality of the input audio.

[Purpose of the invention]

Taking these points into consideration, the present invention utilizes a pulse code encoding method (PCM) that stores audio signals in a form close to the original audio.
), delta modulation method (DM), adaptive delta modulation method (A
DM), differential pulse code method (DPCM), and other encoding methods, allowing long-time recording even with limited memory capacity by selecting and switching according to sound quality, etc. The object of the present invention is to provide an audio recording device that not only enables recording but also improves recording sound quality.

[Example] Next, the present invention will be described in Example 1. Second. A description will be given using a circuit block diagram of a third different embodiment.

Fig. 1 shows the first embodiment, which is a circuit in which the encoding circuit can be switched according to the characteristics of the voice to be recorded by the user's switch operation.
If encoding circuit A9 is for music, encoding circuit B with good sound quality is selected, and so on. Reference numeral 1 denotes an operation switch section comprising a plurality of switches 1a to 1n, which selects one of a plurality of encoding circuits to be described later by operating the switch 1a. 2 is a switch input circuit, 3 is 1l
ilJ control circuit; 4 is a pulse generation circuit that generates one-shot pulses for counting when switch la is operated; 5 is a 2-bit encoding system number (code) for counting one-shot pulses from pulse generation circuit 4; )
6a is a decoder for decoding the contents of counter 5, 6b is a decoder for switching the encoding circuit, and 7a to 7d are analog signals from the low-pass filter 11 to the aforementioned PC.
M.

DM, ADM, DPCM, etc. are encoding circuits that encode using different methods, 8a to 8d are data transfer gates, 9 is a microphone, 10 is an amplifier, and 11 is a low-pass filter for canting low frequencies of voice. . Also, 1
3 is a recording memory of 256 bits to 1 Mbit, for example, consisting of a RAM (random access memory) that sequentially stores encoded data; 14a, 1;
4b is a latch circuit for encoding and decoding, 15 is a memory control circuit, and 16a=16d is a decoding circuit.

17a to 17d are data transfer gates, 19 is a mixer circuit, 20 is an amplifier circuit 221 is a speaker, and 22 is a sound source other than the recorded sound such as 4-11 sound.

FIG. 1 shows an electronic wristwatch using the audio recording circuit of the present invention, and the circuit configuration including the basic circuit of the electronic wristwatch will be explained below.

The high frequency signal of the oscillation 823 composed of a crystal oscillator etc. is 9
The 0 frequency divider circuit 24 input to the frequency divider circuit 24 is the oscillator 23
It frequency-divides the input signal from and outputs a signal 111z to the clock circuit 25, and also inputs a signal of a constant frequency to the control circuit 3 as a timing clock signal. Clock circuit 25
Now, convert the 1Hz input signal to a time display signal such as 1 minute 1 hour.

The signal is input to the display control circuit 26, and the 1-display control circuit 26 performs necessary voltage control and the like on the display section 27, and the 1-display section 27 displays the time.

Further, the time display signal of the clock circuit 25 is transmitted to the coincidence detection circuit 28.
When the time coincides with the time preset in the alarm time memory 29 via the control circuit 3 by the switch of the operation switch unit 1, a coincidence signal is inputted from the coincidence detection circuit 28 to the control circuit 3.

In response to this coincidence signal, the control circuit 3 outputs a control signal 12 to a memory control circuit 15 (described later), operates a first encoding circuit, etc., and transmits the audio stored in the memory 13 to the speaker 2.
Output from 1.

From the control circuit 3, a switch I of the operation switch section l is connected.
When M+< is operated, a control signal 1B is output to the memory control circuit 15, and when the memory control circuit 15 receives the control signal 18, it supplies a clock signal to the encoding latch circuit 14a. At the same time, a write signal and completion trace signals A to AM are sequentially supplied to the memory 13, and when the control signal 12 is given, the restoring latch circuit 14b
It is configured to supply a clock signal to the address signal, and sequentially supply 0 to Δ to the read signal and address signal.

The operation of the above configuration will be explained below.

First, the user selects a desired encoding method by operating the switch la to generate a one-shot pulse from the pulse generating circuit 4 and setting the number counter 5 to a desired value. For example, when rOJ is sent to the number counter 5, an output of O is obtained from the decoder 6a, which operates the encoding circuit 7a among the encoding circuits 7a to 7d and the data transfer gate 8a connected to this encoding circuit 7a. Make it possible. Then, when inputting voice into the microphone 9 while operating the switch 1b, the control port V! A control signal 18 is sent from I3 to the memory control circuit 15, and the audio is increased @510. The signal is input as an analog signal to the encoding circuits 7a to 7d via the low-pass filter 11, but since only the encoding circuit 7a is selected and designated, encoding is performed only in the encoding circuit 7a.

The digital data thus converted in accordance with the characteristics of the selected encoding circuit 7a is transferred to the data transfer game 1-1.
8a to the recording memory 13. At this time, the recording memory 13 stores the signal of the launch circuit 14a which latches the 2-bit signal of the 5 number counter 5 under the control of the memory Ili control circuit 15, and also stores the digital data from the encoding circuit 7a. Write signal and address signal Ao-A from the memory control circuit 15
Sequentially distribute (, Q) according to M.

As a result, the discrimination signal of the audio encoded data and its IF encoding method (encoding circuits 8 to D) is transmitted to the recording memory 1.
3 is stored.

The audio data stored in the recording memory 13 in this way has the time information of the clock circuit 25 stored in the alarm time memory 2.
When the alarm time set in 9 is reached, the coincidence signal is sent to the control circuit 3 from the coincidence detection port 28, and the control signal 12 is output from the control circuit 3. The data is output to the memory control circuit 15, and the memory control port W815 is operated to output the digital data stored in the recording memory I3. In addition, the launch circuit 14b launches 2-bit data for selecting one of the decoding circuits 162 to 16d, which is the content of the launch circuit 14a stored in the recording memory 13, according to control I of the memory control circuit 15. , decoding circuits 16a-1 via decoder 6b.
6d and one of the data transfer gates 17a to 17d connected to the decoding circuits 16a to 16d. The signal is returned to the mixer circuit 19 via the data transfer gate, and then sent to the amplifier circuit 20. Audio is output through the speaker 21. In this case, if other sounds are being output from the sound source 22, they are synthesized in the mixer circuit 19 under the control of the control circuit 3.The synthesized analog signal is sent to the speaker 2 via the amplifier circuit 20.
1 is output to the outside.

In this way, in the first embodiment, the user can freely specify the encoding circuits 7a to 7d according to the purpose.

It is possible to store audio data and reproduce the audio data at the alarm time.

Next, an embodiment of ff12 will be explained using FIG. 2.

Note that the same components as in FIG. 1 are given the same numbers and detailed explanations will be omitted. In FIG. 2, the input analog signal is stored in the buffer memory 3o.

The characteristics of the input analog (No. 3) are automatically determined by the encoding selection circuit 3I, and the equipment itself selects the Q-way encoding method.
! This is a circuit that performs recording and playback.

The difference in FIG. 2 from FIG. 1 is that the ζ digital signal is once input to the buffer memory 30 and stored, and that the input audio signal is recorded by encoding it in accordance with the characteristics of the input audio signal. The present invention is provided with an encoding selection circuit 31 that discriminates the characteristics and patterns of the analog signal and switches between the encoding circuits 32a and 32b.

Buffer memory 30 is connected between A/D conversion circuit 11a and encoding circuit 32a or 32b.

The encoding selection circuit 31 is connected between the A/D conversion circuit 12 and a latch circuit 14a consisting of a flip-flop. In addition, the output of the recording memory 13 is given to a latch circuit 14b consisting of a flip-flop, and encoder circuits 34a, 34b, data transfer gates 3sa, 35b,
Mixer 19 . Amplifier 20.
It is sent to the speaker 21.

In the above circuit configuration, recording and playback operations are performed by selecting the encoding circuits 32a and 32b by the encoding selection circuit 31 according to the input analog signal. When selecting based on sound, select based on whether the frequency is random or not. Furthermore, when selecting based on the input audio time, the buffer memory 30 can be used to select the encoding circuit 32a for a 10 second analog signal, and to select the encoding circuit 32b for a 30 second analog signal. can.

In this way, the input analog signal is temporarily stored in the buffer memory 30, the characteristics and pattern of the analog signal are checked using the fF encoding selection circuit 3I, and the encoding method is determined, selected, processed, etc. be able to. Therefore, the second
According to the circuit shown in the figure, manual selection of the encoding circuits 7a to 7d by the operator can be omitted, as shown in the first embodiment-1.

Next is Chiku 3 no Mi A&! mJ is shown in Figure 3.

In Fig. 3, similar to Fig. 2, a sofa memory 30 is provided to temporarily store the input voice, but a voice recognition circuit 37 is also installed to recognize the part of the input voice where the rasp sounds are generated. The recognized parts are encoded into preset recognition codes and output, and the unrecognized parts are output as analog signals to the encoding circuit. Therefore, the circuit configuration is such that a voice recognition port 13 is provided between the D/D conversion circuit 12 and the data transfer gate 36a.
7 is connected, and the recognition memory 3 is further connected to the voice recognition circuit 37.
8 is connected, the input data and memory data are constantly compared, and when one input data is recognized, the speech recognition circuit 37 outputs a signal 37a for discriminating the launch circuit 14a and reads the encoded recognition code. At the same time, the signal 37b is output to the panzer memory 3o, and the voice code that was not recognized is sent to the encoding circuit 42. The data is stored in the recording memory I3 via the transfer game) 36b. Therefore, in the reproducing circuit as well, the voice synthesis circuit 39 is connected between the recording memory 13 and the data transfer gate 40a, and the synthesis memory 41 is connected to the voice synthesis port 1139.

Also, as in FIGS. 1 and 2, a control circuit 3 is added to the control system.
．． A microphone 9, which is equipped with a memory control circuit 15 and captures audio input, is provided before the recording memory 13. Increased fWA device 10. A low-pass filter 11 and a Δ/D conversion circuit 12 are provided, and a decoding circuit 43 is provided after the recording memory 13. Data transfer gate 40a.

40b, D/A conversion time @ 1st, amplifier that also serves as a mixer 44. A speaker 21 is provided.

In the above circuit configuration, for recording and playback operations, analog signals are input from the microphone 9, and the amplifier circuit 10. Low pass filter 11. Audio tg via the A/D conversion circuit 12
When input to the m circuit 37, the speech recognition circuit 37 compares it with the data in the recognition memory 38.For example, in the case of a word, the word is .

Since it is a combination of words and particles, the recognition memory 38
If the words are stored in the recording memory 13, the words will match the contents of the recognition memory 38, and will therefore be encoded and stored in the recording memory 13. At this time.

Since the transfer gate 36b is closed by the inverter 37c, the same voice as the recognized voice is transmitted to the encoding circuit B.
It is not written into the recording memory 13 via the. Regarding other unrecognizable items, they are output from the panzer memory 30 to the encoding circuit 42 by the signal 37b, and are encoded by the encoding circuit 42, and then sent to the recording memory 13 in the same way as explained in FIG. to be memorized.

Therefore, in the case of restoration, the synthesis memory 41 .corresponding to the recognition memory 38 . By the voice synthesis circuit 39! ! Speech is synthesized from the sound memory 13, but the @ leaves that can be synthesized by the speech synthesis circuit 39 are only the words that could be recognized by the above-mentioned recognition memory 38, and other words that could not be recognized are sent to the decoding circuit. 43 to decode the original signal in the same manner as described in FIG. In this case, the determination as to whether to encode in the speech synthesis circuit 39 or the encoding circuit 43 is as follows.
This is performed by a signal read from the recording memory 13 and sent to the launch circuit 14b (content stored as an output from the latch circuit L4a).

In this way, the speech recognition circuit 37. Using the recognition memory 38 in parallel with the encoding circuit 42, a certain word.

By separating what is memorized and what is not memorized in music, etc., and encoding what is memorized into a predetermined recognition code and storing it in the recording memory 13, the recording memory 13 The memory capacity of the device can be reduced, and conversely, more data can be stored with the same memory capacity.

〔Effect of the invention〕

As described above, in the present invention, it is possible to select the encoding circuit that corresponds to the optimal encoding according to various types of voices such as conversation/musical instruments/singing, male/female voices, high-pitched/low-pitched voices, forced/music, etc., which improves the overall recording sound quality. In addition, since data compression can be performed efficiently on individual voices using i-mail, memory capacity can be reduced when comparing the same level of sound quality. Moreover, it is possible to realize high-quality recording function with a small size.

[Brief explanation of the drawing]

1st. Second. FIG. 3 is a circuit block diagram of a different embodiment of the present invention. 1.1'... Operation switch section 5 2... Switch input circuit, 3... Control circuit. 5...Encoding method number (code) counter. 7a to 7d...Kano conversion circuit, 9...Microphone for audio input, 11...Low pass filter, 13...Memory for recording. 15...Memory control circuit, 18...D/A
Conversion circuit, 21... Speaker. 30...Ha Nofa memory, 37...Voice recognition circuit, 38...Recognition memory. 39... Speech synthesis circuit, 41... Memory for synthesis.

Claims (5)

[Claims] (1) In an audio recording device that encodes an audio signal and stores it in a semiconductor memory, a plurality of different encoding means, a selection means for selecting one of the plurality of encoding means, and the selection means an audio recording device comprising means for encoding the audio signal using an encoding means selected by the above and storing the encoded audio signal in the semiconductor memory. (2) The audio recording device according to claim 1, wherein the selection means includes a switch that can be operated by the user, and by operating this switch, the encoding means can be arbitrarily selected and switched. . (3) The selection means includes a storage means for temporarily storing the input voice, and selects the encoding means by determining the contents of the storage means. Audio recording device. (4) The audio recording device according to claim 1, wherein at least one of the plurality of encoding means is a compression encoding means using voice recognition. (5) The audio recording device according to claim 1, wherein a code indicating the encoding means selected by the selection means is stored in the semiconductor memory.