JPS614189B2 - - Google Patents
Info
- Publication number
- JPS614189B2 JPS614189B2 JP54073718A JP7371879A JPS614189B2 JP S614189 B2 JPS614189 B2 JP S614189B2 JP 54073718 A JP54073718 A JP 54073718A JP 7371879 A JP7371879 A JP 7371879A JP S614189 B2 JPS614189 B2 JP S614189B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7371879A JPS55165661A (en) | 1979-06-12 | 1979-06-12 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7371879A JPS55165661A (en) | 1979-06-12 | 1979-06-12 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55165661A JPS55165661A (en) | 1980-12-24 |
JPS614189B2 true JPS614189B2 (en) | 1986-02-07 |
Family
ID=13526275
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7371879A Granted JPS55165661A (en) | 1979-06-12 | 1979-06-12 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55165661A (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59136963A (en) * | 1983-01-25 | 1984-08-06 | Sanyo Electric Co Ltd | Multilayer mounting structure of memory storage |
JP2917575B2 (en) * | 1991-05-23 | 1999-07-12 | 株式会社日立製作所 | Resin-sealed semiconductor device |
JP2901401B2 (en) * | 1991-12-03 | 1999-06-07 | 日本電気株式会社 | Multi-chip module |
KR100238197B1 (en) * | 1992-12-15 | 2000-01-15 | 윤종용 | Semiconductor device |
JPH06244231A (en) * | 1993-02-01 | 1994-09-02 | Motorola Inc | Airtight semiconductor device and manufacture thereof |
KR100253325B1 (en) * | 1997-09-27 | 2000-04-15 | 김영환 | Land grid array package and fabricating method thereof |
-
1979
- 1979-06-12 JP JP7371879A patent/JPS55165661A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS55165661A (en) | 1980-12-24 |