JPS6139701A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS6139701A
JPS6139701A JP16034784A JP16034784A JPS6139701A JP S6139701 A JPS6139701 A JP S6139701A JP 16034784 A JP16034784 A JP 16034784A JP 16034784 A JP16034784 A JP 16034784A JP S6139701 A JPS6139701 A JP S6139701A
Authority
JP
Japan
Prior art keywords
line
main
terminal
main lines
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16034784A
Other languages
Japanese (ja)
Inventor
Tatsuya Miya
龍也 宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16034784A priority Critical patent/JPS6139701A/en
Publication of JPS6139701A publication Critical patent/JPS6139701A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/10Auxiliary devices for switching or interrupting
    • H01P1/15Auxiliary devices for switching or interrupting by semiconductor devices

Abstract

PURPOSE:To improve the deterioration in isolation between terminals of a transmitter and a receiver and to reduce insertion loss by cutting off a part of a main line of a strip line, arranging an electrode equipotential to a sub line between the cut and opposed main lines on the main line axis, connecting a semiconductor active element placed on the electrode to both ends of the main line with a metallic fine wire. CONSTITUTION:A part of the main line 9 of the strip line is cut off, and the electrode equipotential to the sub line 14 is arranged between the cut and opposed main lines 9, 9 on the same plane as the main lines 9, 9 so as not to be in contact with the main lines 9, 9. Since an active element 13 is arranged in the main lines 9, 9, bonding lines 11, 12 connecting the main lines 9, 9 and a diode are made very short, the inductance is decreased and the cut main lines 9, 9 are isolated, then the impedance of the active element 13 is effected directly on the main lines. As a result, the degree of short-circuit is improved, the isolation between the transmitter terminal 6 and the receiver terminal 8 and the insertion loss between the transmitter terminal 6 and an antenna terminal 7 are improved and the insertion loss between the antenna terminal 7 and the receiver terminal 8 is improved.

Description

【発明の詳細な説明】 発明の属する技術分野 本発明は、混成集積回路装置に関し、特に、高周波回路
のストリップ線路を用vh九線路切換に用−るダイオー
ドスイッチ回路で高−切換効果を得る集積回路に関する
。   。
TECHNICAL FIELD OF THE INVENTION The present invention relates to a hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device that achieves a high switching effect with a diode switch circuit used for switching a strip line of a high frequency circuit to a VH nine line. Regarding circuits. .

従来の技術 従来、高周波伝送線路の切換には、リレーを利用した機
械的なものと、ダイオード等の半導体素子の抵抗変化を
利用した電気的なものがある。
2. Description of the Related Art Hitherto, high frequency transmission lines have been switched either mechanically using relays or electrically using changes in the resistance of semiconductor elements such as diodes.

この切換装置に要求されることは導通状態が良く、開放
状態でよ)絶縁されることであるが、リレーを利用した
場金には、高周波領域になると切換部のインピーダンス
が影響するために、不要イ。
This switching device is required to have good conductivity and be insulated (in an open state), but when using relays, the impedance of the switching section affects the high frequency range, so No need.

ンビーダンスを打消す対策をとって切換効果の悪化を防
いでいる。
Measures are taken to cancel out the empty space dance to prevent the switching effect from worsening.

最近は、可動部があ)使用寿命の短かいリレー等による
切換装置にかわって、寿命が長く高周波領域での切換効
果も良いPINダイオード等の半導体素子を使ったスイ
ッチ回路が主流になシ?つある。” 第1図にこのダイオードスイッチ回路を示し。
Recently, switch circuits using semiconductor elements such as PIN diodes, which have a long life and have good switching effects in the high frequency range, have become mainstream, replacing switching devices such as relays that have moving parts and have a short service life. There is one. ” Figure 1 shows this diode switch circuit.

との回路の動作及び従来装置につりで詳しく説明する、
The operation of the circuit and the conventional device will be explained in detail.
.

ヒの回路はパイ・アス端子5にバイアス電圧上印加する
かいなかによ)送信機端子6と受信機端子8がアンテナ
端子1への切換を行うものである。。
In the circuit shown in FIG. 1, the transmitter terminal 6 and the receiver terminal 8 are switched to the antenna terminal 1 by applying a bias voltage to the pi-as terminal 5. .

はじめに、端子SKFM方向電流が各ダイす一部1.2
に流れるように直流バイアス電圧を印加すると、直列ダ
イオード1と並列ダイオード2は低抵抗になIIA点は
シ四−Fとなる。ここで、A点はB点よシ線路9で使用
周波数の波長のλ/4離れた位置に配装置されているの
で、B点でのインピーダンスz#i、線路特性式Z=Z
・tan/11にょ)、最大となる。従って、送信機端
子6から入った信号はアンテナ端子7に出力される。
First, the terminal SKFM direction current is 1.2
When a DC bias voltage is applied so that the current flows through the diode 1, the resistance of the series diode 1 and the parallel diode 2 becomes low, and the point IIA becomes C4-F. Here, since point A is located at a distance of λ/4 of the wavelength of the frequency used on the line 9 from point B, impedance z#i at point B and line characteristic formula Z=Z
・tan/11yo), the maximum. Therefore, the signal input from the transmitter terminal 6 is output to the antenna terminal 7.

次に、バイアス電圧をかけない時には、即ち。Next, when no bias voltage is applied, ie.

0バイアス時には直列ダイオード1と並列ダイオード2
は高抵抗とまり、端子7から入った信号は端子8に出力
される。
At 0 bias, series diode 1 and parallel diode 2
remains at a high resistance, and the signal input from terminal 7 is output to terminal 8.

このよりにして、アンテナ端子7が送信機端子6と受信
機端子8に切換ができる。
In this manner, the antenna terminal 7 can be switched to the transmitter terminal 6 and the receiver terminal 8.

以下、この様々原理に基いたスイッチ回路において従来
装置の欠点を述べる。
In the following, drawbacks of conventional devices in switch circuits based on these various principles will be described.

第2図、第3図は1人点く第1図)でのダイオード取り
付は部の拡大図であり、それぞれ従来装置101.従来
装置102の取シ付は方法の拡大図である。高周波領域
では従来装置101の場合ボンディング線10のインダ
クタンスでインピーダンスが増加し、A点での短絡度が
悪くなるために、順電圧をかけた時の送信機端子6と受
信機端子8の間の電力伝達比、即ち、アイソレーション
が小さいという欠点があった。
FIGS. 2 and 3 are enlarged views of the diode installation shown in FIG. The mounting method of conventional device 102 is shown in an enlarged view. In the high frequency range, in the case of the conventional device 101, the impedance increases due to the inductance of the bonding wire 10, and the degree of short circuit at point A becomes worse. The drawback was that the power transfer ratio, that is, the isolation, was low.

一方、従来装置102の場合には、ボンディング線11
のインダクタンスは伝送線路の一部となり従来装置10
1の様にインダクタンスによってA点での短絡度が悪く
なることは改善されるが、対向する主線路間の距離が短
いために、電磁力線のカップリングを起こし、能動素子
13(ダイオード)の影響が直接あられれず、結果的に
送信機端子6と受信機端子8のアイソレーションが悪く
なるという欠点があった。
On the other hand, in the case of the conventional device 102, the bonding wire 11
The inductance becomes part of the transmission line and the conventional device 10
1, the inductance improves the short circuit at point A, but since the distance between the opposing main lines is short, coupling of electromagnetic lines of force occurs, and the influence of the active element 13 (diode) There is a drawback that the transmitter terminal 6 and the receiver terminal 8 are not isolated directly from each other, resulting in poor isolation between the transmitter terminal 6 and the receiver terminal 8.

更に、従来装置102の場合には、主線路間のカップリ
ングを小さくするために主線路間の距離を広げると、ボ
ンディングI!11の長さが長くなるために、こんi!
はアンテナ端子7と受信機端子8との挿入損失が大きく
なるという結果になシ、切換効果は下ってしまうという
問題があった。
Furthermore, in the case of the conventional device 102, when the distance between the main lines is increased in order to reduce the coupling between the main lines, bonding I! Because the length of 11 becomes longer, Kon i!
This results in an increase in insertion loss between the antenna terminal 7 and the receiver terminal 8, resulting in a problem that the switching effect deteriorates.

発明の目的 本発明は従来の上記事情に鑑みてなされたものであシ、
従って本発明の目的は、こうした従来装置の欠点である
送信機端子6と受償機・端子8のアイソレーションの劣
化を改善し、更に、送信機端子6とアンテナ端子7・、
受信機端子8とアンテナ端子7の接続損失、即ち、イサ
ーvviンロスを小さくした新規な混成集積回路装置を
提供するととにある。            ′ 発明の構成 上記目的を達成する為に、本発明に係る混成集積回路装
置は、ストリップ線路の主線路の一部が切断され、該切
断されて対向する主線路の間に・副線路と同電位の電極
が前記主線路軸上に配置され。
Purpose of the Invention The present invention has been made in view of the above-mentioned conventional circumstances.
Therefore, an object of the present invention is to improve the deterioration of the isolation between the transmitter terminal 6 and the receiver/terminal 8, which is a drawback of the conventional device, and furthermore,
It is an object of the present invention to provide a novel hybrid integrated circuit device in which the connection loss between the receiver terminal 8 and the antenna terminal 7, that is, the iser vvin loss is reduced. 'Structure of the Invention In order to achieve the above object, the hybrid integrated circuit device according to the present invention includes a main line of a strip line in which a part of the main line is cut off, and a line between the main line facing the cut line and the same as the sub line. A potential electrode is placed on the main line axis.

前記電極上に置かれた中導体能動素子が前記主線路の両
端と金属細線で接続されて構成される。
A medium conductive active element placed on the electrode is connected to both ends of the main line by a thin metal wire.

発明の夷織例          ・ 次に本発明をその好ましい一実地例について図面を参照
し々から具体的に説明する。
EXAMPLE OF THE INVENTION Next, a preferred practical example of the present invention will be specifically explained with reference to the drawings.

第4図は本発明の一実施例を示す概略構成図である。第
4図において、ストリップ線の主線路9め一部が切断さ
れ、該切断されて対向する主線路9.9の間に副線路(
Ia地電極)14と同電位の電極が主線路9.9と接触
しない様に、主線路9.′9と同一面上に配置されてい
る。前記電極上に半導体能動素子13が載置され、該能
動素子13は主線路9,9の両端にボンディング線(金
属細線)ILnによって接続されている。
FIG. 4 is a schematic diagram showing an embodiment of the present invention. In FIG. 4, a part of the main line 9 of the strip line is cut, and a sub line (
Ia ground electrode) 14 is connected to the main line 9.9 so that the electrode having the same potential as the main line 9.9 does not come into contact with the main line 9.9. '9 is placed on the same plane. A semiconductor active element 13 is placed on the electrode, and the active element 13 is connected to both ends of the main lines 9, 9 by bonding lines (thin metal wires) ILn.

発明の作用、・効果            ゛本発明
に係る装置においてボンディング線11゜12を伝送線
路の一部として扱う事によって前記した従来装置101
の欠点を改善している点では、前記従来装置102と同
様であるが1本発明に係る装置は、従来装置102の欠
点を更に改良したものである。即ち1本発明に係る装置
の場合には、能動素子(゛半導体素子)13が主線路内
9,9に配置されて6るために、主線路9.9とダイオ
ードを接続するボンディング線11 、12を非常に短
かくでき。
Functions and Effects of the Invention ゛By treating the bonding wires 11 and 12 as part of the transmission line in the device according to the present invention, the conventional device 101 described above can be improved.
The device according to the present invention is similar to the conventional device 102 in that the drawbacks of the conventional device 102 are improved, but the device according to the present invention further improves the drawbacks of the conventional device 102. That is, in the case of the device according to the present invention, since the active element (semiconductor element) 13 is arranged in the main line 9, 9, the bonding line 11 connecting the main line 9, 9 and the diode, 12 can be made very short.

インダクタンスが小さくできると共に、切断された主線
路9,9間が絶縁されるために、能動素子13のインピ
ーダンスが直接に主線路に影響する。
Since the inductance can be reduced and the disconnected main lines 9 are insulated, the impedance of the active element 13 directly affects the main line.

その結果、短絡度が上〕、送信機端子6と受言機端子8
0間のアイソレーション及び送信機端子6とアンテナ端
子7のインサーシロンロスが改善されると共に、アンテ
ナ端子7と受信機端子8の間のインサーシロンロスも改
善される。本発明者の実験によれば、本発明による装置
によシアイソレーショyカ10倍、 Ff4インナージ
ョンロスが20%改善されることが判明した。
As a result, the degree of short circuit is high], and the transmitter terminal 6 and receiver terminal 8
Isolation between zero and insertion loss between the transmitter terminal 6 and antenna terminal 7 are improved, and insertion loss between the antenna terminal 7 and receiver terminal 8 is also improved. According to experiments conducted by the present inventor, it has been found that the device according to the present invention can improve shear isolation by 10 times and Ff4 inner region loss by 20%.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はダイオードスイッチ回路の構成図、第2図、第
3図はそれぞれ従来回路101.従来回路102のダイ
オード取付部分の拡大図、第4図は本発明の一実梅例を
示し1本発明によるダイオード取付部分の拡大図である
。 l・・・直列ダイオード、2・・・並列ダイオード、3
・・・直流カットコンデンサ、4・・・チョークコイN
%5・・・バイアス端子%6・・・送信機端子、7・・
・アンテナ端子、8・・・受信機端子、9・・・主線路
、1G・・・並列ボンディング線、 11・・・直列・
ボンディング線、12・・・直列ボンディング線、13
・・・能動素子(ペレット)。
FIG. 1 is a block diagram of a diode switch circuit, and FIGS. 2 and 3 are respectively a conventional circuit 101. FIG. 4 is an enlarged view of the diode mounting portion of the conventional circuit 102, showing an example of the present invention, and is an enlarged view of the diode mounting portion according to the present invention. l...Series diode, 2...Parallel diode, 3
...DC cut capacitor, 4...Choke coil N
%5... Bias terminal %6... Transmitter terminal, 7...
・Antenna terminal, 8...Receiver terminal, 9...Main line, 1G...Parallel bonding line, 11...Series・
Bonding wire, 12...Series bonding wire, 13
...Active element (pellet).

Claims (1)

【特許請求の範囲】[Claims]  ストリップ線路の主線路の一部が切断され、該切断さ
れて対向する主線路の間に副線路と同電位の電極が前記
主線路と接触しない様に前記主線路と同一面上に配置さ
れ、前記電極上に置かれた半導体能動素子が前記主線路
の両端と金属細線で接続されていることを特徴とする混
成集積回路装置。
A part of the main line of the strip line is cut off, and between the cut and opposing main lines, an electrode having the same potential as the sub line is placed on the same plane as the main line so as not to come into contact with the main line, A hybrid integrated circuit device characterized in that a semiconductor active element placed on the electrode is connected to both ends of the main line by a thin metal wire.
JP16034784A 1984-07-31 1984-07-31 Hybrid integrated circuit device Pending JPS6139701A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16034784A JPS6139701A (en) 1984-07-31 1984-07-31 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16034784A JPS6139701A (en) 1984-07-31 1984-07-31 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6139701A true JPS6139701A (en) 1986-02-25

Family

ID=15713016

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16034784A Pending JPS6139701A (en) 1984-07-31 1984-07-31 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6139701A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4803447A (en) * 1988-02-29 1989-02-07 Motorola, Inc. Three terminal remotely controlled SPDT antenna switch
JPH01101002A (en) * 1987-10-13 1989-04-19 Nec Corp Semiconductor device
JPH02206901A (en) * 1989-02-07 1990-08-16 Matsushita Electric Ind Co Ltd Diode mount and mixer circuit
WO2001073885A1 (en) * 2000-03-27 2001-10-04 Matsushita Electric Industrial Co., Ltd. Rf switch

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01101002A (en) * 1987-10-13 1989-04-19 Nec Corp Semiconductor device
US4803447A (en) * 1988-02-29 1989-02-07 Motorola, Inc. Three terminal remotely controlled SPDT antenna switch
JPH02206901A (en) * 1989-02-07 1990-08-16 Matsushita Electric Ind Co Ltd Diode mount and mixer circuit
JPH0793521B2 (en) * 1989-02-07 1995-10-09 松下電器産業株式会社 Diode mount and mixer circuit
WO2001073885A1 (en) * 2000-03-27 2001-10-04 Matsushita Electric Industrial Co., Ltd. Rf switch
US7123884B2 (en) 2000-03-27 2006-10-17 Matsushita Electric Industrial Co., Ltd RF switch
KR100719089B1 (en) * 2000-03-27 2007-05-17 마쯔시다덴기산교 가부시키가이샤 Rf switch

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