JPS6132676A - Recording and reproducing device - Google Patents

Abstract

PURPOSE:To record the data in a short time by putting a recording series for insertion of address data, etc. always, in driving condition, and providing such a switch as by-passing the output signal in the recording series when insertion record of data, etc. isn't carried out, to eliminate a problem of delay in rise time, and a transient time. CONSTITUTION:An FM modulation circuit 26, record amplifier 27, buffer 28, and record driving circuit 29 are always kept in driven condition. A switch 30 connected with the input terminal of the record driving circuit 29 is turned on when there's no gate pulse of a monostable multivibrator 42, an input signal to the record driving circuit 29 is by-passed to the ground, and at the same time, when a gate pulse arises, switch 30 is turned off, and an input signal to record driving circuit 29 is made effective to perform recording of address data.

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a recording and reproducing device such as a video tape recorder (hereinafter referred to as VTR), and more particularly, to a recording and reproducing device that can record information while in the playback mode. .

Conventional technology VTRI fake A system has been proposed that enables writing of search data, etc. by turning on the recording system and switching the video head to the recording side while keeping the video head in playback mode.

In this proposed system, when performing insertion recording, the switches 1 and 2 shown in FIG. 4 are turned on for several fields, and the recording circuit 3 and recording amplifier 4 are brought into conduction to perform recording. However, in this type of circuit, there is a problem in that disturbances occur at the joints between screens due to the rise time of the recording circuit 3 and the recording amplifier 4 when the switches 1 and 2 are turned on, or due to transient characteristics.

For this reason, in the conventional system, switches 1 and 2 were turned on 1/2 field before the period in which insertion recording was to be performed.

However, the above method is effective when the recording period is relatively long, such as a period of several fields, and can also reduce transients; In such a case, the search data signal ends before the recording circuit 3 and the recording amplifier 4 rise sufficiently, and there is a drawback that accurate insertion and recording of the search data cannot be performed.

OBJECTS OF THE INVENTION It is an object of the present invention to provide a recording and reproducing apparatus which eliminates the above-mentioned drawbacks and is capable of correctly performing insertion recording even when the insertion recording time of data is short.

Composition of the Invention The recording and reproducing apparatus of the present invention is a recording and reproducing apparatus capable of recording information by applying a recording signal to a recording head via a recording system while reproducing a recorded tape in a reproducing mode. The present invention is characterized in that the system is always driven, and switch means is provided for bypassing the recording system signal to ground during reproduction and cutting off the bypassing circuit during recording.

Example This invention will be described below with reference to one embodiment.

FIG. 1 shows an example of a VTR system to which the present invention is applied, and a reproduced video signal reproduced by a video head 11 of a commercially available VTR10 is transmitted to an address data insertion recording device 2.
0, and a composite synchronization signal is output. The composite synchronization signals are respectively supplied to an integrating circuit 22 and a horizontal drive circuit 23, and a vertical synchronization signal and horizontal and horizontal synchronization signals are output.As for the horizontal synchronization signal, a line switch signal is obtained by a D flip 70 tube circuit 24. These three synchronization signals are sent to the synchronization signal generator 25.
is input to. The synchronization signal generator 25 outputs a composite synchronization signal that is in phase with the input synchronization signal. The output composite synchronization signal is input to the controller A-240, divided into horizontal and vertical synchronization signals within the controller A-240, and a date pulse of a predetermined period is generated by a counter 41 and a monostable multivibrator 42. This gate pulse determines, for example, the position and period of insertion recording of search data, for example, 30H to 35H.

Further, the controller 40 outputs address data, which is a digital signal obtained by processing the address data for program search inputted from the input numeric keypad 43 by the CPU 44.

Here, the address data and date pulse are input to the address data insertion/recording device 20, a synchronization signal synchronized with the reproduced video signal of the VTR10 is added to the address data, and the video signal generator 26 generates the same waveform as the normal video signal. The FM modulation circuit 26. adjusts the level and synchronization signal to the address data signal and inserts and records the address data signal. Recording amplifier 27t Buffer 7-Amplifier 28. The signal passes through a recording drive circuit 29 and is converted into a signal for VTR. This signal is VTRl
A recording current is input to a rotary transformer (not shown) of 0, and a recording current is supplied to the video head 1'11, whereby address data is inserted and recorded. In this case, address data is inserted between 30H and 35H, and as shown in FIG.
Address data 61 is displayed on the screen 60. It is preferable that the address data be inserted between 21H and 24H so that it is not visible on the TV screen.

In the above circuit, the FM modulation circuit 26. Recording amplifier 2
7. Buffer 28. The recording drive 29 is set to be constantly driven. On the other hand, the switch 30 connected to the input terminal of the recording drive 29 is turned on when there is no gate pulse of the monostable multi-bi break 42, and the input signal to the recording drive 29 is bypassed to the blend, and the gate pulse occurs, switch 30
is turned off, the input signal to the recording drive 29 becomes valid, and the rear address data is recorded as described above. Therefore, there is no influence of the rise time of a recording amplifier, etc., and even data as short as several hours can be recorded accurately.

FIG. 2 shows switch 30. An example is shown in which the recording drive 29 is configured with transistors 50, 51, and 52, respectively. In this circuit, a gate pulse is applied to a transistor 50 via an inverter 53, and when there is no date pulse, the transistor 50 is turned on, bypassing the base of the transistor 51 to ground, and when there is a date pulse, the transistor 50 is applied to the transistor 50. 50 is turned off, enabling the input to the base of transistor 51.

In the embodiment shown in FIG. 1, the address data insertion and recording device 20. Each controller 40 is connected to a commercially available VTR10 in the form of an adapter. With this configuration, VTs that do not have an address data insertion mechanism
Even in R, the address data insertion device 20. controller 40
Desired address data can be inserted into the recorded tape by connecting the .

Effects of the Invention As described in detail above, the present invention provides a switch that keeps the recording system for inserting address data etc. in a constantly operating state and bypasses the output signal of the recording system when no data is inserted and recorded. By turning off this switch only during insertion recording, it is possible to record data, etc., so there is no problem with the rise time delay of the recording system, there is no transient, and it is possible to record data for a short period of time. do.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing an embodiment of the present invention, FIG. 2 is a detailed circuit diagram of the main parts of the circuit shown in FIG. 1, and FIG. 3 is a diagram showing an example of the display of the device shown in FIG. 1. , FIG. 4 is a circuit diagram showing a conventional device. DESCRIPTION OF SYMBOLS 10... VTR, 20... Address data insertion recording device, 25... Video signal generator, 26... FM modulation circuit, 27... Recording 7, 28... Buffer 7.
29...recording drive, 30...switch, 40...
... Controller, 41... Counter, 42... Monostable multi-by-break.

Claims (1)

[Claims] (1) In a recording/playback device that is capable of recording information by applying a recording signal to a recording head via a recording system while playing back a recorded tape in a playback mode, the recording system is kept in a constant driving state. A recording/reproducing apparatus characterized in that a switch means is provided for bypassing the recording system signal to ground during reproduction and for cutting off the bypassing circuit during recording.