JPS6130467Y2 - - Google Patents

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Publication number
JPS6130467Y2
JPS6130467Y2 JP1036679U JP1036679U JPS6130467Y2 JP S6130467 Y2 JPS6130467 Y2 JP S6130467Y2 JP 1036679 U JP1036679 U JP 1036679U JP 1036679 U JP1036679 U JP 1036679U JP S6130467 Y2 JPS6130467 Y2 JP S6130467Y2
Authority
JP
Japan
Prior art keywords
component
voltage
operational amplifier
transistor
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1036679U
Other languages
Japanese (ja)
Other versions
JPS55112495U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1036679U priority Critical patent/JPS6130467Y2/ja
Publication of JPS55112495U publication Critical patent/JPS55112495U/ja
Application granted granted Critical
Publication of JPS6130467Y2 publication Critical patent/JPS6130467Y2/ja
Expired legal-status Critical Current

Links

Description

【考案の詳細な説明】 本考案は、直流分と交流分とが重畳された入力
電圧の交流分のみに対応した直流電圧または直流
電流を出力する整流回路に関する。
[Detailed Description of the Invention] The present invention relates to a rectifier circuit that outputs a DC voltage or a DC current corresponding only to an AC component of an input voltage in which a DC component and an AC component are superimposed.

従来この種の整流回路は第1図に示すように、
まず入力電圧Viに含まれている直流分VDCを結
合コンデンサCcで除去し、交流分VACを演算増
幅器OQとダイオードD1,D2および抵抗R1,R2
らなる理想化ダイオード回路で半波整流した後フ
イルタ回路Fで平滑して、交流分VACに比例した
直流電圧Voを得ている。しかしながらこのよう
な構成の整流回路では、入力電圧Viに含まれる
直流分VDCを除くために大きな容量の結合コンデ
ンサCcを必要とする欠点がある。また電流出力
を得るには、電圧電流変換器を付加しなければな
らず、全体構成が複雑になる欠点がある。さら
に、通常正、負の二電源を必要とする演算増幅器
を片電源で動作させるとき、第1図の回路では不
可能で、複雑なバイアス電圧の演算が必要であ
る。
Conventionally, this type of rectifier circuit, as shown in Figure 1,
First, the DC component V DC included in the input voltage Vi is removed by a coupling capacitor Cc, and the AC component V AC is removed by an idealized diode circuit consisting of an operational amplifier OQ, diodes D 1 and D 2 , and resistors R 1 and R 2 . After half-wave rectification, it is smoothed by a filter circuit F to obtain a DC voltage Vo proportional to the AC component VAC. However, the rectifier circuit having such a configuration has a drawback that a large capacity coupling capacitor Cc is required to remove the DC component V DC included in the input voltage Vi. Furthermore, in order to obtain a current output, a voltage-current converter must be added, which has the disadvantage of complicating the overall configuration. Furthermore, when operating an operational amplifier, which normally requires two positive and negative power supplies, with a single power supply, complicated bias voltage calculations are required, which is impossible with the circuit shown in FIG.

本考案は、上述の如き欠点のない新規な整流回
路を実現したので、以下図面を用いて本考案整流
回路を説明する。
The present invention has realized a novel rectifier circuit that does not have the above-mentioned drawbacks, so the rectifier circuit of the present invention will be explained below with reference to the drawings.

第2図は本考案整流回路の一実施例を示す接続
図である。図において、演算増幅器OPの反転入
力端子(−)には入力電圧Viが抵抗R2を介して
加えられており、非反転入力端子(+)には入力
電圧Viが抵抗R1とコンデンサC1からなるローパ
スフイルタF1を介して加えられている。またOP
の出力端子と反転入力端子(−)との間にダイオ
ードDおよびトランジスタTrのベース・エミツ
タが接続されている。Trのコレクタは抵抗R3
コンデンサC2のフイルタF2を介して基準点に接
続されている。そして抵抗R3の両端電圧が出力
電圧Voとして取り出される。なお演算増幅器OP
には正の電源+Vのみが電源電圧として供給され
ている。
FIG. 2 is a connection diagram showing one embodiment of the rectifier circuit of the present invention. In the figure, the input voltage Vi is applied to the inverting input terminal (-) of operational amplifier OP via resistor R 2 , and the input voltage Vi is applied to the non-inverting input terminal (+) via resistor R 1 and capacitor C 1 . It is added through a low-pass filter F1 consisting of F1 . Also OP
A diode D and the base-emitter of the transistor Tr are connected between the output terminal and the inverting input terminal (-). The collector of the Tr is connected to the reference point via a filter F 2 of a resistor R 3 and a capacitor C 2 . The voltage across the resistor R3 is then taken out as the output voltage Vo. In addition, operational amplifier OP
Only the positive power supply +V is supplied as the power supply voltage.

このように構成した本考案の動作を第4図の波
形図を参照して以下に説明する。第4図におい
て、イは入力電圧の波形、ロは演算増幅器OPの
出力波形、ハはトランジスタTrのコレクタ電流
の波形である。まず演算増幅器OPの非反転入力
端子(+)には、第4図イに示すような直流分V
DCと交流分VACが重畳された入力電圧Vi(=VD
+VAC)がR1C1からなるフイルタF1で平滑され
て、Viの直流分VDCのみが加えられる。OPはダ
イオードDまたはトランジスタTrによる帰還に
より、反転入力端子(−)の電位がVDCとなるよ
うに働くので、OPの出力は反転入力端子(−)
に加えられるViの交流分VACの位相に応じて第
4図ロに示す波形(ただし、VDはダイオードD
の順方向電圧、VBEはトランジスタTrのベー
ス・エミツタ間電圧)となり、トランジスタTr
とダイオードDを交互にオンオフする。すなわち
ACが正の半波のときTrがオン、Dがオフし、
負の半波のときTrがオフ、Dがオンする。この
ようにOPは、VACに対する出力位相が180゜違う
反転動作を行なうが、Viに正の直流分VDCが含
まれているため、VDC−VBE>0であればOPの
出力は常に正であり、片電源(+)のみの動作が
可能である。また抵抗R2を流れる電流iは(Vi
−VDC)/R2となり、Viの直流分VDCが除去さ
れ、交流分VACのみに対応する。この電流i(=
AC/R2)がオンとなつているダイオードDまた
はトランジスタTrに流れる。よつて、Trのコレ
クタに流れる電流は第4図ハのようになり、VAC
の正の半波のみを取出した波形となる。このTr
のコレクタ電流をC2R3のフイルタF2で平滑する
と、平滑後の電圧はVoはVAC・R3/R2に比例す
る。ただし、Trのコレクタ・エミツタ間電圧を
CEとすると、R3はVDC−VCE−VAC・R3/R2
>0となるように選ばれる。すなわち第2図の回
路が正常に動作する条件は、VDC>0であれば、 VDC−VAC>0 VDC−VCE−VAC・R3/R2>0 の2つであり、これは容易に実現できる。
The operation of the present invention constructed in this way will be explained below with reference to the waveform diagram of FIG. In FIG. 4, A is the waveform of the input voltage, B is the output waveform of the operational amplifier OP, and C is the waveform of the collector current of the transistor Tr. First, the non-inverting input terminal (+) of the operational amplifier OP has a DC component V as shown in Figure 4A.
Input voltage Vi ( = V D
C + V AC ) is smoothed by a filter F 1 consisting of R 1 C 1 , and only the DC component V DC of Vi is added. OP works so that the potential of the inverting input terminal (-) becomes V DC through feedback by diode D or transistor Tr, so the output of OP is the same as that of the inverting input terminal (-).
The waveform shown in Figure 4B depends on the phase of the alternating current component of Vi applied to
The forward voltage of the transistor Tr, V BE is the voltage between the base and emitter of the transistor Tr.
and diode D are turned on and off alternately. In other words, when V AC is a positive half wave, Tr is on and D is off,
When it is a negative half wave, Tr is turned off and D is turned on. In this way, OP performs an inversion operation with an output phase difference of 180° with respect to V AC , but since Vi includes the positive DC component V DC , if V DC - V BE > 0, the OP output will be It is always positive and can operate with only one power supply (+). Also, the current i flowing through the resistor R 2 is (Vi
-V DC )/R 2 , the DC component V DC of Vi is removed and only the AC component V AC is supported. This current i (=
V AC /R 2 ) flows through the turned-on diode D or transistor Tr. Therefore, the current flowing through the collector of the Tr is as shown in Fig. 4 (c), and V AC
The waveform is obtained by extracting only the positive half wave of . This Tr
When the collector current of is smoothed by a filter F 2 of C 2 R 3 , the smoothed voltage Vo is proportional to V AC ·R 3 /R 2 . However, if the collector-emitter voltage of the Tr is V CE , then R 3 is V DC - V CE - V AC・R 3 /R 2
>0. In other words, the conditions for the circuit in Figure 2 to operate normally are: if V DC > 0, then V DC - V AC > 0, and V DC - V CE - V AC R 3 / R 2 > 0. , this can be easily achieved.

このように出力電圧VoのゲインはR3/R2で定
まりトランジスタTrやダイオードDといつた能
動素子および入力電圧Viの直流分VDCに依存せ
ず安定である。また入力電圧Viの直流分VDC
上述のようにバイアス電圧としての働きを兼てい
るため演算増幅器OPは片電源で安定に動作す
る。さらに電流力Ioを得る場合には第3図に示す
ように抵抗R3を流れる電流を出力すればよく、
電圧電流変換器を特に必要としない。
In this way, the gain of the output voltage Vo is determined by R 3 /R 2 and is stable, independent of active elements such as the transistor Tr and the diode D, and the DC component V DC of the input voltage Vi. Further, since the DC component V DC of the input voltage Vi also functions as a bias voltage as described above, the operational amplifier OP operates stably with a single power supply. Furthermore, to obtain the current force Io, it is sufficient to output the current flowing through the resistor R 3 as shown in Figure 3.
No special voltage-current converter is required.

このように本考案においては、入力電圧Viに
含まれる直流分を除去るための大な容量の結合コ
ンデンサが不用で、しかも全体構成の簡単な整流
回路が得られる。
As described above, the present invention does not require a large-capacity coupling capacitor for removing the DC component contained in the input voltage Vi, and can provide a rectifier circuit with a simple overall configuration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来回路の一例を示す接続図、第2図
は本考案回路の一実施例を示す接続図、第3図は
本考案回路の他の実施例を示す接続図、第4図は
本考案回路の動作説明のための波形図である。 OP……演算増幅器、F1,F2……フイルタ、Tr
……トランジスタ、D……ダイオード。
Fig. 1 is a connection diagram showing an example of the conventional circuit, Fig. 2 is a connection diagram showing one embodiment of the circuit of the present invention, Fig. 3 is a connection diagram showing another embodiment of the circuit of the present invention, and Fig. 4 is a connection diagram showing an example of the circuit of the present invention. FIG. 3 is a waveform diagram for explaining the operation of the circuit of the present invention. OP...Operation amplifier, F1 , F2 ...Filter, Tr
...Transistor, D...Diode.

Claims (1)

【実用新案登録請求の範囲】 (1) 直流分と交流分とが重畳された入力電圧を抵
抗を介して演算増幅器の反転入力端子に加える
手段と、前記入力電圧をフイルタを介してその
直流分のみを演算増幅器の非反転入力端子に加
える手段と、演算増幅器の出力端子と反転入力
端子との間にダイオードとトランジスタのベー
ス・エミツタを接続する手段と、トランジスタ
のコレクタ電流を平滑して前記入力電圧の交流
分のみに対応した直流出力電圧または直流出力
電流を取り出す段とを有してなる整流回路。 (2) 入力電圧に含まれている直流分を演算増幅器
のバイアス電流として用い、演算増幅器を片電
源で動作させることにしたことを特徴とする実
用新案登録請求の範囲第1項記載の整流回路。
[Claims for Utility Model Registration] (1) Means for applying an input voltage in which a DC component and an AC component are superimposed to an inverting input terminal of an operational amplifier via a resistor; means for connecting a diode and the base-emitter of a transistor between the output terminal and the inverting input terminal of the operational amplifier, and means for smoothing the collector current of the transistor to A rectifier circuit comprising a stage for extracting a DC output voltage or a DC output current corresponding only to the AC component of the voltage. (2) The rectifier circuit according to claim 1 of the utility model registration claim, characterized in that the DC component included in the input voltage is used as the bias current of the operational amplifier, and the operational amplifier is operated with a single power supply. .
JP1036679U 1979-01-30 1979-01-30 Expired JPS6130467Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1036679U JPS6130467Y2 (en) 1979-01-30 1979-01-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1036679U JPS6130467Y2 (en) 1979-01-30 1979-01-30

Publications (2)

Publication Number Publication Date
JPS55112495U JPS55112495U (en) 1980-08-07
JPS6130467Y2 true JPS6130467Y2 (en) 1986-09-05

Family

ID=28822834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1036679U Expired JPS6130467Y2 (en) 1979-01-30 1979-01-30

Country Status (1)

Country Link
JP (1) JPS6130467Y2 (en)

Also Published As

Publication number Publication date
JPS55112495U (en) 1980-08-07

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