JPS612989B2 - - Google Patents

Info

Publication number
JPS612989B2
JPS612989B2 JP14105080A JP14105080A JPS612989B2 JP S612989 B2 JPS612989 B2 JP S612989B2 JP 14105080 A JP14105080 A JP 14105080A JP 14105080 A JP14105080 A JP 14105080A JP S612989 B2 JPS612989 B2 JP S612989B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14105080A
Other languages
Japanese (ja)
Other versions
JPS5764864A (en
Inventor
Hisao Ishizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14105080A priority Critical patent/JPS5764864A/en
Publication of JPS5764864A publication Critical patent/JPS5764864A/en
Publication of JPS612989B2 publication Critical patent/JPS612989B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
JP14105080A 1980-10-08 1980-10-08 Digital arithmetic circuit Granted JPS5764864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14105080A JPS5764864A (en) 1980-10-08 1980-10-08 Digital arithmetic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14105080A JPS5764864A (en) 1980-10-08 1980-10-08 Digital arithmetic circuit

Publications (2)

Publication Number Publication Date
JPS5764864A JPS5764864A (en) 1982-04-20
JPS612989B2 true JPS612989B2 (en) 1986-01-29

Family

ID=15283078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14105080A Granted JPS5764864A (en) 1980-10-08 1980-10-08 Digital arithmetic circuit

Country Status (1)

Country Link
JP (1) JPS5764864A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5167018A (en) * 1986-09-24 1992-11-24 Daikin Industries, Ltd. Polygon-filling apparatus

Also Published As

Publication number Publication date
JPS5764864A (en) 1982-04-20

Similar Documents

Publication Publication Date Title
DE3005657C2 (en)
FR2477593B1 (en)
FR2479273B1 (en)
FR2479556B1 (en)
FR2479116B3 (en)
DE3153250A1 (en)
FR2476326B1 (en)
FR2474923B1 (en)
FR2473482B1 (en)
DE3047970C2 (en)
FR2475580B1 (en)
FR2478851B1 (en)
FR2477256B1 (en)
FR2480347B1 (en)
FR2479217B1 (en)
FR2473317B1 (en)
FR2480100B1 (en)
FR2476435B1 (en)
FR2478635B1 (en)
FR2477504B3 (en)
CH655461B (en)
FR2479973B1 (en)
CH642219GA3 (en)
FR2478423B3 (en)
FR2473908B3 (en)