JPS6129547U - squelch device - Google Patents

squelch device

Info

Publication number
JPS6129547U
JPS6129547U JP1984113228U JP11322884U JPS6129547U JP S6129547 U JPS6129547 U JP S6129547U JP 1984113228 U JP1984113228 U JP 1984113228U JP 11322884 U JP11322884 U JP 11322884U JP S6129547 U JPS6129547 U JP S6129547U
Authority
JP
Japan
Prior art keywords
squelch
circuit
series circuits
sensitivity
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984113228U
Other languages
Japanese (ja)
Other versions
JPH026688Y2 (en
Inventor
和男 遠藤
Original Assignee
富士通テン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通テン株式会社 filed Critical 富士通テン株式会社
Priority to JP1984113228U priority Critical patent/JPS6129547U/en
Publication of JPS6129547U publication Critical patent/JPS6129547U/en
Application granted granted Critical
Publication of JPH026688Y2 publication Critical patent/JPH026688Y2/ja
Granted legal-status Critical Current

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  • Transceivers (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の構成説明図、第2図は本考案のスケル
チ装置を有するパーソナル無線機の要部ブロック図、、
第3図はマイクロコンピュータ20の処理の一例を示す
フローチャート、第4図は本考案の別の実施例の要部ブ
ロック図、第5図は従来のスケルチ装置の構成説明区で
ある。 20はマイクロコンピュータ、22はテンキー、33は
アナログスイッチ、36,60はスケ、ルチ回路である
FIG. 1 is an explanatory diagram of the configuration of the present invention, and FIG. 2 is a block diagram of the main parts of a personal radio having the squelch device of the present invention.
FIG. 3 is a flowchart showing an example of processing by the microcomputer 20, FIG. 4 is a block diagram of main parts of another embodiment of the present invention, and FIG. 5 is an explanatory section of the configuration of a conventional squelch device. 20 is a microcomputer, 22 is a numeric keypad, 33 is an analog switch, and 36 and 60 are scale and multi-circuits.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)群番夛設定用の複数のキーを有するパーソナル無
線機のスケルチ装置において、スケルチ開放感度を入力
電気信号に応じて変更可能なスケルチ回路と、前記複数
のキーの操作で入力されたスケルチ開放感度設定情報を
判別する狗別手段と、該判別手段で判別されたスケルチ
開放感度に応じて前記スケルチ回路のスケルチ開放感度
を変更するための電気信号を発生し前記スケルチ回路に
送出する制御手段とを具備したことを特徴とするスケル
チ装置。
(1) A squelch device for a personal radio that has multiple keys for group number setting, which includes a squelch circuit that can change the squelch opening sensitivity according to an input electrical signal, and a squelch circuit that can change the squelch opening sensitivity according to the input electrical signal, and a squelch circuit that can change the squelch opening sensitivity according to the input electrical signal, and dog discrimination means for discriminating open sensitivity setting information; and control means for generating and sending to the squelch circuit an electric signal for changing the squelch open sensitivity of the squelch circuit in accordance with the squelch open sensitivity determined by the discriminating means. A squelch device comprising:
(2)実用新案登録請求の範囲第1項記載のスケルチ装
置において、前記スケルチ回路は、検波出力中に含まれ
るノイズ成分によって充電されるコンデンサと、該コン
デンサと並列に接続された各々抵抗とトランジスタとを
含む複数の直列回路とを有し、該トランジスタのベース
に前記制御手段の出力が加わるものであることを特徴と
するスケルチ装置。
(2) Utility Model Registration In the squelch device according to claim 1, the squelch circuit includes a capacitor charged by a noise component contained in the detection output, and a resistor and a transistor connected in parallel with the capacitor. 1. A squelch device comprising a plurality of series circuits including a plurality of series circuits, the output of the control means being applied to the base of the transistor.
(3)実用新案登録請求の範囲第1項記載のスケルチ装
置において、、前記スケルチ回路iよ、受信部のリミツ
タ出力で充電されるコンデンサと、該コンデンサと並列
に接続された各々抵抗とトランジスタとを含む複数の直
列回路とを有し、該トランジスタのベースに前記ルリ御
手段の出力が加わるものであることを特徴とするスケル
チ装置。
(3) Utility Model Registration In the squelch device according to claim 1, the squelch circuit i includes a capacitor charged by the limiter output of the receiving section, and a resistor and a transistor connected in parallel with the capacitor. 1. A squelch device comprising a plurality of series circuits including a plurality of series circuits, the output of said Lurie control means being applied to the base of said transistor.
JP1984113228U 1984-07-25 1984-07-25 squelch device Granted JPS6129547U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984113228U JPS6129547U (en) 1984-07-25 1984-07-25 squelch device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984113228U JPS6129547U (en) 1984-07-25 1984-07-25 squelch device

Publications (2)

Publication Number Publication Date
JPS6129547U true JPS6129547U (en) 1986-02-22
JPH026688Y2 JPH026688Y2 (en) 1990-02-19

Family

ID=30672262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984113228U Granted JPS6129547U (en) 1984-07-25 1984-07-25 squelch device

Country Status (1)

Country Link
JP (1) JPS6129547U (en)

Also Published As

Publication number Publication date
JPH026688Y2 (en) 1990-02-19

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