JPS61294415A - Power source circuit - Google Patents
Power source circuitInfo
- Publication number
- JPS61294415A JPS61294415A JP13730185A JP13730185A JPS61294415A JP S61294415 A JPS61294415 A JP S61294415A JP 13730185 A JP13730185 A JP 13730185A JP 13730185 A JP13730185 A JP 13730185A JP S61294415 A JPS61294415 A JP S61294415A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- output voltage
- constitution
- operational amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Voltage And Current In General (AREA)
- Control Of Electrical Variables (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の技術分野］
本発明は入力電圧を分圧して複数の出力電圧を得る形式
の電源回路に係り、特に液晶表示パネル駆動用電源回路
に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a power supply circuit that divides an input voltage to obtain a plurality of output voltages, and particularly relates to a power supply circuit for driving a liquid crystal display panel.
［発明の技術的背景とその問題点］
最近、大形・多画素のマトリクス形液晶表示パネルの開
発が盛んである。これらのマトリクス形液晶表示パネル
の駆動に際しては、一般に、行電橿にアドレスパルスを
、列電穫に表示信号パルスを供給する。[Technical background of the invention and its problems] Recently, large-sized, multi-pixel matrix-type liquid crystal display panels have been actively developed. When driving these matrix type liquid crystal display panels, address pulses are generally supplied to the row electrodes and display signal pulses are supplied to the column electrodes.
第３図はこれらの駆動パルスの一例を示す波形図で、（
ａ）はアドレスパルス、（ｂ）は表示信号パルスである
。両パルス共フレーム周期（ＴＦ）毎に極性が反転され
、アドレスパルス（ａ）は選択時に■１またはＶｓの電
位を取り、非選択時に■５またはｖ２の電位を取る。表
示信号パルス（ｂ）は信号有りの時Ｖ６または■１の電
位を取り、信号無しの時Ｖ４またはＶ３の電位を取る。Figure 3 is a waveform diagram showing an example of these driving pulses.
(a) is an address pulse, (b) is a display signal pulse. The polarity of both pulses is reversed every frame period (TF), and the address pulse (a) takes a potential of 1 or Vs when selected, and takes a potential of 5 or v2 when not selected. The display signal pulse (b) takes the potential of V6 or ■1 when there is a signal, and takes the potential of V4 or V3 when there is no signal.
このようにマトリクス形液晶表示パネルを駆動するには
ｖ１〜ｖ６の６種の電位を出力できる電源回路が必要と
なる。In order to drive a matrix type liquid crystal display panel in this way, a power supply circuit that can output six types of potentials v1 to v6 is required.
第４図は従来の電源回路の一例を説明するための回路構
成図で、入力電圧■１および■６を出力する入力電源１
の両端間には抵抗分圧回路２およびオペアンプによるボ
ルテージフォロア３が並列に接続され、このボルテージ
フォロア３には抵抗分圧回路２で分圧された出力が加え
られる。Ｖｌ。Figure 4 is a circuit configuration diagram for explaining an example of a conventional power supply circuit.
A resistor voltage divider circuit 2 and a voltage follower 3 formed by an operational amplifier are connected in parallel between both ends of the resistor voltage divider circuit 2 , and an output voltage divided by the resistor voltage divider circuit 2 is applied to the voltage follower 3 . Vl.
ｖ２・・・■６は出力電圧である。すなわち、Ｖｌおよ
び■６の入力電圧間に抵抗分圧回路を接続し、■２〜■
５の電圧を発生せしめ、■１およびｖｌ＋と合わせて６
種の出力電圧を得るものである。ここで、ボルテージフ
ォロア３はｖ２〜Ｖ５の出力電圧に必要な出力電流能力
を与えるものであり、入力電圧である１およびＶｓが電
源電圧として供給されている。v2...■6 is the output voltage. In other words, a resistive voltage divider circuit is connected between the input voltages of Vl and ■6, and
5 voltage is generated, and 6 voltage is generated in combination with ■1 and vl+.
This is to obtain a different output voltage. Here, the voltage follower 3 provides an output current capability necessary for the output voltages v2 to V5, and input voltages 1 and Vs are supplied as power supply voltages.
この第４図の電源回路は構成が簡単であり、また抵抗分
圧回路のみのものに比較して出力電圧の安定度が良く、
液晶表示パネルの駆動用電源として広く利用されてきた
。しかしながら、液晶表示パネルの多画素化に伴ない出
力電圧Ｖ２ （またはＶｓ ）と入力電圧Ｖｌ （
またはＶｓ ）の電位差が小さくなり、ボルテージフォ
ロア３として用いているオペアンプの出力電圧範囲外と
なる問題が生じている。The power supply circuit shown in Fig. 4 has a simple configuration, and has better output voltage stability than a resistor voltage divider circuit only.
It has been widely used as a power source for driving liquid crystal display panels. However, with the increase in the number of pixels in liquid crystal display panels, the output voltage V2 (or Vs) and the input voltage Vl (
A problem has arisen in which the potential difference between voltages (or Vs) becomes small and the output voltage falls outside the output voltage range of the operational amplifier used as the voltage follower 3.
［発明の目的〕
本発明は上述した問題を解決したもので、出力電圧が入
力電圧に接近しても安定・確実に動作する電源回路を提
供することを目的とする。[Object of the Invention] The present invention solves the above-mentioned problems, and an object of the present invention is to provide a power supply circuit that operates stably and reliably even when the output voltage approaches the input voltage.
［発明の概要］
本発明は、入力電圧を分圧して複数の出力電圧を得る形
式の電源回路において、入力電圧との差が所定の値より
大きい出力電圧に対しては抵抗分圧回路にオペアンプに
よるボルテージフォロアを付加した第１の構成を用いて
発生せしめ、入力電圧との差が所定の値より小さい出力
電圧に対しては前記第１の構成により得た出力電圧を基
準電圧として、トランジスタと抵抗を用いた反転増幅回
路をオペアンプで制御する第２の構成を用いて発生せし
めるようにしたものである。[Summary of the Invention] The present invention provides a power supply circuit in which an input voltage is divided to obtain a plurality of output voltages, and an operational amplifier is added to the resistive voltage divider circuit for an output voltage whose difference from the input voltage is larger than a predetermined value. For output voltages whose difference from the input voltage is smaller than a predetermined value, the output voltage obtained by the first configuration is used as a reference voltage, and the transistor and This is generated using a second configuration in which an inverting amplifier circuit using a resistor is controlled by an operational amplifier.
［発明の実施例］
第１図は本・発明の一実施例を説明するための構成図で
、入力電圧■１およびｖ６を出力する入力電源４の両端
間には抵抗分圧回路５、オペアンプ回路６及び反転増幅
回路８１．８２が並列に接続される。前記オペアンプ回
路６はオペアンプ６１゜６２．６３．６４より構成され
、前記反転増幅回路８１．８２はトランジスタ及び抵抗
を用いて構成される。前記抵抗分圧回路５で分圧された
電圧はオペアンプ６１．６２に加えられ、このオペアン
プ６１．６２の出力はそれぞれ対応した電流ブースタ７
１．７２に加えられ、このＩ！流アブ−スタフ１７２の
出力端に出力電圧Ｖ３ 、Ｖ４が取り出される。前記電
流ブースタ７１．７２の出力はそれぞれ対応したオペア
ンプ６３．６４に加えられ、このオペアンプ６３．６４
の出力端はそれぞれ対応した抵抗９４及びダイオード９
５よりなる回路、抵抗９６及びダイオード９７よりなる
回路を介して反転増幅回路８１．８２の入力端に接続さ
れる。この反転増幅回路８１．８２の出力はそれぞれ対
応して電流ブースタ７３．７４に加えられ、この電流ブ
ースタ７３．７４の出力端から出力電圧Ｖ２ 、Ｖｓが
取り出される。前記電流ブースタ７３．７４の出力端間
には抵抗分圧フィードバック回路９１〜９３が接続され
る。出力電圧■１〜ｖ６は第４図の従来例と対応してい
る。[Embodiment of the Invention] Fig. 1 is a configuration diagram for explaining an embodiment of the present invention, in which a resistor voltage divider circuit 5 and an operational amplifier are connected between both ends of an input power supply 4 that outputs input voltages 1 and v6. Circuit 6 and inverting amplifier circuits 81 and 82 are connected in parallel. The operational amplifier circuit 6 is composed of operational amplifiers 61, 62, 63, 64, and the inverting amplifier circuits 81, 82 are constructed using transistors and resistors. The voltage divided by the resistor voltage divider circuit 5 is applied to operational amplifiers 61 and 62, and the outputs of these operational amplifiers 61 and 62 are respectively connected to corresponding current boosters 7.
1.72, this I! Output voltages V3 and V4 are taken out at the output end of the flow absorber 172. The outputs of the current boosters 71, 72 are applied to respective operational amplifiers 63, 64, which
The output terminals of are connected to corresponding resistors 94 and diodes 9, respectively.
5, a resistor 96, and a diode 97 to the input ends of the inverting amplifier circuits 81 and 82. The outputs of the inverting amplifier circuits 81 and 82 are respectively applied to current boosters 73 and 74, and output voltages V2 and Vs are taken out from the output ends of the current boosters 73 and 74, respectively. Resistor voltage division feedback circuits 91 to 93 are connected between the output terminals of the current boosters 73 and 74. Output voltages 1 to v6 correspond to the conventional example shown in FIG.
すなわち、第１図において、入力電源４がらの入力電圧
■１または■６との差が大きく、オペアンプの出力電圧
範囲内にある出力電圧例えばｖ３または■４に対しては
、第４図の従来例と同様に、抵抗分圧回路５の出力にオ
ペアンプ６１または６２と電流ブースタ７１または７２
より成るボルテージフォロアを付加した第１の構成が用
いられている。また、入力電圧Ｖ１または■６との差が
小さく、オペアンプの出力電圧範囲外となる出力電圧例
えば■２またはＶｓに対しては、先に得た電圧■３また
はＶ４を基準電圧としてオペアンプ６３または６４の反
転入力端子（−）に入力し、これら・のオペアンプ６３
または６４の出力で反転増幅回路８１または８２を制御
する第２の構成が用いられている。反転増幅回路８１ま
たは８２の出力にはｉ！流アブ−スタフ３たは７４が付
加されて出力電圧Ｖ２または■５が取り出される。出力
電圧Ｖ２とＶｓ間には抵抗９１．９２および９３で構成
される分圧フィードバック回路が設けられ、抵抗９１と
９２の接続点はオペアンプ６３の、抵抗９２と９３の接
続点はオペアンプ６４の夫々非反転入力端子に接続され
る。このような構成にすることにより、オペアンプ６３
および６４はその出力電圧が接地電位に近い電位で動作
することになり、従来回路での問題を解決できる。出力
電圧■２または■５の電位は例えば抵抗９２の直を加減
することにより、ｖｌとＶ３の中間電位またはＶ４とｖ
６の中間電位など、Ｖｌまたはｖ６に近い電位に同時に
設定することができる。オペアンプ６３および６４の出
力に接続された抵抗９４、ダイオード９５および抵抗９
６、ダイオード９７は反転増幅回路８１および８２に用
いているバイポーラトランジスタのベース・エミッタ間
に高い逆方向電圧が印加されることを防止するためのち
のであり、反転増幅回路にＭｏＳトランジスタを用いる
時には特に必要ない。第１図で用いている電流ブースタ
７１，７２．７３および７４としては例えば第２図に示
すような相補形エミッタフォロア回路を用いることがで
き、また出力電圧■２〜Ｖ５の負荷電流が小さい場合に
は、これらの電流ブースタ７１〜７４を省略することも
できる。That is, in FIG. 1, for an output voltage, for example, v3 or ■4, which has a large difference from the input voltage ■1 or ■6 from the input power supply 4 and is within the output voltage range of the operational amplifier, the conventional method shown in FIG. Similarly to the example, an operational amplifier 61 or 62 and a current booster 71 or 72 are connected to the output of the resistor voltage divider circuit 5.
A first configuration is used which includes an additional voltage follower consisting of: In addition, for an output voltage such as ■2 or Vs that has a small difference from the input voltage V1 or ■6 and is outside the output voltage range of the operational amplifier, the operational amplifier 63 or 64 to the inverting input terminal (-) of these operational amplifiers 63.
Alternatively, a second configuration is used in which the output of 64 controls the inverting amplifier circuit 81 or 82. The output of the inverting amplifier circuit 81 or 82 is i! A current absorber 3 or 74 is added to take out the output voltage V2 or 5. A voltage dividing feedback circuit composed of resistors 91, 92 and 93 is provided between the output voltages V2 and Vs, the connection point between the resistors 91 and 92 is connected to the operational amplifier 63, and the connection point between the resistors 92 and 93 is connected to the operational amplifier 64, respectively. Connected to the non-inverting input terminal. With this configuration, the operational amplifier 63
and 64 operate with an output voltage close to the ground potential, which can solve the problems with conventional circuits. The potential of the output voltage (2) or (5) can be set to an intermediate potential between vl and V3 or between V4 and v by adjusting the resistance of the resistor 92, for example.
It is possible to simultaneously set a potential close to Vl or v6, such as an intermediate potential of 6. Resistor 94, diode 95 and resistor 9 connected to the outputs of operational amplifiers 63 and 64
6. The diode 97 is used to prevent a high reverse voltage from being applied between the base and emitter of the bipolar transistors used in the inverting amplifier circuits 81 and 82, and is especially important when MoS transistors are used in the inverting amplifier circuit. unnecessary. As the current boosters 71, 72, 73 and 74 used in Fig. 1, for example, complementary emitter follower circuits as shown in Fig. 2 can be used, and if the load current of the output voltage 2 to V5 is small In this case, these current boosters 71 to 74 can be omitted.
また、抵抗９２を直列接続された。２つの抵抗で置き代
え、その接続点を接地することにより、出力電圧■２と
ｖ５の電位を独立に設定可能にすることもできる。Further, a resistor 92 was connected in series. By replacing the resistors with two resistors and grounding their connection points, the potentials of the output voltages (2) and (v5) can be set independently.
［発明の効果］
以上説明したように本発明によれば、入力電圧を分圧し
て複数の出力電圧を得る形式の電源回路において、入力
電圧に近い出力電圧に対してもオペアンプによるフィー
ドバック制御が可能となり、安定度の高い出力電圧を液
晶表示装置などの駆動回路に供給できる効果がある。[Effects of the Invention] As explained above, according to the present invention, in a power supply circuit that divides an input voltage to obtain a plurality of output voltages, it is possible to perform feedback control using an operational amplifier even for an output voltage close to the input voltage. This has the effect of supplying a highly stable output voltage to drive circuits such as liquid crystal display devices.
第１図は本発明の一実施例を説明するための構成図、第
２図は第１図の電流ブースタの一例を示す図、第３図は
マトリクス形液晶表示パネルの駆動パルスの一例を°説
明するための波形因、第４図は従来の電源回路の一例を
説明するための構成図である。
４・・・入力電源、５・・・抵抗分圧回路、６・・・オ
ペアンプ回路、７１〜７４・・・電流ブースタ、８１お
よび８２・・・反転増幅回路、９１〜９３・・・抵抗分
圧フィードバック回路、■１〜ｖ６・・・出力電圧。
出願人代理人 弁理士 鈴江武彦
■
■
＝
第２図FIG. 1 is a block diagram for explaining one embodiment of the present invention, FIG. 2 is a diagram showing an example of the current booster shown in FIG. 1, and FIG. 3 is a diagram showing an example of a driving pulse for a matrix type liquid crystal display panel. Waveform Factors for Explanation FIG. 4 is a configuration diagram for explaining an example of a conventional power supply circuit. 4... Input power supply, 5... Resistance voltage divider circuit, 6... Operational amplifier circuit, 71-74... Current booster, 81 and 82... Inverting amplifier circuit, 91-93... Resistance component Pressure feedback circuit, ■1 to v6...output voltage. Applicant's agent Patent attorney Takehiko Suzue ■ ■ = Figure 2
Claims (1)
路において、前記出力電圧のうち入力電圧との差が所定
の値より大きい出力電圧は抵抗分圧回路にオペアンプに
よるボルテージフォロアを付加した第１の構成を用いて
発生せしめ、入力電圧との差が所定の値より小さい出力
電圧は前記第１の構成により得た出力電圧を基準電圧と
して、トランジスタと抵抗を用いた反転増幅回路をオペ
アンプで制御する第２の構成を用いて発生せしめること
を特徴とする電源回路。In a power supply circuit that obtains multiple output voltages by dividing an input voltage, output voltages whose difference from the input voltage is greater than a predetermined value are determined by a voltage follower using an operational amplifier added to a resistive voltage divider circuit. The output voltage is generated using the configuration of 1, and the difference from the input voltage is smaller than a predetermined value.The output voltage obtained by the first configuration is used as a reference voltage, and an inverting amplifier circuit using a transistor and a resistor is used as an operational amplifier. A power supply circuit characterized in that the power is generated using a second configuration for controlling.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13730185A JPS61294415A (en) | 1985-06-24 | 1985-06-24 | Power source circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13730185A JPS61294415A (en) | 1985-06-24 | 1985-06-24 | Power source circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61294415A true JPS61294415A (en) | 1986-12-25 |
| JPH0584488B2 JPH0584488B2 (en) | 1993-12-02 |
Family
ID=15195485
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13730185A Granted JPS61294415A (en) | 1985-06-24 | 1985-06-24 | Power source circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61294415A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01223431A (en) * | 1988-03-03 | 1989-09-06 | Seiko Epson Corp | Liquid crystal display device |
| JP2007213558A (en) * | 2006-01-11 | 2007-08-23 | Matsushita Electric Ind Co Ltd | Voltage generating system |
| JP2007228702A (en) * | 2006-02-22 | 2007-09-06 | Fujitsu Ltd | Power supply device, control circuit thereof, and its control method |
| JP2008299716A (en) * | 2007-06-01 | 2008-12-11 | Panasonic Corp | Voltage generation circuit, analog/digital conversion circuit, and image sensor system |
| JP2011081420A (en) * | 2006-01-11 | 2011-04-21 | Panasonic Corp | Voltage generating device |
| JP6108025B1 (en) * | 2016-11-09 | 2017-04-05 | 富士電機株式会社 | Constant voltage generator and measuring device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5579491A (en) * | 1978-12-13 | 1980-06-14 | Hitachi Ltd | Liquid crystal display unit |
| JPS5859470A (en) * | 1981-10-05 | 1983-04-08 | Ricoh Co Ltd | Developing bias power source for copying machine |
| JPS6059615U (en) * | 1983-09-29 | 1985-04-25 | 富士通株式会社 | AC operational amplifier |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6059615B2 (en) * | 1982-09-01 | 1985-12-26 | 株式会社明電舎 | input/output device |
-
1985
- 1985-06-24 JP JP13730185A patent/JPS61294415A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5579491A (en) * | 1978-12-13 | 1980-06-14 | Hitachi Ltd | Liquid crystal display unit |
| JPS5859470A (en) * | 1981-10-05 | 1983-04-08 | Ricoh Co Ltd | Developing bias power source for copying machine |
| JPS6059615U (en) * | 1983-09-29 | 1985-04-25 | 富士通株式会社 | AC operational amplifier |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01223431A (en) * | 1988-03-03 | 1989-09-06 | Seiko Epson Corp | Liquid crystal display device |
| JP2007213558A (en) * | 2006-01-11 | 2007-08-23 | Matsushita Electric Ind Co Ltd | Voltage generating system |
| JP2011081420A (en) * | 2006-01-11 | 2011-04-21 | Panasonic Corp | Voltage generating device |
| JP2007228702A (en) * | 2006-02-22 | 2007-09-06 | Fujitsu Ltd | Power supply device, control circuit thereof, and its control method |
| JP2008299716A (en) * | 2007-06-01 | 2008-12-11 | Panasonic Corp | Voltage generation circuit, analog/digital conversion circuit, and image sensor system |
| JP6108025B1 (en) * | 2016-11-09 | 2017-04-05 | 富士電機株式会社 | Constant voltage generator and measuring device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0584488B2 (en) | 1993-12-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR950003016B1 (en) | Power source apparatus for driving liquid crystal display | |
| KR100348644B1 (en) | Voltage Multiplier Having An Intermediate Tap | |
| US7633470B2 (en) | Driver circuit, as for an OLED display | |
| KR900005489B1 (en) | The driving circuit of lcd devices | |
| EP0631269A2 (en) | Liquid crystal driving power supply circuit | |
| CN113539196B (en) | Source electrode driving circuit, display device and operation method | |
| KR20070013418A (en) | Driving apparatus for display device and display device including the same | |
| EP0772182A2 (en) | Display-driving voltage generating apparatus | |
| JPS61294415A (en) | Power source circuit | |
| KR20000012003A (en) | Power supply circuit for liquid crystal display | |
| EP0071911A2 (en) | Display device using a multiplex matrix display panel | |
| JPH0579967B2 (en) | ||
| KR19990013543A (en) | Driving voltage generator of liquid crystal display | |
| EP1063558B1 (en) | Liquid-crystal display, electronic device, and power supply circuit for driving liquid-crystal display | |
| US20040008197A1 (en) | Voltage generating apparatus including rapid amplifier and slow amplifier | |
| US11308906B2 (en) | Circuit for providing a temperature-dependent common electrode voltage | |
| CN1047016C (en) | A driving circuit for driving a display apparatus and a method for the same | |
| JPH1082978A (en) | Lcd driving voltage generating circuit | |
| JPH1117546A (en) | Voltage divider circuit, d/a converter, circuit board, electronic equipment and liquid crystal display device | |
| JPS6173196A (en) | Liquid crystal driving circuit | |
| JP2001117068A (en) | Power source circuit for liquid crystal | |
| JP3613852B2 (en) | Power supply circuit, liquid crystal display device and electronic device | |
| JP3495823B2 (en) | Drive circuit for display device | |
| JP2003337318A (en) | Power source circuit, power source for driving liquid crystal display, and liquid crystal display device | |
| JP2000132147A (en) | Stabilizing circuit and power supply circuit using it |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |