JPS61288297A - Security control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a security control system, and more particularly to a security control system installed in a building or a residence.

[Conventional technology]

Most conventional security systems can be broadly divided into two types: wireless systems and hardwired systems. Wireless systems typically utilize ultrasound or radio frequency signals to communicate information from an intrusion detection device to a central alarm device. Such systems have the inherent advantage of being easy to install, but also have the disadvantage of a relatively high probability of generating false alarms. This is mainly due to channel congestion. Additionally, radio frequency signals can easily penetrate the walls of buildings and homes.
It is very likely that a system in one building will accidentally trigger a system in an adjacent building. In this regard, it must be kept in mind that a fairly low false alarm rate of once per several hundred hours of use also contributes to the loss of system reliability.

Hardwired systems, on the other hand, are more reliable and less likely to trigger accidentally. However, hardwired systems require a separate dedicated wiring system, making such systems expensive for most users.

[Problem that the invention seeks to solve]

Accordingly, it is an object of the present invention to provide an improved security control system that is reliable, relatively low cost, and easy to install.

[Means and effects for solving the problems] The security control system of the present invention preferably utilizes a combination of wireless communication and communication via existing power lines within a building or residence.

A security control system according to a preferred embodiment of the present invention includes an intrusion detector, a signal relay module, a controller, and a slave module. Intrusion detectors are powered by batteries and are installed one at each door or window in a home or building. When a door or window to be protected opens, an intrusion detector generates a coded audible signal. The coded audible signal is received directly by a control device located sufficiently close to the activated intrusion detector, or by a signal relay module. The signal relay modules plug into conventional wall sockets and are installed one in each room or area of the house or building where the intrusion detector is located. Regardless of the number of intrusion detectors placed in a room or area, only one signal relay module needs to be installed in each room or area. The function of the signal relay module is to receive the coded audible signal generated by the intrusion detector and, in response, transmit a digital pulse coded signal to the control device via the power line. The controller also plugs into a conventional wall outlet and is capable of transmitting and receiving digital pulse-coded signals over the power line, as well as receiving coded audible signals directly from the intrusion detector as described above. In response to signals received directly from the intrusion detector or signals received from the signal relay module, the controller transmits a digital pulse coded alarm signal to the slave module via the power line. Slave modules are similarly plugged into wall outlets and control the operation of various loads such as alarms, sirens or lamps, or control the performance of specific tasks such as telephone dialing devices. Additionally, the controller can selectively address individual slave modules to provide a user with the ability to remotely control the operation of lamps and fixtures or other loads. That is, the control device according to the present invention allows the system to function not only as a security system but also as a remote control system.

When operated as a security system, the system of the present invention operates in two basic modes: instant arm and delayed arm. In instant arm mode, the controller is programmed to activate the internal alarm device and, upon receiving an intrusion signal, immediately transmit an alarm signal to the slave module to activate the alarm device.

This operation mode is employed, for example, when there is someone in the house at night and it is desired to know immediately that a suspicious person is trying to break into the house. Arm delay mode, on the other hand, allows the system to be set before leaving the premises to be protected, and when the system returns, there is a predetermined period of blank space following re-entering the premises, and the It is used to input a code into the control device to suppress the activation of the alarm device. Unlike conventional security systems where this delay function is performed in the controller, with the present system the time delay function is included in a remotely located slave module. More specifically, when in arm delay mode, upon receiving an intrusion signal, the control device:
It is programmed to transmit a coded signal over the power line to the remotely located slave units, and the coded signal starts a digital timer in each slave unit. After the slave unit is started,
Automatically operate the respective load or perform the respective task unless a disarm signal is received over the power line from the controller when the predetermined delay time has elapsed. The controller is programmed to transmit this disarm signal only if a secret code set by the user is entered. Therefore, it will be appreciated that the system of the present invention cannot be easily rendered inoperable simply by an intruder turning off or destroying the control device within the delay time defined by the arm delay mode.

Another important feature of the security control system of the present invention is that
A unique coded audio frequency communication link between the intrusion detector and the signal relay module and controller. In the preferred embodiment, the coded audible signal emitted by the intrusion detector when it detects an intrusion event consists of alternating 5kllz and 7.3kHz tone bursts, with continuous tones to eliminate echo problems. These particular frequencies used for the coded audio frequency link were selected primarily with the following considerations in mind: (1) The audible signal is used for intrusion detection. (2) Using signals within the audio frequency range reduces the risk of one system accidentally triggering an adjacent system; and (3) the frequency is highly unlikely to occur naturally.

The audio frequency receiver of the signal relay module and controller effectively separates the coded signal from background noise, thereby predictably adjusting the probability of false alarms and obtaining a predictable signal-to-noise ratio. It works according to the principle of constant false alarm rate (rcFARJ'). The audio frequency receiver detects the presence of a 6kHz tone and the simultaneous absence of a 7.3kHz tone, followed by <7.
It further includes a unique decoding circuit that utilizes a rejection principle by sequentially searching for the presence of a 3klIz tone and the simultaneous absence of a 6kHz tone. The combination of these features provides a highly reliable audio frequency communication link with nearly zero probability of false alarms.

In the security control system according to the present invention, the power line communication method employed to reliably transmit information between the signal relay module, the control device, and the slave module is also important. Information between the signal relay module, the controller and the slave modules is communicated over the power line by applying a carrier signal of a fairly high frequency (eg 121 k ) 12) to the power line. The transmitted message is in digital pulse-coded form, and the individual binary data bits are generated during predetermined periods of a 60 Hz alternating current waveform in carrier frequency bursts, or "
pulse”. Specifically, the binary value rl
J is represented by a pulse generated during the first half cycle of the 60 Hz AC waveform, and the binary value rOJ is represented by a pulse generated during the second half cycle of the AC waveform. Accordingly, synchronized operation of the various devices is achieved by synchronizing the transmission and reception of digital pulse coded signals to a 60 Hz AC waveform. Furthermore, in a preferred embodiment of the invention, the signal relay module and control device are microprocessor-based and are capable of detecting whether or not another device is already transmitting a message or which may interfere with the sending or receiving of the message. The program includes a program algorithm that tests an AC power line prior to transmission of a message to determine whether unacceptable levels of noise such as noise are present on the AC power line. information (intelligence)
Or, if the presence of an unacceptable noise level is detected, the device is programmed to implement an arbitrary length of time delay before attempting to transmit again. ,Thus, the problem of priority conflict related to power line access is solved, and 2
There is also no need to worry about one device constantly becoming isolated.

In order to prevent the security control system of the present invention from becoming inoperable due to loss of AC power, devices in the system that mainly rely on AC power, that is, signal relay modules,
The controller and some of the slave units each include a battery backup power source that is automatically enabled when AC power is lost. The devices further include internal crystal oscillator circuits or ceramic resonator oscillator circuits that are utilized to provide precise timing signals that allow the devices to communicate asynchronously in the absence of AC power. Their internal timing circuits further provide the carrier frequency used for power line communications.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic diagram illustrating a security control system 10 according to the present invention. The system of the invention can function not only as a control system but also as a security system. When used as a security system, it detects intrusion through a door or window to be secured and responds to such detection by sounding an alarm, activating an outdoor siren, lighting a lamp and/or Various functions can be performed, such as enabling an automatic telephone dialer. Generally, the security system consists of an intrusion detector 12, a signal relay module 18, a controller 20, and slave modules 22, 24 and 26. One intrusion detector 12 is placed at each intrusion point in the premises to be protected. Therefore, when installing the system within a residence, it is preferable to place an intrusion detector 12 at each door and window of the residence. Intrusion detector 12 is comprised of a module 14 that includes an audio frequency transmitter and a sensor switching circuit that controls the enabling operation of the audio frequency transmitter's circuitry. In a preferred embodiment, intrusion detector 12 further includes a permanent magnet 16 mounted adjacent transmitter module 14 to the door or window. the door or window is opened,
When the permanent magnet 16 thereby passes through the module 14, the sensor switch of the transmitter module 14 is activated, which in turn activates the audio frequency transmitter circuit.

It will be apparent to those skilled in the art that other types of intrusion detection devices that provide on/off switching signals can readily be used in place of the magnet-reed switch type sensor utilized in the preferred embodiment.

When intrusion detector 12 detects an intrusion, audio frequency transmitter module 14 generates a coded audio signal that is received either directly by controller 20 or by signal relay module 18 . The function of the signal relay module 18 is to relay the intrusion signal from the intrusion detector 12 to the control device 20 via the power line 30. The signal relay module is easily installed by simply plugging the module into a conventional 120 volt AC wall outlet.

Therefore, when installed in a normal house, except for the intrusion detector 12 directly monitored by the control device 20, one signal relay module 18 is installed in each room or outdoors where the intrusion detector 12 is placed. Must.

Controller 20 similarly plugs into a conventional 120 volt AC wall outlet. Directly monitored intrusion detector 1
In addition to receiving and decoding coded audible intrusion signals from 2, controller 20 also receives and interprets coded power line signals from relay modules and converts coded command signals into power
Various slave modules 22.2 via IIA30
4 and 26. Slave module 22.24
and 26 are similarly plugged into a wall outlet, respectively, depending on the particular load to be controlled.
2. Configuring the instrument module 24 or the alarm module 26. A desired number of slave modules may be distributed within a house or a building. The slave modules receive coded command signals from the controller 20 via the power line and control the operation of their respective loads according to the command signals. That is, in response to receiving the intrusion signal, the controller 20 is programmed to transmit appropriate command signals over the power line instructing the various slave modules 22, 24 and 26 to operate their respective loads. be done.

In addition, other types of threads, such as automatic telephone ringers, -
This is advantageous because it also allows for the use of hard drive devices. In this regard,
The present invention contemplates the use of any desired type of alarm response device when used as a security system;
Accordingly, the term "alarm device" as used in this specification and claims is understood to include audible and visual alarm response devices, as well as other types of alarm response devices, such as automated telephone calling devices. It should be. Moreover, it is considered that a plurality of control devices are used in the security control system IO of the present invention. In such cases, when a change in operating state is manually applied to one controller, that information is immediately transmitted over the power line to ensure that the operating state of all controllers in the system remains the same. communicated to other control devices. Additionally, each time a new secret code is established for the system and entered into one controller, the new secret code is automatically communicated to the other controllers in the system via the power line.

The security system of the present invention uses the controller 20 during instant arm operation or delayed arm operation to allow occupants to enter and exit the protected premises without triggering an alarm.
selectively defended against. Specifically, in arm delay mode, the occupant exits the premises within two minutes following the system's fortification, and controls the secret disarm code within 40 seconds after re-entering the protected premises. All you have to do is input it to the device 20 and abort the alarm sequence.

Importantly, disabling controller 20 during the 40 second delay period does not prevent slave modules 22, 24 and 26 from operating their respective loads after the delay period has elapsed.

As will be explained in more detail below, operation of jltj is not inhibited because slave modules 22, 24 and 26 are provided with internal timing circuitry that provides a 40 second delay period after receiving the countdown signal from controller 20. It is. More specifically, therefore, slave modules 22, 24 and 26 discontinue their timing functions only when they receive a disarm signal from controller 20 via power line 30.

Furthermore, the control device 20 of the security control system IO of the present invention
The slave modules 22 and 24 can also be utilized as a central control system for remotely controlling various lamps and appliances. That is, the control signal generated by the control device 20 and transmitted via the power line 30 includes an address code or unit code and an instruction code, and the various slave modules each have a unit code corresponding to a uniquely assigned address. Programmed to respond only to signals. Therefore, the control device 20 can selectively operate various loads connected to the slave modules 22 and 24. Considering safety and reliability, the signal relay module 18
, controller 20, and slave modules 22, 24, and 26 have house codes unique to that system that prevent power line communications that would cause undesirable responses in adjacent systems. The house code associated with security control system 10 is transmitted as part of each encoded signal transmitted over power line 30.

Before discussing the various devices of the PLO format system in detail, it is preferable to understand the power line communication format used in the system of the present invention.

The signal relay module 18 and the control device 20 operate at 60Hz.
Communication is performed via the power line by applying a relatively high frequency carrier wave signal to the AC signal line. The carrier frequency used in the preferred embodiment is 121kllz. The information is transmitted by digital pulse code modulation (rPCMJ) of the carrier signal.
) between various devices. In more detail with reference to FIG. 2, the position of the carrier frequency pulse burst relative to the 6011z AC waveform determines the data content of the signal.

As shown in the timing diagram of FIG.
If a wavenumber pulse burst occurs in the first half of the 6Oflz AC waveform, the pulse corresponds to the binary number rlJ.

Conversely, if the carrier frequency pulse burst occurs in the second half of the 60112 AC waveform, then the pulse corresponds to the binary number rOJ. Therefore, each cycle of the 60 Hz AC waveform is used to transmit one data bit of information in a power line communication message.

Additional data formats used in the preferred embodiment include a double mark (rDMJ) consisting of a carrier frequency pulse burst occurring once in both the first and second halves of the 60Ilz AC waveform, and two half-cycles of the 60H2 AC waveform. There is a space corresponding to the case where no carrier frequency pulse burst appears throughout. DM-
The data "1" sequence is used as a preamble to indicate the start of data transmission, so that the carrier frequency pulses appearing consecutively over three consecutive half cycles of the 60 Hz AC waveform are base 1
This is because it represents a situation that cannot occur during normal data transmission of and O. The DM signal code is also used as a standard for identifying the "first half" and "second half" of the 6011z AC waveform. A double space format is also used at the end of each message to indicate the end of data transmission. Such an indication is necessary because the various messages 7 used in the power line communication system of the present invention are not all of the same length. Therefore, the end of data transmission must be clearly identified.

As is further evident from the timing diagram shown in FIG. 2, the data pulses of the 121kHz carrier signal are
Begins at the zero crossing point of the Hz AC waveform. The duration of each carrier frequency pulse burst is determined by the relay module message (
2) and 7.33 milliseconds for the controller message.

Reference will now be made to FIGS. 3A and 3B, which illustrate the format of relay module messages in a preferred embodiment. It will be obvious that a virtually infinite variety of message formats can be used. The format of the present invention was chosen as it provides a satisfactory compromise between the number of available code options and the bandwidth of signal transmission. However, by eliminating the need for all system messages to be the same length,
Significantly, the required bandwidth for signal transmission has been reduced because some message formats of the preferred embodiment have been able to be significantly shorter than other message formats. Furthermore, since the power line communication method adopted in the system of the present invention has high reliability as a whole, there is no need to repeat message transmission to confirm whether or not reception is appropriate.

The first relay module message shown in FIG. 3A is an alarm message that is transmitted over the power line to controller 20 whenever a valid audible signal is received from the intrusion detector. The relay module alarm code selected in the preferred embodiment system consists of two consecutive double marks. Additionally, each power line communication includes the transmission of a system's assigned house code to distinguish the power line communication of one system from that of another system. In the preferred embodiment, an 8-bit house code is used, so there are 2@, or 256 possible codes. Following the transmission of the house code, the alarm message ends with a double space.

The second relay module message shown in FIG. 3B is a low battery message that is transmitted to the control device via the power line every time it is determined that the voltage level of the backup battery power source has fallen below a predetermined minimum value. . The relay module low battery message in the preferred embodiment consists of four consecutive double marks, followed by a system assigned house code, and a final double space.

Next, FIG. 4A, FIG. 4B, and FIG. 4C showing the power line communication command format of the control device 20 will be explained.

When used as a central control system, the controller code format can selectively access and control individual slave modules. The basic message format of the controller command message shown in FIG.
'', followed by an 8-bit instruction code, a 4-bit instruction code, one parity bit, an 8-bit unit code, and a final double space. In the preferred embodiment, the state of the parity bit is a binary "1" in the controller command message.
Determined by the number of bits. A parity bit that is rlJ corresponds to an even number, and a parity bit that is "0" corresponds to an odd number. The 4-bit instruction code identifies the particular task to be performed by the slave module and includes, for example, remote control functions such as "unit on", "unit off", "dimramb", etc. The 8-bit unit code is a unit-specific code for identifying the desired slave module to be controlled. As will be explained later for the lamp module shown in FIG.
A slave module responds to a controller command message only if the house code and unit code in the message correspond to a particular house code and unit code preset for that particular slave module.

Additionally, the preferred embodiment controller 20 includes a fourth lamp module for turning on or off all lamp modules in the system.
It has another command as shown in Figure B.

The formant of this command is simple, with a preamble and 8
It consists of a bit house code, a 4-bit instruction code, a parity bit, and a double space. Since the command seeks to access all lamp modules in the system, no unit code is required.

The format of the coded message transmitted by the control device when operated in guard mode is similar to the command message described above, since guard mode commands are not selectively transmitted to specific slave modules. It is different from the 4-resoto. Therefore, transmission of the unit code is not necessary. The controller status commands used when the system is operated in security mode are (1) instant arm, (2) arm delay, (3) disarm, and (4)
) alarm and (5) countdown.

The controller 20 is operated in instant arm security mode or delayed arm security mode by operating the appropriate mode selection switch on its front panel. When in either of these arm states, controller 20 sends appropriate instant arm command messages or arm delay command messages solely for the purpose of updating the state of all other controllers included in the system. programmed to transmit. If the invention is applied to a system that includes only one controller, no transmission of instant or delayed arm status commands by the controller is required. The alarm command or countdown command is transmitted by the controller in response to receiving a relay alarm signal over the power line or receiving a coded audible signal from the intrusion detector 12. Alarm command messages are transmitted when the controller is in the instant arm state, and countdown command messages are transmitted when the controller is in the arm delay state. The slave modules are programmed to immediately respond to receipt of an alarm command from the controller by performing a respective corresponding task. In contrast, when a countdown command is received from the controller, the slave module is programmed to start a 40 second delay timer before performing its respective task. A disarm command message is sent to controller 2 each time the controller is switched to disarm mode.
Transmitted by 0. The control unit can be switched from instant arm mode or arm delay mode to disarm mode by entering a five-digit secret code preset by the occupant through a keyboard on its front panel. The slave modules are programmed to respond to receipt of a disarm command from the controller by aborting their respective previously started tasks or by aborting the operation of the 40 second delay timer. - The controller status command messages described above each use the same encoding format shown in Figure 4C. As is clear from the figure, the message is divided into two segments. The first segment consists of a preamble, an 8-bit house code, a 4-bit instruction code, a parity bit, an 8-bit secret code, and a double space. The second segment similarly consists of a preamble, an 8-bit house code, a 4-bit instruction code, a parity pit, an 8-bit secret code, and a double space. In the preferred embodiment, the secret code is a five-digit number (each digit is a decimal number from 1 to
5). Therefore, to represent the secret code in binary encoded decimal notation, three bits of information are required for each digit, or a total of 15 bits of information.

Therefore, to maintain uniformity of controller message format, the message transmission is divided into two segments, the second segment of the message overlapping the first segment except for the secret code portion of the transmission. That is, the first segment contains the first seven bits of the secret code and the second segment contains the remaining eight bits of the secret code.

The first slot of the secret code part of the message is “0”.
” is inserted arbitrarily.

5 is a circuit diagram of the transmitter module 14 of the intrusion detector 12 according to the present invention. As previously mentioned, the transmitter module 14 is responsive to the approaching movement of an externally disposed permanent magnet and, in response, sequentially alternating 6kllz and 7.3
It generates a coded audible signal consisting of tones at a frequency of kHz with a predetermined spacing between successive tones. Reference is further made to FIG. 6, which is a timing diagram illustrating the encoded audio signal generated by transmitter module 14 in a preferred embodiment of the present invention. Specifically, the coded audio signal generated by the transmitter module 14 has an initial frequency of 6 kHz (6 kHz) lasting approximately 15 milliseconds.
tone burst (rAJ), followed by a pause of <62.5 ms, followed by a second tone burst ("B") at a frequency of 7.3 kHz for 15 ms. This alternating tone signal is repeated five times with 62.5 milliseconds between successive tones ( rABABAI
IABABJ). The time interval between successive alternating frequency tones avoids potential echo problems (
(discussed in more detail below), while at the same time being short enough so that the overall signal length remains relatively short, ie less than three-quarters of a second.

Returning to FIG. 5, the transmitter module 14 of the preferred embodiment first includes a custom integrated circuit 40 that generates alternating frequency tone signals of 5kllz and 7.3kHz in the timing sequence pattern shown in FIG. It consists of Integrated circuit 40 is powered by a portable 9 volt battery power supply 42 connected to the input terminals of the circuit. In a preferred embodiment, custom integrated circuit 40 includes a low battery detection circuit that monitors the voltage level of battery power supply 42 and generates a unique low battery output signal when the battery voltage level falls below a predetermined level. include. Transmitter module 14 is operated by switching internal mode switch 44 to the on position. When the mode switch 44 is in the on position, the custom integrated circuit 40 is connected to the externally disposed permanent magnet 16 (FIG. 1).
in response to detecting a change in state of switch contact 46 in response to the approach of the switch. More specifically, the switch contact 46 is
The (+TR) of the custom integrated circuit 40 constitutes an input terminal connected to a trigger circuit that detects a change in the state of either the switch contact input terminal (+TR) or (-TR).
) connected to the input terminal. The external connections shown in the circuit diagram are provided to allow the transmitter module 14 to optionally be used with any external intrusion detector that opens and closes the contacts.

Custom integrated circuit 40 further includes a counter circuit and a sequence coder that controls alternating 5 kHz and 7.3 kHz frequency transmission in response to a trigger circuit. 5kHz
The frequency signal of 7.3kHz is sent from the crystal clock crystal 48 to the 0SC-IN terminal and 03C-O of the custom IC 40.
It is generated by a frequency divider within custom integrated circuit 40 that divides the 32.768 k fiz frequency signal provided to the LJT terminal. The sequence coder supplies a signal to an output amplifier connected to a transducer 50, which in the preferred embodiment consists of a piezoelectric element with a fundamental frequency of 6.5 kHz. It has been found that a single piezoelectric transducer with a fundamental frequency approximately midway between the desired output frequencies of 6kllz and 7.3kHz can be used to generate two frequency tones at acceptable db levels.

1 Module (18) Next, FIG. 7, which is a circuit diagram showing the signal relay module 18 according to the present invention, will be described. As previously mentioned, the function of the signal relay module 18 is to receive the coded audible signal from the intrusion detector 12 and, in response, transmit a digital pulse coded signal to the controller 20 over the power line.

In a preferred embodiment, the signal relay module 18
mainly includes a power supply circuit 60, a custom integrated circuit 70,
It consists of a 4-bit microprocessor 80. The signal relay module 18 plugs into a conventional wall outlet and receives its primary power from a 120 volt, 60 Hz AC signal.

However, if secondary power is lost, a portable battery backup power source 54 is also used. The coded audible signal from intrusion detector 12 is received by transducer 56, which in the preferred embodiment comprises a pair of microphones mounted on the bottom of a mechanically tuned boat. Still referring to FIG. 8, the casing of the signal relay module 18 is configured to transmit audible signals other than the noise generated by the intrusion detector 12 and the desired 5 kHz and 7.3 kHz tones by the microphone 56. It includes a pair of tuned ports 58 and 59 comprised of 1/16 wavelength resonators that act as simple mechanical bandpass filters that substantially reject or attenuate signals before being converted to signals.

Returning to FIG. 7, the output from microphone 56 is a constant false alarm rate (rcFAR) signal that detects an audible 6 kHz/7.3 kHz signal from intrusion detector 12.
J) Custom integrated circuit 7 corresponding to the input terminal of the receiver
0 to one input terminal.

Further explanation will be given with reference to FIG. FIG. 9 is a more detailed circuit diagram and block diagram of a CFAR receiver used in a preferred embodiment of the invention. First, the output signal from the microphone 56 is supplied to a broadband bandpass filter 64 via an amplifier 62. The output from the broadband bandpass filter is then fed to a limiter circuit 66 whose outputs are 6kllz and 7.3 . 1 with a fundamental frequency centered at kHz
A pair of narrow bandpass filters 68 and 72 are provided. In environments containing white noise or multipath signals, such as those generated when an audible signal is transmitted through a house or building, it is important to focus the decoding operation on the strongest reflected signals. A signal processing combination of a wideband bandpass filter, a limiter circuit, and a narrow bandpass filter performs this decoding operation by extracting the strongest signals in the spectrum. More specifically, limiter circuit 66 operates as a constant energy black box by providing energy to the strongest signal received from the output terminal of broadband bandpass filter 64. Thus, limiter circuit 66 emphasizes the difference between strong information signals and relatively weak background noise. If only narrow bandpass filters 68 and 72 were used, some form of automatic gain control would be required to compensate for the different levels of background noise. However, automatic gain control requires high rQJ bandpass filters that are difficult to implement in integrated circuit form and introduces intolerable delays in the decoding process. In this regard, a receiver with automatic gain control
Whereas the CFAR receiver of the present invention typically "misses" the useful signal that occurs immediately following the noise transient, the CFAR
It will be appreciated that such valid signals are properly identified because the receiver gain is not constantly being adjusted.

The outputs of narrow bandpass filters 68 and 72 are provided to envelope detectors 74 and 76, respectively. Envelope detector 74
and 76 operate to ensure that the signals passed through narrow bandpass filters 68 and 72 are of sufficient duration to constitute a useful signal.

In addition, envelope detectors 74 and 76 eliminate short-term dropouts in the output signals of narrow bandpass filters 68 and 72, which may be caused by "cancellation" of two signals of equal amplitude and opposite phase angles. Eliminate everything. The outputs of envelope detectors 74 and 76 are provided to a pair of comparators 78 and 82, respectively. These comparators act as dark value detectors that establish a minimum characteristic level that a received signal must exceed in order to be accepted as a valid signal.

In the preferred embodiment, the magnitude of the reference signal provided to comparators 78 and 82 is set to be one-half the maximum output level from narrow bandpass filters 68 and 72.

At this point, we can understand the relationship between the operating characteristics of the CFAR receiver and the 62.5 millisecond delay time between successive tones in the audible intrusion signal. In detail,
The delay time in the audible intrusion signal is, for example, 7.3kHz.
By the time the z signal is transmitted, the echoes from the previous 5kHz signal have become sufficiently weak and of sufficient duration that they are completely rejected, or "locked out," by the CFAR receiver. is set to Therefore, only valid 6kHz and 7.3kHz tone signals are
Since the signals pass through the FAR receiver alternately, it is possible to use the "exclusive one circuit" described later.

In order to further increase the reliability of the audible communication link, the audio frequency receiver of the signal relaying module 18 detects the presence of a 6 kHz signal and the simultaneous absence of a 7.3 kHz signal (Vt < 7.3 k)! It further includes a unique logic gate circuit that sequentially searches for the presence of the z-fold signal and the simultaneous absence of the 5kflz signal. Specifically, the outputs of the two comparators 78 and 82 are connected to inverters 84 and 86.
are supplied respectively. The output of inverter 84 is supplied to an input terminal of a first NAND gate 94 and, via another inverter 88, to an input terminal of a second NAND gate 92. Similarly, the output of inverter 86 is supplied to the other input terminal of NAND gate 92 and, via inverter 90, to the other input terminal of NAND gate 94. NAND gates 92 and 9
The outputs of 4 pass through analog switching devices 96 and 98, respectively, before being combined and provided to output pin 14 of custom integrated circuit 70 via a final inverter 104. The on/off states of analog switch noting devices 96 and 98 are controlled by switching signals provided by microprocessor 80 to input pin 15 of custom integrated circuit 70. Switching signals from the microprocessor are provided via a first inverter 100 to a control terminal of an analog switching device 96 and via a second inverter 102 to a control terminal of an analog switching circuit 98.

The logic gate circuit operates as follows. Effective 6kHz
When a frequency pulse signal is received, the output of comparator 78 becomes H1, thereby providing an H1 input signal to NANI) gate 92. However, at the same time 7.3kHz
The output of NAND gate 92 will not go to Hl unless the signal is present and the output of comparator 82 goes to LO. In other words, the output of NAND gate 92 will be HI only when the output signal of comparator 78 is HI and the output signal of comparator 82 is LO. Similarly, when a subsequent valid 7.3kHz frequency pulse signal is received, the output of comparator 82 will be Hl, thereby causing H1
The signal is provided to the input terminal of NAND gate 94.

However, even if the output of NANI) gate 94 receives an I signal from comparator 82, it will not go to Hl unless the output signal of comparator 78 is LO.
The output of ND gate 94 will be 1 (when a 7.3kHz signal is received only if no 6kflz signal is present at the same time).

Analog switching devices 96 and 98 connected to the output terminals of NAND gates 92 and 94, respectively, are alternately rendered conductive and non-conductive by a switching signal provided by microprocessor 80 to input pin 15 of custom integrated circuit 70. Ru. microprocessor 80
are the valid 5 kHz and 7. within a given "window".
It is programmed to search for the presence of a 3kHz signal. Returning to the coded audio signal timing diagram of FIG. 5kHz
and is programmed to search for the presence of a 7.3kHz pulse signal. To perform this search, microprocessor 80 searches for a period of 2.5 milliseconds after receiving the first valid 6kllz signal burst, which is less than the total time of 77.5 milliseconds between the rising edges of successive alternating tone bursts. Waits for a period and then waits for a valid 7.3 period for <20 ms.
It operates synchronously with respect to audible signal transmissions from intrusion detector 12 by searching for kHz tone burst signals. The tone signal generated by the intrusion detector 12 is 15
has a duration of milliseconds, but the microprocessor 80
is programmed to accept tone bursts lasting at least 7.5 milliseconds as valid signals, allowing for the possibility of "dropouts" occurring during the overall 15 millisecond period. Additionally, microprocessor 80 in the preferred embodiment is programmed to accept all three consecutive alternating tone signals as valid coded audible signals. In other words, the effective signal of the intrusion detector is a proper 6 kHz - 7, 3 kHz - 6 kHz
z tone sequence or proper 7.3 kHz -6k
llz -7,3k)lzl-- is detected following the reception of the lzl-- sequence. Therefore, the coded audible signal emitted by intrusion detector 12 is 6kHz
If the z-7.3 kHz tone sequence is repeated five times, the system of the present invention provides a significant margin of error to ensure that the coded audio signal has been reliably detected by the signal relay module I8. It means that it was done.

Once the microprocessor 80 of the signal relay module 18 determines that a valid coded audible signal has been received from the intrusion detector 12, the relay alarm power line carrier signal is transmitted over the power line to the controller 20. In the preferred embodiment, custom integrated circuit 70 includes a PLO transmitter circuit. Figure 10 shows the signal relay module 1.
8 is a block diagram of a PLO transmitter of FIG. As mentioned above, the PLO signal is 60Hz when AC power is utilized.
A pulse code modulated 121 k llz carrier frequency signal synchronized to the zero crossing point of the AC waveform. 12
1k)lzllI Transmit Frequency Doubler Signal is generated from a 484 kHz ceramic resonator sustained at the 05C1 and 03C2 inputs of the Tam integrated circuit 70. Inputs from the 03C1 and 03C2 input terminals are fed to an internal oscillator circuit 110, which is a 484k
Generates a Hz oscillator output signal. The 484 kHz oscillator output signal is provided to a frequency divider circuit 112 that generates a 242 kHz output signal on signal line 114 and a 121 kHz output signal on signal line 116. 24 of the signal line 114 generated from the frequency dividing circuit 112
2kllz output signal and 121kHz of signal line 116
Both the z output signals are supplied to logic gate circuit 118. The logic gate circuit 118 is connected to the signal line 121 of the signal line 116.
The 50 percent duty cycle of the kHz output signal is reduced to the 25 percent duty cycle of signal line 120. As a result, the signal appearing on signal line 120 is provided to the PLCOUT terminal (pin 7) of custom integrated circuit 70 via driver amplifier circuit 122. However, 121 k via logic gate circuit 11B
The Hz multiplication signal transmission is controlled by a microprocessor 80 that provides an enable signal to the PLC enable input terminal (pin 16) of the custom IC 70. Accordingly, microprocessor 80 controls the timing of the transmission of PLO signal bursts.

Returning to FIG. 7, microprocessor 80 connects signal line 12 from power supply circuit 60 to limit the timing of transmission of the PLO signal in accordance with the previously described pulse encoding format.
4 to receive the 6011z zero-crossing signal. The house code selected for the system is provided to microprocessor 80 via the setting of switch 126. As a result, the PLC generated from the custom IC (pin 7)
The OUT signal is connected to the output driver device 126 and the coupling transformer 1 connected to the 120 Bordeaux 60) 1z outlet 52.
28 to the power line.

Considering that the system of the present invention uses a single power line communication "channel" to send and receive messages to and from various devices, two or more devices may attempt to transmit messages at the same time. It is possible that problems may occur in some cases.

The potential for this problem to occur is particularly great if simultaneous detection of the same event by two or more devices is indeed possible. To avoid the problem of "collisions" and resulting message contention, the microprocessor 80 of the signal relay module 18 (as well as the microprocessor of the controller 20) detects information or excessive noise present on the power line. Before starting transmission, check the power line to determine whether If either condition is detected, microprocessor 80 delays transmission of the PLC message.

The "anti-collision" function of the present invention is implemented as follows. Considering the PLO encoded formats employed in the system of the present invention, the power line must pass through at least three AC power line cycles at 121 kHz before loss of information on the power line can be assumed.
No transmitted signal shall appear. Accordingly, microprocessor 80 is programmed to allow a "quiet time" of three AC power line cycles on the power line before transmission of a PLO message begins. Additionally, the microprocessor 80 is programmed to monitor the AC power line for the presence of information and/or excessive noise during the transmission of PLC messages.

Specifically, as explained above with respect to FIG.
The 21 kHz carrier frequency appears only during half of a given cycle of the 6011z AC waveform to generate the coded binary digit rlJ or "0". Thus, microprocessor 80 detects the presence of information and/or excessive noise on the power line during this "unused" half-cycle of the AC waveform when transmitting PLC messages.

In a preferred embodiment of the system of the present invention, power line adjustments for the presence or absence of information or unacceptable noise levels are performed as follows.

The custom integrated circuit 70 of the signal relay module 18 is
Although the signal relay module is for the transmission of PLC signals, it further includes a PLO receiver circuit for interrogation purposes. The power line signal from coupling transformer 128 is 1
It is fed to the PLCIN input terminal (pin 20) of custom IC 70 through a bandpass filter circuit 130 having a center frequency corresponding to the PLC carrier frequency of 21kllz. Further, description will be given with reference to FIG. 11 showing a block diagram of the PLC receiver circuit of the custom IC 70. The AC input signal that has passed through the filter is converted into a custom IC.
It is fed to a dark value comparator circuit 132 which compares it to an externally set threshold value fed to pin 1 of the AO.

The output signal of comparator circuit 132 is rectified by rectifier 134 and provided to peak detector/signal averaging circuit 136, which generates a DC level signal at its output terminal. The output signal of the peak detector/signal averaging circuit 136 is connected to the PLCOUT (pin 18) of the custom IC 70.
Before being applied to the terminal, it passes through a second comparator circuit 138 with an internally set dark value.

Microprocessor 80 is programmed to detect the presence of AC power line information or excessive noise by examining the signal provided to pin 18 of custom IC 70 from the output terminal of the PLO receiver circuit. Specifically, microprocessor 80 in the preferred embodiment has approximately 15
It is programmed to sample the signal on the PLCOUT signal line at a sampling rate of 0 microseconds. 4
If consecutive signals having a duration greater than 0.00 microseconds are detected, information is presumed to be present and microprocessor 80 "stands off" (ie, waits). Furthermore, the microprocessor 80 has a custom I
Current the number of noise spikes detected for a given period of time in the output signal provided by the PLC receiver circuit at pin 18 of C70, and if the sum of the counts exceeds the predetermined number, the information "Collision" is issued. programmed to standoff as in the case of In either case, when the presence of information or excessive noise is detected, microprocessor 80 is programmed to implement a time delay of any duration before transmission is attempted again.

Considering the duration of controller command and controller status messages (FIGS. 4A and 4C) - the longest PLC message format used in the system, the random delay period in the preferred embodiment is between 400 ms and 2 ms. Set to length in seconds. (However, since the controller status message shown in FIG. 4C is transmitted in two parts, the random standoff delay period does not need to be too long.) System signal relay module 18 and controller 20 are all programmed to function similarly in this regard. Thus, by having each device in a potentially conflicting situation perform a random time delay, the problem of priority conflicts for access to the AC power line is resolved in an arbitrary manner. That is, there is no possibility that the two devices will be in a constant standoff situation.

Finally, the signal relay module 18 in the preferred embodiment further includes an LED 139 (FIG. 7) connected to the 01 output port of the microprocessor 80. Microprocessor 80 turns on LED 139 for 30 milliseconds when a valid coded audible intrusion signal is received and whenever the voltage level of battery backup power supply 54 drops below a predetermined minimum value (of course AC (assuming power is used) is programmed to flash LED 139 rapidly.

The MM equipment and weapons will be explained with reference to Figure 12. FIG. 12 is a partial circuit diagram of a control device 20 according to the invention.

The control device 20 constitutes the primary interface between the security control system 10 and the user. Controller 20 in the preferred embodiment includes an LCD display that displays system status information and labels five keys on the keyboard. The keyboard further includes keys dedicated to all lights on, all lights off, and secret code functions.

As previously described with respect to the system, controller 20 receives PLO-encoded messages from signal relay module 18 or receives encoded audible intrusion signals directly from intrusion detector 12 and, in response, transmits PLO-encoded messages. messages to the various slave modules 22 in the system.
Transmit to. Additionally, the controller 20 receives information from other controllers in the system, including key status information of those other controllers.
A PLO message is received indicating the entry of a new secret code or other information (eg parity check) that will be communicated to the controller. In the preferred embodiment, the main state status of the controllers is 15 to ensure that all controllers in the system are always in the same state.
Every minute and each key state change is communicated via the power line.

The primary states of the system of the present invention that are communicated over the power line are non-transitory states associated with the guard operating mode of the controller, including instant arm, arm delay, and disarm.

The various states of the system controller in the preferred embodiment are summarized below.

a) Disarm state. The disarmed state is one of the three primary security states of the controller, and is the state to which most non-security related states are combined.

b) Test condition. Test conditions are used to perform a complete inspection of the installed security system. When in this state, the controller transmits PLO coded alarm messages to the various slave modules and two seconds later transmits a disarm message. Furthermore, by manually operating all the intrusion detectors 12 in the system, the intrusion detectors can be put into test operation, and the control device transmits an all-rights-on message, and 2 seconds later transmits an all-rights-off message. . Furthermore, the control device operates an internal alarm device during this 2 seconds.

C) All lights on. This is a temporary condition that causes the PLO command message All Writes On to occur.

d) All lights off. This is a temporary condition that causes the PLC command message All Lights Off to occur.

e) Panic alarm. This is a temporary condition that generates a PLO command message alarm, and is entered by simultaneously holding down the All Lights On and All Lights Off buttons for more than one-half second, regardless of the current state of the system.

Once entered, the panic alarm condition proceeds exactly like an intrusion alarm, by entering a secret code or by pressing 15
You can exit this state by waiting for the minute alarm timer.

r) In error. This is a temporary state that notifies the user that an incorrect number was entered while entering the disarm code or entering a new secret code. This condition causes the controller's internal alarm to generate a small buzzer sound for 100 milliseconds, and also causes the display to stop for one-half second.

g) Power Applied. This is the condition entered when power is first applied to the control device, either by connecting the battery or by plugging the control device into an AC outlet. This state stores 11111 as the secret code and causes all display segments to flash until the secret code button is pressed and a new secret code is entered.

h) Enter secret code. This state is entered whenever the secret code button is pressed and the system is in either the disarmed, tesl- or power-applied state. The button must be held down until all five numbers of the secret code have been entered.

When you release the button, the secret code will be automatically memorized.

i) Instant arm. This state is one of three major system states. While in this state, upon receiving a coded audible signal from an intrusion detector or receiving a PLC relay alarm signal, it immediately transitions to the alarm action state. Instant arm button at least 0.7
The instant arm state can only be entered by either pressing for 5 seconds or receiving an instant arm state message over the power line from another controller. Additionally, this button is labeled Instant Arm on the display only when the controller is in the disarmed state. Therefore, this state can only be entered from the disarmed state, and the only way out of this state is by entering the correct secret code.

j) Alarm action. This state is the primary state for performing system-wide alarms. Assuming the system is armed, the coated audible signal from the intrusion detector or the PL from the signal relay module
This state can be entered after receiving an O-alarm message. Furthermore, this state can also be entered by simultaneously operating the All Lights On button and All Lights Off button. This condition remains in effect throughout the 15 minute warning period and can only be terminated by correctly entering the secret code before the 15 minute timeout expires.

k) Alarm timeout. This state is an extension of the previous alarm action state and represents the action taken when the 15 minute alarm timer expires.

Enter the disarm code. The display labels the keys with numbers and enters this state when a number button is pressed. A 5-digit secret code is entered and compared to the stored code. Alternatively, if the secret code button is also pressed and the controller is in either a disarmed, test or power applied state, the five digit number entered is stored as the new secret code.

m) Arm delay. This state is one of the three main states of the controller. The arm delay state can only be entered from the arm enable state. Exit this state upon receiving a PLC relay alarm message or a coded audible alarm signal from an intrusion detector, or by entering the correct secret code.

n) Countdown delay. This state represents a 40 second counter counting down from the receipt of an intrusion message to the alarm action state.

This countdown state controls the 40 second countdown indicator on the display and sends P to the slave module.
Also relevant is the transmission of LC countdown messages.

0) Arm enable. This state is entered upon receiving an arm delay message via the power line from another controller or by pressing the arm delay button for at least 0.75 seconds. This state represents a transient state between disarm and arm delay, which are the main states of the control device. After the controller enters the arm enable state when 40 seconds have elapsed after detection of an exit event from the protected premises or when 2 minutes have elapsed without an exit event from the time the arm delay button was pressed, Completes transition to arm delay state. During this time a secret code can be entered to abort this state and return the controller to a disarmed state.

p) Low battery relay. This is a temporary state entered when a low battery PLC message is sent from a signal relay module in the system indicating that the signal relay module is in a low battery state. The only action taken by this condition is to turn on the "low battery relay" flag on the controller's display and start the low battery timeout counter. In order to keep this low battery flag set in the control device display, low battery PLO relay messages must be received continuously at intervals of 3 to 16 minutes; if no messages are received, the flag is set. will be reset.

q) Low battery control device. This is a temporary state that is entered when the controller battery test indicates a low battery condition in the controller. The only action performed by this condition is to turn on the "low battery controller" flag on the controller display.

Returning to the circuit diagram of FIG. 12, the controller 20 generally includes a power supply 146 and a custom integrated circuit 142 that is the same as that used in the signal relay module 18;
It consists of a bit microprocessor 140. Additionally, the controller includes a conventional LCD display driver;
Regulation? It includes a display board (not shown) having various switch contacts for the buttons provided on the keyboard panel of the I11 device.

Microprocessor 140 controls the LCD display driver of the display board via output port BO-82 and is connected to the various switch contacts of the display board via input port DO-D7. Input port DO-D7 of microprocessor 140 is further connected to two rotary knob switches 150 located on each bottom panel of the controller for setting the house code of the system.

The function and operation of the custom integrated circuit 142, which includes an interface circuit between the custom IC and the 120 pol-60 Hz AC power line, is the same as the custom integrated circuit included in the signal relay module 18. Therefore, the control device 20 receives information from the AC power line and transmits information to the AC power line in the same manner as the signal relay module 18. It is self-evident that while the control device 20 decodes and interprets the received PLC messages, the signal relay module 18 merely identifies the presence or absence of PLC messages on the power line for collision prevention purposes. Additionally, as previously discussed, the controller's microprocessor 140 monitors the AC power line for information or excessive noise levels before and during the transmission of PLO messages, and if either condition is detected. Programmed to "standoff" for an arbitrary delay time. As an additional means of avoiding possible conflicts in systems using multiple control devices, the microprocessor 14 of the control device 20
0 is the appropriate PLC after receiving the relay alarm message.
It is further programmed to automatically implement a delay of any time from 0 to 400 milliseconds before transmitting the controller message to the slave module.

As in the case of the signal relay module, the control device is also equipped with a portable battery backup power source 148, so that -
The control device can continue to function even if secondary power is lost. Additionally, the controller 20 includes an internal audio frequency indicator, a piezoelectric transducer 152. The piezoelectric transducer 152 is enabled by a control signal manually applied from the 86 output port of the microprocessor 140 through the switching transistor 156.
Driven by The microprocessor 140 activates the piezoelectric transducer (internal alarm device) 152 immediately after receiving a relay alarm PLC signal or an audible intrusion signal when the controller is in instant arm mode and with a 40 second delay when in arm delay mode. is programmed to operate the piezoelectric transducer. In order to ensure an adequate sound pressure level (e.g., at least 85 dB) from the piezoelectric transducer 152, according to a preferred embodiment, a mechanical sound plate is placed at an appropriate distance from the piezoelectric transducer 152. further use. The sound waves generated by the piezoelectric transducer are reflected from the acoustic plate without phase cancellation to attenuate the sound.

Slave Modules (22-26) Next, a description will be given with regard to FIG. FIG. 13 is a circuit diagram of a lamp module 22 according to the invention. As previously mentioned, slave modules 22, 24 and 26 receive PLC command signals from controller 20 and control the operation of their respective loads accordingly. However, appliance module 24 and alarm module 26 are substantially similar in function and construction to lamp module 22, differing only in the characteristics of the particular load to be controlled. Additionally, the alarm module includes a battery backup power source so that in the event of a break-in, the audible alarm will sound even if the AC power is turned off. In contrast, lamp modules and fixture modules do not have battery backup power sources.

The lamp module 22 of the preferred embodiment generally includes a power supply 158, a 4-bit microprocessor 160, a PLC input circuit 162 that interfaces the microprocessor 160 to the AC power line, and a 4-bit microprocessor 160.
and an output circuit 164 that controls the operation of the load in response to a control signal from 60. An oscillator circuit 166, including a crystal oscillator 168, is connected to the 08C1 and 0SC2 input terminals of the microprocessor 160 to define the microprocessor's internal clock timing.

The first set of eight switches is the microprocessor's RO~
Connected to the R7 data input terminal and set to the system house code. A second set of eight switches is similarly connected to the microprocessor's RO-R7 data input terminal to set the slave module's unit code.

The PLO input circuit includes a coupling transformer connected to the AC power line. The output of coupling transformer 174 is provided to a 121 kHz bandpass filter/amplifier circuit 176 which provides the PLCIN signal to the two-power port of microprocessor 160. Output circuit 164 includes a triac 178 connected in series with the load via an AC power line to control the operation of the load. triac 1
The conduction state of 78 is determined by the microprocessor 16 whose 03 and 04 output ports are connected to the gate of the triac.
Controlled by 0. The microprocessor received P
It is programmed to decode and interpret the LC messages and generate output signals at output ports 03 and 04 to enable the triac 178 to activate the load at the appropriate time. Specifically, if the transmitted house code and unit code match the preset house code and unit code of the lamp module 22, the microprocessor 160
TRIAC 178 is enabled to operate the load in response to receiving a controller command message (FIG. 4A). Microprocessor 160 also sends an all lamp on/off controller command message (FIG. 4B).
In response to receipt of the message, if the message contains the correct house code, triac 178 is enabled/disabled, respectively. In response to receiving a controller alarm command message (Figure 4C) containing the proper house code, microprocessor 160 immediately enables triac 178 to operate the load. In response to receiving a controller countdown command message (Figure 4C) containing the proper house code, microprocessor 160 initiates a 40 second time delay before enabling triac 17B.

Finally, upon receiving a controller disarm command message (FIG. 4C) containing the proper house code, microprocessor 160 aborts the ongoing 40 second time delay and disarms the load. triac 17
Disable 8.

Additionally, the microprocessor 160 in the preferred embodiment of the lamp module 22 includes a status sense signal line 180 connected to the lamp for detecting the on/off state of a manually operable switch associated with the lamp. In particular, to maintain local manual control of the lamp, microprocessor 160 responds to a pulse generated on status sense signal line 180 when the lamp switch is closed and causes the lamp to turn on. Programmed to enable triac 178.

In addition, the status sense signal line 180 is also used to allow remote control of the lamp without the need to keep the lamp on continuously. In particular, microprocessor 160 cannot turn on the lamp unless the lamp switch is closed.

However, it is clearly undesirable to have to leave the lamp on in order to have remote control capability. Therefore, the microprocessor 160
It is programmed to detect an on-off-on toggle sequence of manual operation of the lamp switch within a predetermined short period of time and to turn off the lamp two seconds later. In this manner, the lamp can be remotely controlled via the lamp module 22 since the lamp is turned off despite the lamp switch being in the closed position. To turn on the lamp manually thereafter, simply toggle the lamp switch between off and on. LE connected to the 00 output port of the microprocessor 160
D182, when the lamp is placed in remote control state,
Operated by a microprocessor.

Further, the signal relay module 18 of the system of the present invention,
It is also important that controller 20 and alarm module 26 each include a battery backup power source to provide supplemental power to the device in the event of a loss of secondary AC power. - automatically switches to battery power when power is lost; the microprocessor of each device generates precise timing signals from internal crystal oscillator circuits and ceramic resonator oscillator circuits included in each device;
- programmed to make communication between devices over the power line asynchronous when there is no AC power; In this manner, the security system of the present invention does not suffer from defects due to the relaying of the AC power supply to the protected premises.

As can be seen from the foregoing description, one aspect of the present invention provides an improved security control system that utilizes wireless audio frequency communications and power line communications to facilitate system configuration.

Further, in accordance with another aspect of the present invention, a security control system can be provided that also provides the ability to remotely control the operation of various loads, including lamps and appliances.

According to yet another aspect of the present invention, an improved security control system is provided that is not easily defeated by an intruder and is easily disarmed after intrusion is recognized.

Although preferred embodiments of the invention have been described, it will be appreciated that variations and modifications may be made within the scope of the invention as defined by the claims.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing the various components of a security control system according to the present invention and their interrelationships in a normal installation situation; FIG. 2 is a timing diagram showing the code format of power line communication data; FIG. 3A and FIG. 3B are timing diagrams showing the message format of the relay module, FIG. 4A, and FIG.
Figures B and 4C are timing diagrams showing the format of the controller's messages; Figure 5 is a circuit diagram of the intrusion detector's transmitter module; and Figure 6 is a timing diagram showing the format of messages transmitted by the intrusion detector's transmitter module. FIG. 7 is a circuit diagram of the relay module; FIG. 8 is a cross-sectional view of the mechanically tuned audio boat in the casing of the relay module;
FIG. 9 shows the CI of the custom integrated circuit housed in the relay module shown in FIG. A more detailed circuit diagram and block diagram of the AR receiver, FIG. 10, shows the PL of the custom integrated circuit of the relay module and control device shown in FIGS. 7 and 12, respectively.
The circuit diagram and block diagram of the C transmitter part, and FIG. 11 is the PL of the custom integrated circuit of the relay module and control device shown in FIGS. 7 and 12, respectively.
FIG. 12 is a block diagram of the C receiver part, FIG. 12 is a circuit diagram of a part of the control device, and FIG. 13 is a circuit diagram of a lamp drive slave module. 10...Security control system, 12...Intrusion detector,
18... Signal relay module, 20... Control device, 22.24.26... Slave module, 40...
...Custom integrated circuit, 64...Broad band pass filter, 66...Limiter circuit, 68.72...Narrow band pass filter, 70...Custom integrated circuit, 80...Microprocessor, 140 ... Microprocessor, 142 ... Custom integrated circuit, 160 ... Microprocessor, 162 ... PLO input circuit, 164 ... Output circuit. The following margins are 2 = 匡 =; 5.

Claims (1)

Claims: 1. operatively associated with one or more entry points into the premises to be protected, detecting intrusion through each of said entry points and generating a coded audible signal in response; one or more intrusion detectors (12) electrically connected to AC power lines in the premises to be protected;
at least one located within audible range of the intrusion detector.
a signal repeater (18), said signal repeater (18) comprising an audio frequency receiver that receives said coded audio signal and separates said coded audio signal from extraneous noise in the received signal; means for applying a coded relay signal to the alternating current power line; and means for decoding the coded audible signal and transmitting the coded relay signal in response to detection of a valid coded audible signal. processor means for enabling the power line communication transmission means of the signal relay device; a control device (20) electrically connected to an AC power line in a premises to be protected; ) includes power line communications receiver means for receiving said coded relay signal and separating said coded relay signal from extraneous signals on said alternating current power line; and power line communication transmitter means for applying a coded controller signal to said alternating current power line. and processor means for decoding the coded relay signal and enabling the power line communication transmission means of the controller to transmit the coded controller signal in response to detection of a valid coded relay signal. at least one slave device (22, 24, 26) electrically connected between the AC power line and the alarm device to control the operation of the alarm device, the slave device (22, 24, 26) power line transmission receiver means for receiving said encoded controller signal and separating said encoded controller signal from extraneous signals on said AC power line; and an output for operating said alarm device. and processor means for decoding said coded controller signal and enabling said output means to operate said alarm device in response to detection of a valid coded controller signal; A security system that is installed on a campus, detects intrusion into the campus, and sends a signal to notify that an intrusion has been detected. 2. The controller (20) is in a first mode in which a first encoded controller signal is applied to the AC power line in response to receiving and detecting a valid encoded relay signal; or
a second signal in response to receiving and detecting a valid coded relay signal;
2. The security system of claim 1, wherein the security system selectively operates in one of the second modes in which a coded controller signal of: is applied to the AC power line. 3. said processor means of said slave device (22, 24, 26) immediately enabling said output means to operate said alarm device in response to receiving and detecting said first coded controller signal; 3. The security system of claim 2, further comprising enabling said output means to operate said alarm device after a predetermined delay time after receiving and detecting said second coded controller signal. 4. The processor means of the control device is configured to transmit another coded signal over the AC power line before enabling the power line communication transmission means of the control device to transmit the coded control device signal. The security system according to any one of claims 1 to 3, which determines whether or not a person is present. 5. The processor means of the control device further waits an arbitrary amount of time after determining that another coded signal is present on the AC power line before attempting to transmit the coded control device signal again. The security system described in item 4 within the scope of . 6. The processor means of the controller determines that a noise level greater than a predetermined amount is present on the AC power line before enabling the power line communication transmission means of the controller to transmit the encoded controller signal. The security system according to claim 4, further determining whether or not. 7. The processor means of the control 1 device further comprises:
6. Waiting any amount of time after determining that another coded signal or a noise level exceeding the predetermined amount is present on the AC power line before attempting to transmit the coded controller signal again. Security system as described. 8. The coded relay signal and the coded controller signal are arranged at zero crossing points of the AC power line waveform such that one complete cycle of the AC power line waveform is used to transmit each information bit of the coded signal. The security system according to any one of claims 1 to 7, comprising a predetermined carrier frequency signal that is digitally pulse code modulated. 9. The digital pulse code modulated carrier frequency signal represents a digital value of "1" when the carrier frequency pulse is generated during one half cycle of the AC power line waveform; 9. Security system according to claim 8, which represents a digital value "0" when generated during the other half cycle. 10. The processor means of the controller is configured to control the AC power line by searching for the presence or absence of the carrier frequency appearing on the AC power line during unused half-cycles of the AC power line waveform during the transmission of encoded controller signals. 10. The security system of claim 9 further determining whether another pulse code modulated carrier frequency signal is being transmitted over the signal. 11. said coded audio frequency is associated with at least one
said audio frequency receiver means of said signal repeater (18) having a wideband bandpass filter circuit, a limiter circuit connected to the output of said wideband bandpass filter circuit; and a narrow bandpass filter circuit connected to the output of the limiter circuit and having a center frequency approximately equal to said predetermined frequency.
The security system according to any one of Items 1 to 10. 12. The coded audible signal is comprised of alternating predetermined first and second frequency tones, with a predetermined spacing between successive alternating tones. The security system according to any one of the above. 13. The constant false alarm rate receiver is connected to the output of the limiter circuit and has first and second narrow band passes having center frequencies approximately equal to the frequencies of the first and second predetermined frequency tones, respectively. A security system as claimed in claim 12 when dependent on claim 11, including a filter circuit. 14. The audio frequency receiver means includes decoding means for decoding the coded audio signal, the decoding means detecting the presence of the first predetermined frequency tone and simultaneous the second predetermined frequency tone. , followed by the presence of said second predetermined frequency tone and the simultaneous absence of said first predetermined frequency tone, in corresponding alternating order. A security system according to claim 12 or 13. 15. The first and second predetermined frequency tones are approximately 6k.
A security system according to any one of claims 12 to 14 having frequencies of Hz and 7.3 kHz, respectively. 16. Intrusion detection means (12) for detecting an intrusion into the premises to be protected and generating a coded signal in response; receiving the coded signal from the intrusion detection means (12) and responding thereto; controller means (20) for generating a first alarm signal in response to receiving a coded signal from the intrusion detection means (12); or a second mode in which a second alarm signal is generated in response to receipt of a coded signal from said intrusion detection means (12). slave means (22, 24, 26) arranged remotely from said control device means (20) and connected to an alarm device to control the operation of said alarm device; Means (22, 24, 26) are adapted to control said controller means (2).
0) immediately actuating said alarm device in response to receipt of said first alarm signal from said controller means (2);
implementing a predetermined time delay before activating the alarm device in response to receiving said second alarm signal from 0); , a security system that notifies with a signal that an intrusion has been detected. 17. said controller means (20) further generating a third signal, said slave means (22, 24, 26) responsive to receiving said third signal from said controller means (20); 17. The security system of claim 16, wherein execution of the predetermined time delay is aborted and operation of the alarm device is prevented. 18. The control device means (20) includes input means for allowing an operator to input information into the control device means (20), and the control device means is configured such that a secret code set by the operator is transmitted to the input means. 18. A security system as claimed in claim 17, further comprising generating said third signal solely in response to input to said controller means (20) via said third signal. 19. Claim 18, wherein said controller means (20) selectively operates in either said first mode or said second mode in response to a predetermined input via said input means. Security system as described in section. 20. The control device means (20) further comprises power line communication transmission means electrically connected to an AC power line in the premises to be protected and applying the alarm signal to the AC power line. The security system according to any one of Item 19. 21. The slave means (22', 24, 26) are electrically connected between the AC power line and the alarm device;
21. A security system as claimed in claim 20, further comprising power line communication receiver means for receiving said alarm signal transmitted over said AC power line from said controller means (20). 22. intrusion detection means (12) for detecting an intrusion into the premises to be protected and in response generating a coded audible signal having at least one predetermined frequency associated therewith; receiving said coded audible signal; an apparatus (18, 20) for decoding the encoded audible signal and generating an alarm signal in response thereto, the apparatus (18, 20) comprising a false alarm rate receiver means, said constant false alarm rate receiver means comprising: a wideband bandpass filter circuit (64); said wideband bandpass filter circuit (64);
); and a narrow bandpass filter circuit (68, 72) connected to the output of the limiter circuit (66) and having a center frequency approximately equal to the predetermined frequency. A security system that is installed in a campus and that detects intrusion into the campus and notifies by signal that an intrusion event has been detected. 23. The security system of claim 22, wherein the coded audible signal is comprised of alternating predetermined first and second frequency tones, with a predetermined interval between successive alternating tones. . 24. said predetermined interval is such that echoes resulting from the transmission of said first or second frequency tones are sufficiently attenuated by the time said second or first frequency tones are transmitted, respectively; 24. The security system of claim 23, wherein the security system is of sufficient duration such that echo signals are rejected by the constant false alarm rate receiver when two or first frequency tones are received, respectively. 25. The constant false alarm rate receiver is connected to the output of the limiter circuit (66) and has first (68) and 2nd (72)
Claim 23 includes a narrow band pass filter circuit of
or the security system described in paragraph 24. 26, said apparatus (18, 20) further comprising decoding means for decoding said coded audio signal, said decoding means comprising:
the presence of the first predetermined frequency tone and the simultaneous absence of the second predetermined frequency tone, followed by the presence of the second predetermined frequency tone and the simultaneous absence of the first predetermined frequency tone; 26. The security system of claim 25 comprising logic circuit means for detecting the absence of frequency tones in a corresponding alternating order. 27. The security system of claim 26, wherein the frequencies of the first and second predetermined frequency tones are approximately equal to 6 kHz and 7.3 kHz, respectively. 28. The device (18, 20) includes a signal relay device (18) electrically connected to an AC power line in the premises to be protected, and the signal relay device (18) transmits the alarm to the AC power line. A security system according to any one of claims 22 to 27, including power line communication transmission means for applying a signal. 29. A control device (20) electrically connected to an AC power line in a premises to be protected, wherein the control device (20) is a power line communication receiver that receives the alarm signal from the signal relay device (18). power line communication transmission means for applying a controller signal to the alternating current power line; and processor means for enabling the power line communication transmission means to transmit the controller signal in response to detection of the alarm signal. at least one electrically connected between an AC power line and an alarm device to control the operation of the alarm device;
one slave device (22, 24, 26), said slave device (22, 24, 26) comprising power line communication receiver means for receiving said controller signal and output means for operating said alarm device. 29. The security system of claim 28, further comprising: processor means for enabling said output means to operate said alarm device in response to detection of said controller signal. No. 30, wherein said processor means of said slave device (22, 24, 26), upon detecting said controller signal, implements a predetermined time delay before enabling said output means to operate said alarm device. Claim 2
Security system described in Section 9. 31. detection means (12) for detecting an intrusion into the premises to be protected and generating an intrusion signal in response to the detection of said intrusion;
a signal relay device (18) electrically connected to an AC power line in a premises to be protected and applying a coded relay signal to the AC power line in response to receiving the intrusion signal; a controller (20) electrically connected between the AC power line and an alarm device, the controller (20) applying a coded controller signal to the AC power line in response to receiving the coded relay signal; a slave device (22, 24, 26) for operating the alarm device in response to receiving a coded controller signal; the coded relay signal and the coded controller signal are digitally pulse code modulated at a predetermined carrier frequency; one complete cycle of the AC power line waveform is used to transmit each information bit of the encoded signal, and the digital value "1" is generated during one half cycle of the AC power line waveform. The digital value "0" corresponds to a carrier frequency pulse generated during the other half cycle of the AC power line waveform; the signal relay device (18) and the control device (20 ) for determining whether another coded signal is being transmitted via the AC power line before and during the transmission of each of the coded relay signal and the coded control device signal; and processor means for delaying or aborting said respective transmissions if additional information is detected on the AC power line. 32, the signal relay device (18) and the control device (20
) processor means for controlling the predetermined carrier frequency of the AC power line both before transmission of the respective coded signal and during unused half-cycles of the AC power line waveform during the transmission of the respective coded signal. 32. The security system according to claim 31, which searches for presence or absence. 33, the signal relay device (18) and the control device (20
31. The processor means of 31.) further waits an arbitrary amount of time after determining that additional information is present on the AC power line before attempting to transmit the respective coded signal again. or the security system described in paragraph 32. 34, the signal relay device (18) and the control device (20
) processor means for determining whether a noise level in excess of a predetermined amount is present on said AC power line before and during transmission of said respective coded signal, and determining whether an excessive noise level is detected on said AC power line; 34. A security system according to any one of claims 31 to 33, wherein said respective transmissions are delayed or aborted in the event of an incident. 35, the signal relay device (18) and the control device (20
35. The processor means of claim 34 further comprises waiting said optional amount of time after detecting an excessive noise level on said AC power line before attempting to transmit said respective coded signal again. security system. 36, the signal relay device (18) and the control device (20
) processor means for determining the presence of excessive noise levels on the AC power line both before transmission of said respective coded signal and during unused half-cycles of the AC power line waveform during transmission of said respective coded signal; A security system according to claim 34 or 35.