JPS61285738A - Package for microwave integrated circuit and connecting method thereof - Google Patents

Package for microwave integrated circuit and connecting method thereof

Info

Publication number
JPS61285738A
JPS61285738A JP12618885A JP12618885A JPS61285738A JP S61285738 A JPS61285738 A JP S61285738A JP 12618885 A JP12618885 A JP 12618885A JP 12618885 A JP12618885 A JP 12618885A JP S61285738 A JPS61285738 A JP S61285738A
Authority
JP
Japan
Prior art keywords
input
ceramic substrate
integrated circuit
envelope
microwave integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12618885A
Other languages
Japanese (ja)
Inventor
Naotaka Tomita
富田 直孝
Shigekazu Hori
堀 重和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP12618885A priority Critical patent/JPS61285738A/en
Publication of JPS61285738A publication Critical patent/JPS61285738A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Microwave Amplifiers (AREA)

Abstract

PURPOSE:To make grounding inductance small, by directly connecting the grounding conductor of a ceramic substrate, which is attached to a monolithic microwave integrated circuit in a package, to said package. CONSTITUTION:A plurality of input and output terminals 2 are provided on a ceramic substrate 1. A grounding conductor 3 is provided on the entire surface of the ceramic substrate 1 with a specified interval being provided with the input and output terminals 2. High frequency input and output terminal parts and a bias terminal parts of an MMIC 6, which is attached on the grounding conductor 3, are connected to the input and output terminals 2 with bonding wires 7. The grounding electrode of the MMIC 6 is directly connected to the grounding conductor 3. A ceramic side wall 4 is provided at the peripheral part on the ceramic substrate 1. A metal cap 5 is provided. The input and output terminals 2 are connected to an outer connecting terminals 10 through metal films 8. Meanwhile, the grounding conductor 3 is connected to the metal cap 5 through a grounding metal film 9. Thus, grounding inductance is made small, and the deterioration of the microwave characteristics can be prevented.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はマイクロ波帯周波数で用いられる半導体装置を
収容するマイクロ波用集積回路の外囲器及びその接続方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an envelope for a microwave integrated circuit that houses a semiconductor device used in a microwave band frequency, and a method for connecting the same.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

マイクロ波帯で用いられる半導体装置として、G a 
A: s等の半絶赦性半導体基板上に整合回路、バイア
ス回路およびFET等の半導体素子を一体化する七ツク
リンク・マイクロ波集積回路(以下MMICと称す)は
小形・軽量化・量産時の低価格化の点で注目されている
。このMMICは信頼性の点から気密封じの外囲器に組
込む必要があシ、その外囲器の一例を第5図に示す。第
5図ta)は平面図、第5図(b)は第5図(→のx−
x’における断面図、第5図(C)は側面図。
As a semiconductor device used in the microwave band, Ga
A: The seven-link microwave integrated circuit (hereinafter referred to as MMIC), which integrates semiconductor elements such as matching circuits, bias circuits, and FETs on a semi-impervious semiconductor substrate such as S, is compact, lightweight, and easy to mass produce. It is attracting attention because of its low price. From the viewpoint of reliability, this MMIC needs to be assembled in an airtight enclosure, and an example of such an enclosure is shown in FIG. Fig. 5 ta) is a plan view, Fig. 5 (b) is a plan view of Fig. 5 (→
A cross-sectional view at x', and FIG. 5(C) is a side view.

第5図(d)は裏面図である。セラピンク基板1の表面
には複数個の入出力端子2を設けこれらの入出力端子2
に所定の間隔を設けた接地導体3がセラミック基板lの
表面全域に設置されている。又セラミック基板l上の細
辺部にはその中心部を囲むようにセラミック基板lの外
形と同様な形状であるセラミックの側壁4を設けている
。さらにこのセラミックの側壁4の上部を閉じる蓋5が
設けられている。又接地導体3上にはMMIC6が取り
付けられ、このMMIC6の高周波入出力端子部及びバ
イアス端子部はそれぞれボンディングワイヤ7によシ入
出力端子2に接続されている。−万MM I C6の接
地電極は、MMIC6内のスルーホール等により接地4
体3に直接接続されている。ここで外囲器の各々の入出
力端子2及び接地導体3はそれぞれセラミック基板1の
側面に設けられた金gg8及び接地用金楓膜9を介して
、セラミック基板lの裏面に設けられた外部接続端子1
o及び外部接地端子11に接続されている。
FIG. 5(d) is a back view. A plurality of input/output terminals 2 are provided on the surface of the Cerapink board 1, and these input/output terminals 2
A ground conductor 3 is provided over the entire surface of the ceramic substrate 1 with a predetermined interval between the ground conductors 3 and 3 . Further, a ceramic side wall 4 having a shape similar to the outer shape of the ceramic substrate 1 is provided on a narrow side portion of the ceramic substrate 1 so as to surround the center thereof. Furthermore, a lid 5 is provided to close the top of the ceramic side wall 4. Further, an MMIC 6 is mounted on the ground conductor 3, and a high frequency input/output terminal portion and a bias terminal portion of this MMIC 6 are connected to the input/output terminal 2 through bonding wires 7, respectively. - The ground electrode of MMIC6 is grounded by a through hole in MMIC6, etc.
directly connected to body 3. Here, each input/output terminal 2 and ground conductor 3 of the envelope are connected to an external terminal provided on the back surface of the ceramic substrate l via the gold gg8 provided on the side surface of the ceramic substrate 1 and the grounding gold maple film 9, respectively. Connection terminal 1
o and external ground terminal 11.

ところでこの外囲器をマイクロストリップ線路を形成し
た誘電体基板を介して相互に接続する場合の構造を第6
図に示す。第6図ta)は平面図、第6図(b)及び第
6図(C)はそれぞれ第6図(a)のx−x’及びY−
Y’における断面図である。
By the way, the structure in which these envelopes are connected to each other via a dielectric substrate on which a microstrip line is formed is shown in the sixth section.
As shown in the figure. Figure 6 (ta) is a plan view, Figure 6 (b) and Figure 6 (C) are respectively xx' and Y- of Figure 6 (a).
It is a sectional view at Y'.

すなわち外囲器(A、B)は金属性キャリアプレート2
1上に設けられた誘電体基板22に実装され、外囲器(
A、B)の外部接続端子10は誘電体基板22上に形成
されたマイクロストリップ線路の中心導体23に接続さ
れている。
That is, the envelopes (A, B) are metal carrier plates 2
It is mounted on a dielectric substrate 22 provided on the top of the envelope (
The external connection terminals 10 of A and B) are connected to a center conductor 23 of a microstrip line formed on a dielectric substrate 22.

又、外囲器の外部接地端子11は誘電体基板22上に形
成された表面接地導体24に接続され、スルーホール2
5を介して誘電体基板22裏面の裏面接地導体26に接
続されている。
Further, the external ground terminal 11 of the envelope is connected to a surface ground conductor 24 formed on a dielectric substrate 22, and is connected to a through hole 2.
5 to the back surface ground conductor 26 on the back surface of the dielectric substrate 22.

しかしながら第5図、第6図の構造では外囲器(A、B
)内の接地導体3は外囲器(A、B)の側壁の接地用金
楓膜9.外部接地端子11゜及びIi!電体基板22の
スルーホール25を介しテ接地すレるため、接地インダ
クタンスカ大キくなって外囲器(A、B)に収納された
MMIC6の特性が悪くなるという欠点があった。
However, in the structures shown in Figures 5 and 6, the envelopes (A, B
) The grounding conductor 3 is connected to the grounding gold maple film 9 on the side wall of the envelope (A, B). External ground terminal 11° and Ii! Since it is grounded through the through hole 25 of the electric board 22, the grounding inductance becomes large and the characteristics of the MMIC 6 housed in the envelope (A, B) deteriorate.

又2個以上の外囲器を縦続接続する場合、外囲器の股間
にはマイクロストリング線路を形成した誘電体基板を介
して接続する必要があるので、寸法が大きくなシかつコ
ストが上昇するという欠点があった。
Furthermore, when two or more envelopes are connected in series, it is necessary to connect them through a dielectric substrate on which a microstring line is formed between the legs of the envelopes, which increases the size and cost. There was a drawback.

〔発明の目的〕[Purpose of the invention]

本発明は上記の欠点を除去するものであり、マイクCI
波集積回路を組め込む外囲器において、接地インダクタ
ンスを小さくシ、マイクロ波特性を低下させない外囲器
を提供する。又外囲器とマイクロストリップ線路を形成
する場合、接地インダクタンスの小さいJi[77法を
提供する◇又複数の外囲器を縦続接続する場合、接地イ
ンダクタンスが小さく、マイクロ波損失の少ない接続力
法を提供する。
The present invention eliminates the above-mentioned drawbacks and provides microphone CI
To provide an envelope in which a microwave integrated circuit is incorporated, in which the grounding inductance is small and the microwave characteristics are not deteriorated. In addition, when forming an envelope and a microstrip line, the Ji [77 method with low grounding inductance is provided. ◇ Also, when connecting multiple envelopes in cascade, the connection force method with low grounding inductance and low microwave loss is provided. I will provide a.

〔発明の概要〕[Summary of the invention]

上記目的を達成するために本発明においては。 In order to achieve the above object, the present invention provides.

外囲器内のMMICの取り付けられたセラミック基板の
接地導体をこの外囲器に直接接続することにより、接地
インダクタンスが小さい外囲器を提供することができる
。又、この外囲器を蓋を下にして金属性午ヤリアブレー
トに直接マクントシ、さらにマイクロストリップ線路を
有した誘電体基板をその接地部を下罠して外囲器に隣接
させ、外囲器の接続端子とマイクロストリップ線路の中
心導体を接続続くよシ接続することによって接地インダ
クタンスの少ないマイクロストリップ線路と外囲器との
接続方法を提供することができる◇又、複数の外囲器を
それぞれの蓋を下にしてそれぞれ隣接してマウントし、
さらに複数の外囲器の隣接した接続端子をそれぞれ接続
線により接続することによって接地インダクタンスが少
なくマイクロ波損失の少ない複数の外囲器を相互に接続
する接続方法を提供することができる。
By directly connecting the ground conductor of the ceramic substrate to which the MMIC is attached within the envelope to this envelope, it is possible to provide an envelope with low ground inductance. In addition, place this envelope directly on the metal plate with the lid facing down, and then attach a dielectric substrate with a microstrip line with its grounding part down and adjacent to the envelope. By continuously connecting the connecting terminal and the center conductor of the microstrip line, it is possible to provide a method of connecting the microstrip line and the envelope with low grounding inductance. Mount each side adjacent to each other with the lids down;
Furthermore, by connecting adjacent connection terminals of a plurality of envelopes with respective connection lines, it is possible to provide a connection method for interconnecting a plurality of envelopes with low ground inductance and low microwave loss.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一つの実施例を図面を参照して説明する
Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の外囲器の構造を示しておシ、at図(
a)は平面図、第1図(b)はx−x’ Icおける断
面図%第1図(C)は側面図、第1図(d)は裏画図で
ある0セラミツク基収゛lの表面・には複数個の入出力
端子2を設けこれらの入出力端子2に所定の間隔を設け
た接地導体3がセラミック基板lの表面全域に設置され
ている◎なお各々の入出力端子2と接地導体3との間に
所定の間隔を設けることで、コグレーナ線路を形成して
いる。又接地導体3上にはMMIC6が取り付けられ、
このMMIC6の・高周波入出力端子部及びバイアス端
子部はそれぞれボンディングワイヤ7によシ入出力端子
2に接続されている。−万MMIC6の接地電極は、M
MIC6内のスルーホール等によシ接地導体3に直接接
続されている。
Figure 1 shows the structure of the envelope of the present invention.
a) is a plan view, FIG. 1(b) is a cross-sectional view along x-x'Ic, % FIG. 1(C) is a side view, and FIG. 1(d) is a back view. A plurality of input/output terminals 2 are provided on the surface, and a grounding conductor 3 with predetermined spacing between these input/output terminals 2 is installed over the entire surface of the ceramic substrate ◎In addition, each input/output terminal 2 and By providing a predetermined distance between the ground conductor 3 and the ground conductor 3, a cograin line is formed. Also, an MMIC 6 is installed on the ground conductor 3,
A high frequency input/output terminal section and a bias terminal section of this MMIC 6 are connected to the input/output terminal 2 through bonding wires 7, respectively. - The ground electrode of MMIC6 is M
It is directly connected to the ground conductor 3 through a through hole or the like in the MIC 6.

又、セラミック基板l上の周辺部にはその中心部を囲む
ようにセラミック基板lの外形と同様な形状であるセラ
ミックの側壁4を設け、さらにこのセラミックの11壁
4の上部を閉じる金属性の蓋5が設けられている。ここ
で外囲器の各々の入出力端子2は側壁4に設けられ−た
金属膜8を介してセラミック基板1の裏面に設けられた
外部接続端子lOに接続され、一方接地導体3は側壁4
に設けられた接地用金属膜9を介して金属性の蓋5に接
続している。
Further, a ceramic side wall 4 having a shape similar to the outer shape of the ceramic substrate 1 is provided at the peripheral portion of the ceramic substrate 1 so as to surround the center thereof, and a metallic side wall 4 is provided to close the upper part of the ceramic 11 wall 4. A lid 5 is provided. Here, each input/output terminal 2 of the envelope is connected to an external connection terminal lO provided on the back surface of the ceramic substrate 1 via a metal film 8 provided on the side wall 4, while a ground conductor 3 is connected to the side wall 4.
It is connected to the metal lid 5 via a grounding metal film 9 provided on the ground.

次に第2図に本発明の外囲器をマイクロストリップ線路
を形成した誘電体基板22を介して相互に接続する構造
を示す。第2図(1)は平面図。
Next, FIG. 2 shows a structure in which the envelopes of the present invention are interconnected via a dielectric substrate 22 on which a microstrip line is formed. Figure 2 (1) is a plan view.

第2図(b)はx−x’の断面図である。第2図に示す
ように外囲器(A、B)は誘電体基板22を介し、金属
性の蓋5を下にして直接金属性中ヤリアゲレート21に
マウントされる。又外部接続端子lOは、誘電体基板2
2上く形成されたマイクロストリップ線路の中心導体2
3に金属箔27等の接続線で接続される。
FIG. 2(b) is a sectional view taken along line xx'. As shown in FIG. 2, the envelopes (A, B) are directly mounted on a metallic medium gelatin plate 21 via a dielectric substrate 22 with the metallic lid 5 facing down. In addition, the external connection terminal IO is connected to the dielectric substrate 2.
2 Center conductor 2 of the microstrip line formed above
3 with a connecting wire such as a metal foil 27.

以上の構成の外囲器(A、B)を相互に接続し九場合に
は、外囲器(A、B)内の各々の接地導体3は接地用金
属膜9及び金輌性の蓋5を介して直接接地されるので、
従来に比べて接地インダクタンスを大幅に減少させるこ
とができる。したがって外囲器(A、B)内の各々のM
MIC6の性能の低下を十分少なくすることができる。
When the enclosures (A, B) having the above configuration are connected to each other, each grounding conductor 3 in the enclosure (A, B) is connected to the grounding metal film 9 and the metal cover 5. Since it is directly grounded through
Grounding inductance can be significantly reduced compared to conventional methods. Therefore, each M in the envelope (A, B)
Deterioration in the performance of MIC6 can be sufficiently reduced.

第3図は本発明の外囲器(A、B)を誘電体基板を介さ
ないで縦続接続した場合の構造を示しており、第3図(
a)は上面図、第3図(b)は第3図(a)のX−X’
における断面図である。すなわち各々の外囲器(A、B
)は第2図と同様に外囲器(A、B)の蓋5を下にして
直接キャリアプレート21に隣接してマクントされる0
−号外囲器(A、B)の各々の外部接続端子10は互い
に対向している部分を金属箔27等で各々接続される。
Figure 3 shows a structure in which the envelopes (A, B) of the present invention are connected in series without intervening a dielectric substrate.
a) is a top view, and FIG. 3(b) is a view taken along line XX' in FIG. 3(a).
FIG. That is, each envelope (A, B
) is placed directly adjacent to the carrier plate 21 with the lid 5 of the envelope (A, B) facing down, as in FIG.
The mutually opposing portions of the external connection terminals 10 of each of the external enclosures (A, B) are connected with metal foil 27 or the like.

以上の第3図の構造では、外囲器(A、B)内の各々の
接地導体3は接地用金属膜9及び蓋5を介して直接接地
されるので上記実施例と同様な効果が生じる。又、外囲
器(A、B)の股間にマイクロストリップ線路23を介
していないので、マイクロ波損失を減少させるとともに
、回路の小形・軽量化及び低価格化が可能となる0なお
第4図は外囲器(A、B)を相互接続した接続部を示す
ものであシ、外囲器(A、B)を直接接続する場合、接
続部では不連続によるインピーダンス不整合が生ずるこ
とがあシ、この場合外部接続端子10の周辺部に容量を
もった島状の電極12を設けておき、この電極12と外
部接続端子lOとの間を接続線13等により接続するこ
とで接続部のインピーダンス不整合を小さくすることが
できる。
In the above structure shown in FIG. 3, each of the ground conductors 3 in the envelopes (A, B) is directly grounded via the grounding metal film 9 and the lid 5, so that the same effect as in the above embodiment is produced. . In addition, since the microstrip line 23 is not inserted between the legs of the envelopes (A, B), microwave loss can be reduced, and the circuit can be made smaller, lighter, and less expensive. indicates a joint where the envelopes (A, B) are interconnected; if the envelopes (A, B) are directly connected, impedance mismatch may occur at the joint due to discontinuity. In this case, an island-shaped electrode 12 with a capacitance is provided around the external connection terminal 10, and a connection line 13 or the like is used to connect between this electrode 12 and the external connection terminal 10. Impedance mismatch can be reduced.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、マイクロ波集積回路
を組み込む外囲器罠おいて、マイクロ波集積回路の接地
部を外囲器の蓋に接続することで接地インダクタンスを
小さくできるマイクロ波集積回路用外囲器を提供するこ
とができる。又マイクロ波集積回路用外囲器とマイクロ
ストリップ線路を接続する場合、外囲器の蓋を下にして
直接キャリアプレートにマクントすることによって接続
するので、接地インダクタンスの小さなマイクロ波集積
回路用外囲器の接続方法を提供することができる。又複
数のマイクロ波集積回路用外囲器を相互に接続する場合
、それぞれの外囲器の蓋を下にして直接キャリアプレー
トにマワントし、さらKそれぞれの外部接続端子を接続
線によって接続するので、接地インダクタンスが小さく
マイクロ波損失の少ないマイクロ波集積回路用外囲器の
接続方法を提供することができる。
As described above, according to the present invention, in an enclosure trap incorporating a microwave integrated circuit, the grounding inductance of the microwave integrated circuit can be reduced by connecting the grounding part of the microwave integrated circuit to the lid of the enclosure. A circuit envelope can be provided. In addition, when connecting the microwave integrated circuit envelope and the microstrip line, the lid of the envelope is facing down and the connection is made directly to the carrier plate, so the microwave integrated circuit envelope has low grounding inductance. It is possible to provide a method for connecting devices. In addition, when connecting multiple microwave integrated circuit envelopes to each other, each envelope is placed directly onto the carrier plate with its lid facing down, and the external connection terminals of each are connected using connecting wires. , it is possible to provide a method for connecting an envelope for a microwave integrated circuit with low grounding inductance and low microwave loss.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ta)は本発明による外囲器にマイクロ波集積回
路を組込んだ平面図、第1図(b)は第1図(a)にお
けるx−x’断面図、第1図(e)は第1図ta)の側
面図、第1図(d)は第1図(alの裏面図、第2図+
8)は本発明による接続方法によって第1図の外囲器を
マイクロストリップ線路に接続した平面図、第2図(b
)は第2図(a) Kおけるx−x’断面図、第3図(
a)は本発明による接続方法によっで第1図の外囲器を
複数個相互に接続した平面図、第3図(b)は第3図t
a)におけるx−x’断面図、第4図は島状の電極をも
った外囲器を相互に接続した接続部の一部を示す平面図
、第5図(a)は従来の外囲器にマイクロ波集積回路を
組込んだ平面図、第5図(b)は第5図(a)における
X−X /断面図、第5図(C)は第5図(a)の側面
図、第5図(d)は箒5図(a)の裏面図、第6図+8
)は第5図の外囲器とマイクロストリップ線路を接続し
た平面図、第6図(b)及び第6図(C)は第6図(a
)のx−x’及びY +、 Y ’断面図である。 l・・・セラミック基板、2・・・入出力端子、3・・
・接地導体、4・・・側壁、5・・・蓋、7・・・ボン
ディングワイヤ、8・・・金属膜、9・・・接地用金属
膜、10’・・・外部接続端子、21・・・キャリアプ
レート、22・・・誘電体基板、23・・・中心導体、
27・・・接続線。 代理人 弁理士  則 近 憲 佑 (ほか1名) (c>(b) 光J図
FIG. 1(a) is a plan view of a microwave integrated circuit incorporated into an envelope according to the present invention, FIG. 1(b) is a sectional view taken along line xx' in FIG. 1(a), and FIG. ) is a side view of Fig. 1 ta), Fig. 1 (d) is a back view of Fig. 1 (al), Fig. 2 +
8) is a plan view of the envelope shown in FIG. 1 connected to the microstrip line by the connection method according to the present invention, and FIG.
) are Fig. 2(a) x-x' sectional view at K, Fig. 3(
a) is a plan view of a plurality of envelopes shown in FIG. 1 connected to each other by the connection method according to the present invention, and FIG.
xx' sectional view in a), FIG. 4 is a plan view showing a part of the connecting part where envelopes with island-like electrodes are interconnected, and FIG. 5(a) is a conventional envelope. 5(b) is a cross-sectional view taken along line X-X in FIG. 5(a), and FIG. 5(C) is a side view of FIG. 5(a). , Fig. 5(d) is the back view of the broom Fig. 5(a), Fig. 6+8
) is a plan view connecting the envelope and microstrip line in Figure 5, and Figures 6(b) and 6(C) are Figure 6(a).
). l...ceramic board, 2...input/output terminal, 3...
- Grounding conductor, 4... Side wall, 5... Lid, 7... Bonding wire, 8... Metal film, 9... Metal film for grounding, 10'... External connection terminal, 21. ...Carrier plate, 22...Dielectric substrate, 23...Center conductor,
27... Connection line. Agent Patent attorney Kensuke Chika (and 1 other person) (c>(b) Hikari J-zu

Claims (3)

【特許請求の範囲】[Claims] (1)セラミック基板と、このセラミック基板の表面上
の周辺部に設けられた少なくとも1個の入出力端子と、
この入出力端子の周囲に所定の間隔を有して前記セラミ
ック基板の表面上に設けられたマイクロ波集積回路を取
り付ける接地導体と、この接地導体に取り付けられたマ
イクロ波集積回路の入出力部と前記入出力端子を接続す
る接続体と、前記入出力端子の位置に対応する前記セラ
ミック基板の裏面上の位置に設けられる接続端子と、前
記セラミック基板の表面上の周辺部に前記セラミック基
板の中心部を囲むように設けられた側壁部と、この側壁
部の上部を閉じる金属性の蓋と、前記入出力端子と前記
接続端子及び前記接地導体と前記蓋とをそれぞれ接続す
る導体とを具備するマイクロ波集積回路用外囲器。
(1) a ceramic substrate; at least one input/output terminal provided in the peripheral portion on the surface of the ceramic substrate;
A grounding conductor to which the microwave integrated circuit is attached is provided on the surface of the ceramic substrate at a predetermined distance around the input/output terminal, and an input/output section of the microwave integrated circuit attached to the grounding conductor. A connection body for connecting the input/output terminals, a connection terminal provided at a position on the back surface of the ceramic substrate corresponding to the position of the input/output terminal, and a connection terminal provided at a peripheral portion on the surface of the ceramic substrate at the center of the ceramic substrate. a metal lid that closes an upper part of the side wall, and a conductor that connects the input/output terminal and the connection terminal, and the ground conductor and the lid, respectively. Envelope for microwave integrated circuits.
(2)セラミック基板と、このセラミック基板の表面上
の周辺部に設けられた少なくとも1個の入出力端子と、
この入出力端子の周囲に所定の間隔を有して前記セラミ
ック基板の表面上に設けられたマイクロ波集積回路を取
り付ける接地導体と、この接地導体に取り付けられたマ
イクロ波集積回路の入出力部と前記入出力端子を接続す
る接続体と、前記入出力端子の位置に対応する前記セラ
ミック基板の裏面上の位置に設けられる接続端子と、前
記セラミック基板の表面上の周辺部に前記セラミック基
板の中心部を囲むように設けられた側壁部と、この側壁
部の上部を閉じる金属性の蓋と、前記入出力端子と前記
接続端子及び前記接地導体と前記蓋とをそれぞれ接線す
る導体とを具備するマイクロ波集積回路用外囲器を金属
性キャリアプレート上に前記蓋を下にして装着し、前記
外囲器に隣接するようにマイクロストリップ線路を形成
した誘電体基板を前記キャリアプレート上にその接地面
を下にして、前記外囲器に隣接するように装着し、前記
外囲器の接続端子と前記マイクロストリップ線路の中心
導体とを接続線により接続し、前記外囲器と前記マイク
ロストリップ線路を接続することを特徴とするマイクロ
波集積回路用外囲器の接続方法。
(2) a ceramic substrate; at least one input/output terminal provided on the peripheral portion of the surface of the ceramic substrate;
A grounding conductor to which the microwave integrated circuit is attached is provided on the surface of the ceramic substrate at a predetermined distance around the input/output terminal, and an input/output section of the microwave integrated circuit attached to the grounding conductor. A connection body for connecting the input/output terminals, a connection terminal provided at a position on the back surface of the ceramic substrate corresponding to the position of the input/output terminal, and a connection terminal provided at a peripheral portion on the surface of the ceramic substrate at the center of the ceramic substrate. a metal lid that closes an upper part of the side wall, and a conductor that connects the input/output terminal, the connection terminal, the ground conductor, and the lid, respectively. A microwave integrated circuit envelope is mounted on a metal carrier plate with the lid facing down, and a dielectric substrate on which a microstrip line is formed adjacent to the envelope is placed on the carrier plate and connected thereto. It is mounted adjacent to the envelope with the ground facing down, and the connection terminal of the envelope and the center conductor of the microstrip line are connected by a connecting wire, and the envelope and the microstrip line are connected to each other by a connecting wire. A method for connecting an envelope for a microwave integrated circuit, the method comprising: connecting an envelope for a microwave integrated circuit.
(3)セラミック基板と、このセラミック基板の表面上
の周辺部に設けられた少なくとも1個の入出力端子と、
この入出力端子の周囲に所定の間隔を有して前記セラミ
ック基板の表面上に設けられたマイクロ波集積回路を取
り付ける接地導体と、この接地導体に取り付けられたマ
イクロ波集積回路の入出力部と前記入出力端子を接続す
る接続体と、前記入出力端子の位置に対応する前記セラ
ミック基板の裏面上の位置に設けられる接続端子と、前
記セラミック基板の表面上の周辺部に前記セラミック基
板の中心部を囲むように設けられた側壁部と、この側壁
部の上部を閉じる金属性の蓋と、前記入出力端子と前記
接続端子及び前記接地導体と前記蓋とをそれぞれ接続す
る導体とを具備する複数のマイクロ波集積回路用外囲器
を金属性キャリアプレート上に前記蓋を下にしてそれぞ
れ隣接して装着し、前記複数の外囲器の隣接した前記接
続端子をそれぞれ接続線により接続し、前記複数の外囲
器を接続することを特徴とするマイクロ波集積回路用外
囲器の接続方法。
(3) a ceramic substrate, at least one input/output terminal provided on the peripheral portion of the surface of the ceramic substrate;
A grounding conductor to which the microwave integrated circuit is attached is provided on the surface of the ceramic substrate at a predetermined distance around the input/output terminal, and an input/output section of the microwave integrated circuit attached to the grounding conductor. A connection body for connecting the input/output terminals, a connection terminal provided at a position on the back surface of the ceramic substrate corresponding to the position of the input/output terminal, and a connection terminal provided at a peripheral portion on the surface of the ceramic substrate at the center of the ceramic substrate. a metal lid that closes an upper part of the side wall, and a conductor that connects the input/output terminal and the connection terminal, and the ground conductor and the lid, respectively. mounting a plurality of microwave integrated circuit enclosures adjacent to each other on a metal carrier plate with the lid facing down, and connecting the adjacent connection terminals of the plurality of enclosures with connection wires, respectively; A method for connecting an envelope for a microwave integrated circuit, comprising connecting the plurality of envelopes.
JP12618885A 1985-06-12 1985-06-12 Package for microwave integrated circuit and connecting method thereof Pending JPS61285738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12618885A JPS61285738A (en) 1985-06-12 1985-06-12 Package for microwave integrated circuit and connecting method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12618885A JPS61285738A (en) 1985-06-12 1985-06-12 Package for microwave integrated circuit and connecting method thereof

Publications (1)

Publication Number Publication Date
JPS61285738A true JPS61285738A (en) 1986-12-16

Family

ID=14928870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12618885A Pending JPS61285738A (en) 1985-06-12 1985-06-12 Package for microwave integrated circuit and connecting method thereof

Country Status (1)

Country Link
JP (1) JPS61285738A (en)

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