JPS61283955A - Task control system for close connection type multi-processor - Google Patents

Abstract

PURPOSE:To suppress the memory access conflicts and to avoid the system breakdown due to a trouble of an arithmetic processor or a main storage, by dividing the main storage to each processor and securing the task control proper to each processor. CONSTITUTION:When a task A working on a control processor CP5 executes a procedure call instruction ProC, a communication means is started and the ProC communication is informed to an arithmetic processor OP6. Then the task A is held and a task B having the next lower priority is started. While the OP6 received the instruction ProC starts a task A' and receives the ProC communication from the task B working on the CP5 to register the task B' to an execution task queue. The instruction ProC on the CP5 is set under a holding state with execution of the instruction ProC. Then a task C having the next lower priority is started. When the task A' on the OP6 executes the instruction ProC, the communication means is started and the ProC communication is informed to the CP5. Then the task A' is held and the task B' is extracted out of the execution task queue and started.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides an arithmetic processor that performs high-speed scientific operations;
This invention relates to task control in a tightly coupled multi-processor system with a control processor that controls the arithmetic processor and performs the functions of a normal operating system.

[Problems to be solved by the prior art and the invention] In an information processing system that performs one high-speed scientific operation, the overlap between the arithmetic processor that performs the high-speed scientific operation and the processor that performs the functions of a normal operating system is In a combined multi-processor system, the main memory is shared and the tasks are performed under a single-task cooperative operating system, so each processor may not be able to operate independently or there may be problems with access to the main memory. There is a lot of access conflict.

Well, it has caused a decline in sexiness. However, there were drawbacks such as failure of the main memory or arithmetic processor causing the system to go down.

　　　　　　　　　.

In addition, in a loosely coupled multi-processor system in which a processor that performs high-speed scientific calculations and a processor that performs the functions of a normal operating system are completely independent, the above drawbacks are eliminated, but the program of the job that runs on the processor is The disadvantages were that it took a long time to transfer data, and that it required a dedicated auxiliary storage device.

[Means for solving problems]

An object of the present invention is to enable communication between nine processors, including an arithmetic processor that performs scientific operations (vector operations) at high speed, and a control processor that controls the arithmetic processor and performs the functions of a normal operating system. In a tightly coupled multi-processor system,
The main memory is divided and used by each processor, and a task control block corresponding to a task running on each processor and a control area for controlling the control block are allocated to an area of the main memory corresponding to each processor. The present invention provides a task control method for a tightly coupled multi-processor system, which solves the above-mentioned drawbacks and allows each processor to perform its own task control.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows the configuration of a tightly coupled multi-processor system according to an embodiment of the present invention. This tightly coupled multi-
The Zorocessor system includes a main storage device 1 consisting of a control processor memory 2 and an arithmetic processor memory 3 in which control information, programs, data, etc. including control blocks of tasks operated by each processor are stored, and an inter-processor communication means. A scientific calculation processing device 4 consisting of a control processor 5 having the functions of a normal operating system and a calculation processor 6 having inter-processor communication means and performing high-speed scientific calculation functions.

It is composed of an input/output processing device 7 that controls input/output, and an input/output device 8 in which programs, data, etc. are stored.

FIG. 2 is a block diagram of the arithmetic processor 6.

3 and 4 are block diagrams of the arithmetic processor memory 3, FIG. 5 shows an example of task control in the arithmetic processor memory 3, and FIG. 6 shows an example of task control in the arithmetic processor memory 3.

3 shows the flow of task control in the control processor 5 and the arithmetic processor 6, respectively.

A normal operating system starts up using control processor memory 2, control processor 5, input/output processing unit 7, and input/output device 8.

Next, the operating system initializes the arithmetic processor 6, loads the data and program into the control data area 3012 and the control program area 302 in the arithmetic processor control area 30 of the arithmetic processor memory 3, and Control is passed to the control program in the control program area 302 through the communication means. With the above processing, startup of the control processor 5 and the arithmetic processor 6 is completed, and the user job can be executed.

Next, the operating system running on the control processor 5 determines whether the user job is
If the user job includes a task that operates on the arithmetic processor 6, the task is divided into those that operate on the control processor 5 and those that operate on the arithmetic processor 6, and the tasks that operate on the arithmetic processor 6 of the user job are controlled first. Load control information, a program, and data including a task state block 310 into the user job area 31 of the arithmetic processor memory 3, and further control information including a task control block of a task running on the control processor 5 of the user job. The program and data are transferred to the control processor memory 2 and the task is activated.

The task status block 310 and the task control block are reserved for each task running on each processor, and contain information such as the mode of the running program, the execution start address of the program, the register save area of each processor, and billing. Two blocks that have information etc. each also have I ink for other blocks.

The activated task program first operates on the control processor 5, and in order to cause the program task loaded in the arithmetic processor memory 3 to operate on the arithmetic processor 6, a special procedure call instruction is required. The control processor 5
The inter-processor communication means of the two communication means act to notify the arithmetic processor 6 of procedure call communication.

The arithmetic processor 6, which has received the procedure call communication, creates a task link 3013 in the control data area 301 based on the communication information including the pointer of the task status block 310, and sets the task link 3013 in the waiting task list. :L, -3011°3012 according to priority.

When the registered task link 3013 becomes executable by the control program in the control program area 302 running on the arithmetic processor 6, it is queued to the execution task key -3011.degree. and starts in the state shown in the task state block 310.

When the activated program of the task calls the program of the control processor memory 2 (returns to the program), the processor of the arithmetic processor 6 is executed by executing a special procedure call (or return) instruction. The intercommunication means is activated and the control processor 5 is notified of procedure call (or return) communication. The procedure call (or return)
The control processor 5 that receives the communication also performs the same processing as that of the arithmetic processor 6), thereby allowing each processor to control its own tasks.

Here, in FIG. 6 showing the flow of task control, when task A running on the control processor 5 executes a procedure call instruction, the inter-processor communication means is activated, and the procedure call communication is notified to the arithmetic processor 6. Then, task A is put on hold and task B, which has the next priority, is activated.

On the other hand, the arithmetic processor 6 that has received the procedure call communication starts the task A', and while the task A' is running, the task B running on the control processor 5 is activated.
Upon receipt of the procedure call communication from, the task B' is registered in the pending task keys 3011 and 3012. Task B on the control processor 5 is placed on hold due to execution of the procedure call instruction, and task C having the first priority is activated. When the task A' on the arithmetic processor 6 executes a procedure call instruction, the inter-processor communication means is activated, the procedure call communication is notified to the control processor 5, and the task A' is not in a pending state. The task B' is retrieved from the pending task keys 3011 and 3012, and the task B' is activated.

Next, the control processor that received the procedure call communication! Mat, makes the task A in a pending state executable, and makes the task C and the task A in operation.
and registers the task C, which has a lower priority, to the waiting task key.

The task A having a high priority is activated.

As explained above, each processor can control its own tasks, each processor can operate independently and simultaneously, and contention for access to the main memory can be suppressed.

Note that the inter-processor communication means in the above description is not limited to direct communication between processors, but may also be, for example, via a file. Furthermore, in the embodiments 9 and above, the control processor memory 2 and the arithmetic processor memory 3 are configured with separate hardware, but the control processor memory 2 and the arithmetic processor memory 3 are configured in different areas of the same hardware. Of course, it may be configured as follows.

〔Effect of the invention〕

As explained above, the present invention has a configuration in which the main memory is divided into each processor and each processor performs its own task control, thereby suppressing memory access contention and preventing failures of the arithmetic processor or main memory from occurring in the system. It has the effect of preventing you from going down.

Remaining days below

[Brief explanation of drawings]

FIG. 1 is a block diagram of a tightly coupled multi-processor system of the present invention, and FIG. 2 is a block diagram of the arithmetic processor 6 shown in FIG.
FIG. 3 is a conceptual diagram of the ISE Φ book, and FIG. 6 is a flowchart of task control showing an embodiment of the present invention. In fig. 1... Main storage device, 2... Control processor memory. 3... Arithmetic processor memory, 4... Scientific arithmetic processor, 5... Control processor, 6... Arithmetic processor. 7... Input/output processing device, 8... Input/output device, 30.
... Arithmetic processor control area, 31 , 3 t(n)
... User job area, 301... Control data area, 302... Control program area, 310, 31
'0(n)...Task status block, 3010...
Execution task pointer. 3011...Start pointer of tasks waiting to be executed, 301
2...Final pointer of task waiting to be executed, 3013, 30
13(n)...Task link, 61...Vector calculation unit, 62...Control unit, 63...Scalar calculation unit, 6
11... Vector mask register, 612... Mask calculation processing unit. 613...Vector reno star, 614...Vector arithmetic processing unit, 621...Control register, 622...
Control processing 'fM section, 63 t... Scalar register, 6
32... Scalar arithmetic processing section. -=' 1 Figure 6

Claims (1)

[Claims] 1. In a tightly coupled multi-processor system that includes an arithmetic processor that performs scientific operations and a control processor that controls the arithmetic processor and performs the functions of an operating system, and that enables communication between the two processors, Each processor divides and uses the main memory, and the task control block corresponding to the task running on each processor and the control area for controlling the control block are stored in the main memory corresponding to each processor. A task control method for a tightly coupled multi-processor system in which each processor can perform its own task control.