JPS6126976Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to a hard copy device that is supplied with an image signal and records the image signal on copy paper.

For example, the position of a solid line in a drawing can be encoded, the encoded information can be stored in a memory, etc., and when necessary, the information can be read out and reproduced on a cathode ray tube, or it can be copied on paper. There is a hard copy device. In order to partially modify drawing information stored in a memory or the like in such a hard copy device, it is necessary to associate which address in the memory the information of the portion to be modified is stored. In such cases, conventionally, copy paper with a grid-like scale printed in advance is used, and by copying the information read from memory onto this paper, the coordinates of the positions of each part in the drawing can be plotted in a grid-like manner. It is defined by a scale, and the address of the memory is associated with the position of the scale.

However, even if grid-like scale lines are printed on the copy paper, there is no correlation between the scale lines and the drawing obtained by copying, either in terms of positional deviation or size. Therefore, there is a drawback that it takes time and effort to find the memory address corresponding to the position to be corrected, and therefore the correction work is troublesome.

〓〓〓〓
The purpose of this invention is to be able to accurately read memory address locations even from a drawing obtained by copying. To provide this kind of hard copy device.

With this device, when information such as a drawing is read from memory, a marker signal is generated to specify the coordinates of each part of the drawing in synchronization with the reading, and the marker signal can be superimposed on the drawing and copied as necessary. It is configured as follows. With this configuration, the address position of the memory can be accurately read even from a drawing obtained by copying.

An embodiment of this invention will be described below in detail with reference to the drawings.

FIG. 1 shows an embodiment of this invention. 1 in the same figure
indicates a video signal generator. This video signal generator 1 can be composed of a refresh memory 2 composed of a shift register, a writing section 3, and an output section 4, for example. For example, an interface section 6 for coupling with a computer 5 is connected to the writing section 3, so that the computer 5 can also write information into the memory 2. A cathode ray tube display device 7 is connected to the output section 4, and is configured to display information read from the memory 2 on the cathode ray tube display device 7, and also supplies an output signal to the hard copy device 8. A hard copy is obtained on copy paper 9.

In this invention, a marker for displaying an address in the memory 2 is recorded on a hard-copied drawing or the like. In this example, a case is shown in which the marker signal generator is built into the hard copy device 8. Reference numeral 10 indicates this marker signal generator, and the video signal output from the video signal generator 1 is supplied to a video signal processing section 11, which processes pixel signals for one horizontal scanning line, for example. is extracted multiple times, and the extracted pixel signals are supplied to the output conversion unit 12, which converts the pixel signals for one horizontal scanning line into light multiple times using, for example, a cathode ray tube. The light is then used to record on the copy paper 9.

The marker signal generator 10 counts the number of horizontal scanning lines, detects the scanning line to which a marker should be attached, and when the scanning line to which a marker should be attached is detected, the output converter 1
2, and a marker M is recorded on the outer periphery of the drawing as shown in FIG.

Marker signal generator 10 and video signal processing section 11
can be configured as shown in FIG. 3, for example. In FIG. 3, 13 is a vertical synchronization signal separation circuit, and 14 is a horizontal synchronization signal separation circuit. The vertical synchronization signal separated by the vertical synchronization signal separation circuit 13 is supplied to a frequency divider 15, which divides the frequency to, for example, 1/5, and supplies the divided output to a counter 16. Let them count. The horizontal synchronizing signal is directly supplied from the horizontal synchronizing signal separation circuit 14 to the counter 17 . These counters 16 and 17 are set to a base number equal to the number of horizontal scanning lines.
For example, if there are 525 horizontal scanning lines, the counter 16
and 17 set the base number so that when 525 is counted, it returns to the initial value. For example, the outputs of 1 and 525 are output from the count output of the counter 17 and the AND gates 18 and 19
and the count outputs of 1 and 525 of the counter 16 are applied to the other input terminals of the AND gates 18 and 19. If configured like this, AND gate 18
and 19 output five horizontal signals corresponding to the 1st and 525th horizontal scanning lines. That is, at the beginning of copying, five horizontal signals corresponding to the first line are output from the AND gate 18, and five horizontal signals corresponding to the 525th line are output from the AND gate 19.

On the other hand, an AND gate group 20 is provided. Each of the AND gates in the AND gate group 20 is supplied with an intermediate count output, excluding the first and last count outputs of the counters 16 and 17. That is, for example, the count value 2 of the counter 16 and the count value 2 of the counter 17 are given to one of the AND gates 20a so that the horizontal signal corresponding to the second horizontal scanning line can be repeated five times. The horizontal signals up to the 524th scanning line can be repeated five times each, and the outputs of the AND gates 18 and 19 and the AND gate group 20 are logically summed by the OR gate 21.
The gate 22 is controlled by its output. A video signal is applied to the gate 22, and the video signal is gated by the outputs of the AND gates 18 and 19 and the AND gate group 20, and the video signal repeatedly read out from the memory 2 is read from the first scanning line to the last scanning line. Repeat gate up to the scanning line 5 times each,
The gate output is supplied to the output converter 12 through the OR circuit 23.

For example, the marker signal generator 10 generates a one-row pattern.
It is composed of a generator 10a and a two-point pattern generator 10b. The outputs of AND gates 18 and 19 are given to the first column pattern generator 10a, and the first and
In the 525th scanning section, one row pattern is generated and one row of markers M parallel to the horizontal scanning line as shown in FIG. 2 is printed. Further, the output of each AND gate of the AND gate group 20 is supplied to the two-point pattern generator 10b. Therefore, the two-point pattern generator 1
From 0, for example, from the third line, 3, 5, 7, 9, 11
Two point marker signals are output at the beginning and end of the horizontal scan for each odd-numbered scan, and vertical markers M are printed at both ends of the screen.

As explained above, according to this invention, the memory 2
Since the pattern signal is generated in synchronization with the video signal read from the video signal, the temporal correspondence between the video signal and the pattern signal is always constant. Therefore, the positional relationship between the marker M and the image is always constant and no deviation occurs, so the position of each part of the drawing etc. can be defined from the position of each dot of the marker M. Therefore, when correcting a drawing or the like, the correction position can be easily determined from the position of the dot of the marker M, and there is an advantage that the correction work can be easily performed.

If the pattern generator 10 is configured to be operated as needed, the markers M can be printed as needed, and a drawing without the markers M can be obtained.

In the above description, a refresh memory consisting of a shift register is used as the memory 2, but other types of memory may also be used. It is also easy to understand that the configuration of the video signal processing section 11 is not limited to the above embodiment.

[Brief explanation of the drawing]

Fig. 1 is a system diagram showing an embodiment of this invention, Fig. 2 is a front view showing an example of an image with markers obtained by the device of this invention, and Fig. 3 is a detailed diagram of the main parts of this invention. FIG. 2 is a system diagram showing an example. 2: Memory, 8: Hard copy device, 10: Marker signal generator. 〓〓〓〓

Claims (1)

[Claims for Utility Model Registration] The refresh memory is read in synchronization with the scanning of the display surface of the cathode ray tube display, and the read information signal is supplied to the cathode ray tube display as a display signal, and the refresh memory A hard copy device that is supplied with an information signal read from a storage memory and obtains a hard copy of the information includes a vertical synchronization separation circuit that separates a vertical synchronization signal from the read information signal; a frequency dividing circuit that divides the frequency; a first counter that counts the frequency-divided output; a horizontal synchronization separation circuit that separates the horizontal synchronization signal from the read information signal; and a first counter that counts the separated horizontal synchronization signal. 2 counters, a coincidence detection circuit that detects the coincidence of the outputs of the respective corresponding counting stages of the first counter and the second counter, and a coincidence detection circuit that detects coincidence of the outputs of the first and last counting stages. a one-line pattern generator that generates a first marker signal; a two-point pattern generator that is driven by the other coincidence detection output of the coincidence detection circuit and generates a short second marker signal; and a two-point pattern generator that generates a short second marker signal; and a synthesizing circuit that synthesizes the second marker signal with the supplied information signal to obtain a hard copy input signal.