JPS61269756A - Bus monitor device - Google Patents

Abstract

PURPOSE:To search for an abnormal cause easily by obtaining the using right of a bus and providing a function, etc., to access other device designated actively, when the function to supervise the bus information and the information coincident to the supervising information are detected. CONSTITUTION:A monitor mechanism part 51 of a bus monitor device 5 always samples the composite signal on a system bus 6 at the designated sampling period, and the sampled composite signal is transferred to a log data memory part 52. A transmission and reception control part 53 controls the transmission and reception with other device by the indication from a control part 54, and connects through an external interface part 55 with an external device. Namely, the response data from an access destination device are detected, the comparing data set beforehand are compared with a comparator circuit in the control part 54, and when the data are coincident, other designated device is accessed, and when they are dissident, the collection of information is stopped. Thus, while the system is operated actually, the information can be collected when the abnormality is generated, and the abnormal cause can be easily searched for.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a bus monitoring device, and particularly to a bus monitoring device having a fault detection function.

(Prior Art) Data processing systems in which a plurality of devices share one bus to transfer data have been known.

By the way, in a data processing system, some kind of countermeasure must be taken in case an abnormality occurs. As an example, a well-known method is to sequentially store information necessary to analyze an abnormality in a memory as historical information, and read this historical information when an abnormality occurs to find the cause of the abnormality.

(Problems with the prior art) However, the memory that stores this history information (history memory) is normally provided within the device, and although it is suitable for searching for the cause of abnormalities within the device, it is difficult to search for the following causes of abnormalities. is not very suitable for

For example, there is a case where data written in a memory device is destroyed for some reason.

This is because you will only know that the data has been destroyed when you read the written data, and by that time the data has already been destroyed.

Additionally, there is a method to use a logic analyzer to trigger a specific signal and use a logic analyzer to determine the bus status at that time and pursue the cause of the abnormality, but if there are many signal lines on the bus, there are many signals that need to be monitored. The problem is that it takes time because it cannot be viewed all at once and has to be viewed multiple times, and furthermore, it requires a lot of effort and time to connect the logic analyzer. I can't say it's a good method.

Therefore, it is an object of the present invention to provide an apparatus that allows easy investigation of the cause of an abnormality.

(Structure of the Invention) In order to achieve the above object, the bus monitoring device of the present invention has a memory function that stores and holds information on the bus set in advance, and performs comparative monitoring of information on the bus and bus monitoring information set in advance. A bus information monitoring function that detects information on the bus that matches the bus monitoring information, acquires the right to use the bus and actively accesses a designated device, and a function that proactively collects response data from the accessed device and A function that compares the set comparison data, and when the response data and comparison data match, clears the stored memory contents and again stores the information and performs the above-mentioned series of accesses to other devices and response data. It has a function of repeatedly performing comparison at a preset period and canceling the memory retention operation if there is a mismatch.

(Operation) According to the present invention, with the above configuration, when information matching the bus monitoring information is detected on the bus, the present bus monitoring device acquires the right to use the bus and accesses the designated other device. Then, the response from the access destination device clears the stored contents, stores the bus information again, and repeats the above series of device accesses and response data comparisons at a preset cycle. On the other hand, if they do not match, storage of the bus information is stopped. In this way, the information on the bus when an abnormality occurs is stored, and the cause of the abnormality can be investigated based on this content.

(Embodiment) First, how the bus monitoring device of the present invention is connected within the system will be explained using the system connection diagram shown in FIG.

In FIG. 2, a central processing unit (CPU) 1, a main memory device (MMEM) 2, and a channel device (CH)
s and 4 are connected to each other via a system bus 6, and as is well known, a device that has obtained the right to use the bus uses the system bus 6 to transfer data. Here, the system bus 6 is composed of, for example, the following signals.

(1), bus use request line (2), bus use permission line (3), control line (4), source address line (5), destination address line (6), response line (7) ), status line (8), interrupt line (9), data line, and the bus monitoring device 5 of the present invention are connected to this system bus 6, and like other devices, obtain the right to use the bus and transfer data. It is something to do. The bus monitoring device 5 also has an interface section for connecting an external device 7, and is configured to be able to input necessary information from the external device 7. Next, the configuration and operation of this bus monitoring device 5 will be explained.

As shown in FIG. 1, this bus monitoring device 5 includes a monitor mechanism section 51 and a log data memory section 52 as an embodiment.
, a transmission/reception control section 53, a control section 54, and an external interface 55. Here, the monitor mechanism section 51 always samples the configuration signal (configuration signal to be monitored) on the system gas 6 at a specified sampling period (for example, the system clock), and the sampled configuration signal is used as log data. The data is configured to be transferred to the memory section 52. Further, the transmission/reception control unit 53 is configured to control transmission/reception with other devices based on instructions from the control unit 54. The external interface 55 is for connecting an external device 7 to the bus monitoring device 5.

The operation of the bus monitoring device 5 configured in this way will be explained below. FIG. 3 is a functional block diagram showing the functions of the control unit 54, in which 101 is an external interface control unit, 102 is an information setting unit that holds various information sent from the external interface unit 55, 103 is a comparison unit that compares a specific signal from the information setting unit 102 (for example, a specific signal on the system bus 2 designated by the external device 7) and a corresponding specific signal from the monitor mechanism unit 51; 104 is a delay unit 109; a competition unit 105 for controlling competition between the signal from the signal from the comparator 103 and the signal from the comparison unit 103 and sending an activation signal to the transmission/reception control unit 53;
106 is a log data memory control unit that controls the log data memory unit 52; 106 is a transmitting unit that sends the necessary information of the information setting unit 102 to the transmission/reception control unit 53;
107 is a receiving unit for receiving the necessary signal from the transmission/reception control unit 53 and sending it to the comparing unit 108; 108 is for comparing the signal from the receiving unit 107 and the corresponding specific signal of the information setting unit 102; A comparison section 109 is a delay section for delaying the coincidence signal from the comparison section 108 by a certain time A (this time can be set from the external device 7). So - as an example, the MMEM in Figure 2
The operation for finding the cause of a failure in which data written in 2 is destroyed will be explained step by step.

(Step 1) Necessary data is set in the information setting unit 102 from the external device 7 (for example, a digital computer). Examples of data include comparison data (device address, memory address, write data, etc.) given to comparison section 103, delay data given to delay section 109, and transmission data (device address, memory address, control information, etc.) given to transmission section 106. It is.

(Step 2) When a match is detected in the comparison section 103, a match signal is sent to the conflict section 104 and the log data memory control section 105. If the information setting unit 102 is set to write the device address of the MMEM 2 as the receiving address and to write the data α to the memory address A as the control information, the device configured via the system bus 6 writes the data α to the address A of the MMEM 2. If written, the comparator 103 will send out a matching output.

-2, and the collection of log data into the log data memory section 52 begins.

(Procedure 3) When a match is detected, the competition unit 104 performs competition control and gives an activation instruction to the transmission/reception control unit 53. If the device address of the MMEM 2 is set as the receiving address in the information setting section 102, and the data reading to the memory address A is set as the control information, these pieces of information are sent to the transmission/reception control section 53 via the transmission section 106, and the main The bus monitoring device 5 begins an operation to acquire the right to use the system bus 6. When the right to use the bus is acquired, data is read from memory address A of MMEM2.

(Step 4) The data read from the yfMEM 2 is sent to the receiving monk 107 and compared with the write data α set in the information setting unit 102 in the comparison unit 108. The comparison result is then sent to the log data memory control section 105, and if one match, the contents of the log data memory section 52 are reset, and after a certain time delay by the delay section 109, the contents are sent to the transmission/reception control section 53 again. When a startup instruction is given to the log data memory section 52, the above operations are repeated, and if there is a mismatch, the data collection to the log data memory section 52 is stopped.

Therefore, after detecting a mismatch, by reading the contents of the log data memory section 52, it is possible to investigate the cause of the destruction of the data stored in the MMEM 2.

Next, a supplementary explanation will be given regarding the collection of log data into the log data memory unit 52. FIG. 4 is a time chart for explaining the flow of information on the system bus 6, in which a device at time T□ sends data α to address A of MMEM 2.
When this is written, a match signal is output from the comparison unit 103, and log data collection to the log data memory unit 52 is started (step 2).

At the same time, a startup instruction is given to the transmission/reception control unit 53 via the contention unit 104, and a read operation from address A of the MMEM 2 is started at time T (procedure 3).
. Then, at time T, when read data β from address A of MMEM 2 is obtained, comparison section 108 compares this data β with the data α. If the comparison results match, the log data collected so far is discarded and log data collection starts again. and delay section 109
After a delay of a certain time (T in FIG. 4), the contention unit 10
A start instruction is given to the transmission/reception control section 53 via the control section 4, and the above operation is repeated. Therefore, the comparison section 108
As long as a match is detected, an activation instruction is repeatedly given to the transmission/reception control section 53, and log data is collected as shown in FIG. That is, the number of log datums equal to the preset t7 determined by the delay unit 109, the log data a2 at the time of sending the read command, the log data a3 until the read data β is obtained, and the log data a4 at the time of receiving the read data are the fifth 5. When the log data is collected as shown in the figure, the comparison unit 1
When a match is detected in step 03, the competition section 104 gives priority to this and gives an activation instruction to the transmission/reception control section 53, ignoring the instruction from the delay section 109. On the other hand, comparison section 1
If a mismatch is detected in 0B, no further data collection is performed. Therefore, by reading and examining the contents of the log data memory section 52 at that time, it is possible to investigate the cause of the mismatch, that is, the cause of the abnormality.

Note that the present invention is not limited to this embodiment, and various modifications can be made by changing the information set in the information setting section 102. In addition, in the above explanation, the information setting section 1
Although the information setting for 02 is performed from the external device 7, the bus monitoring device 5 may be provided with this information setting function.

(Effects of the Invention) As described above in detail, the bus monitoring device of the present invention has the following features:
When information matching the bus monitoring information is detected on the bus, the right to use the bus is acquired and the specified other device is accessed. When response data is obtained from the accessed device, this response data is compared with preset comparison data. However, bus information is collected repeatedly until a discrepancy occurs, and information collection is stopped when a discrepancy occurs, so information can be collected when an error occurs while the system is actually operating, making it easy to find the cause of the error. be able to.

Therefore, it is particularly effective in finding the cause of abnormalities such as destruction of stored data in devices that are frequently accessed by multiple devices, such as storage devices.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of a bus monitoring device according to the present invention, and FIG.
FIG. 3 is a system connection diagram, FIG. 3 is a functional block diagram, FIG. 4 is a time chart of the system bus, and FIG. 5 is an explanatory diagram of log data collection. 5: Bus monitoring device, 51 Nemotor mechanism section, 52: Log data memory section, 53: Transmission/reception control patent applicant Oki Electric Industry Co., Ltd. 4 Moxibustion times Figure 2 +01 Decay II tun Follow/7WJ Figure 3 System ↑ Mbesu's Quimco Mart Dai 4 Figure 4 Figure 5

Claims (2)

[Claims] (1) A memory function that stores and retains information on the bus set in advance; a bus information monitoring function that compares and monitors information on the bus with preset bus monitoring information; and a bus information monitoring function that compares and monitors information on the bus with preset bus monitoring information; A function that acquires the right to use the bus when detected on the bus and actively accesses a specified other device, a function that compares response data from the accessed device with preset comparison data, and a function that compares the response data from the access destination device with preset comparison data. If the comparison data match, the stored memory content is cleared and the information storage operation and the above series of access to other devices and response data comparison are repeated at a preset cycle. A bus monitoring device characterized by having a function of canceling a memory retention operation. (2) The device actively accessed by the bus monitoring device is a memory device, and the bus monitoring information includes a specific address of the memory device, and the comparison data includes storage data that should originally be stored at the specific address. A bus monitoring device according to claim 1, characterized in that: