JPS61269573A - Halftone signal processing circuit in television receiver - Google Patents

Halftone signal processing circuit in television receiver

Info

Publication number
JPS61269573A
JPS61269573A JP60112697A JP11269785A JPS61269573A JP S61269573 A JPS61269573 A JP S61269573A JP 60112697 A JP60112697 A JP 60112697A JP 11269785 A JP11269785 A JP 11269785A JP S61269573 A JPS61269573 A JP S61269573A
Authority
JP
Japan
Prior art keywords
signal
halftone
circuit
given
brightness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60112697A
Other languages
Japanese (ja)
Inventor
Kazuhiro Kitamura
喜多村 和洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP60112697A priority Critical patent/JPS61269573A/en
Publication of JPS61269573A publication Critical patent/JPS61269573A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/57Control of contrast or brightness

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To make characters easy to see by giving a half tone signal to an automatic brightness limiting circuit during a blacking pulse output period of a character signal to output the result to a video signal processing circuit as a beam current limit signal thereby decreasing the brightness around the character. CONSTITUTION:A halftone signal S1 given to the 1st input section 13 is given to a base of a transistor (TR) 15 of a circuit means 12 and a blanking pulse S2 during a character signal blanking period in the high level given to the 2nd input section 14 is given to a base of a TR 16. A halftone signal S3 represented to a collector of the TR 15 is a waveform where the level corresponding to the surrounding part of a character signal to the subjected to halftone goes to actually a high level and a low voltage equal to a charging voltage of a capacitor C18 is given to a beam current limiting circuit 11 of the automatic brightness limiting circuit 6 when the signal S3 is at a high level and a high voltage nearly equal to a power supply voltage VCC is given when at a low level. Thus, the brightness around the characters is decreased to make easy to see.

Description

【発明の詳細な説明】 (技術分野) 本考案は、テレビジョン受像機に備えられて画面上の文
字周辺の輝度を下げる(ハーフトーンにすること)ため
のハーフトーン信号を処理するハーフトーン信号処理回
路に関する。
Detailed Description of the Invention (Technical Field) The present invention relates to a halftone signal that is provided in a television receiver and processes a halftone signal to reduce the brightness around characters on the screen (to create a halftone). Regarding processing circuits.

(従来技術) 文字放送やあるいはパーソナルコンピュータ等からの文
字信号をテレビジョン受像機の画面上に映す場合にその
画面上における文字周辺の輝度が高いと文字が非常に見
づらくなるので、文字を見易くするためには文字周辺の
輝度を下げることが必要である。
(Prior art) When displaying character signals from teletext broadcasts or personal computers on the screen of a television receiver, if the brightness around the characters on the screen is high, the characters become very difficult to see, so it is necessary to make the characters easier to see. To achieve this, it is necessary to lower the brightness around the characters.

このための1つの手段として映像信号中の垂直と水平の
各同期信号を除いた映像信号部分であって、かつハーフ
トーン信号と重なる部分のレベルを下げるようにした回
路があるが、回路構成が複雑になるという欠点があった
One means for this purpose is a circuit that lowers the level of the video signal portion of the video signal excluding the vertical and horizontal synchronization signals and the portion that overlaps with the halftone signal, but the circuit configuration is The drawback was that it was complicated.

(発明の目的) 本発明は、簡単な回路構成のもので文字周辺の輝度を下
げてその文字を見易くできるようにすることを目的とす
る。
(Objective of the Invention) An object of the present invention is to reduce the brightness around a character to make it easier to see the character using a simple circuit configuration.

(発明の構成) 本発明は、第1に受像管アノード電流変化の検出値に応
じて映像信号処理回路に対して、受像管のビーム電流を
規定値以下に制限するビーム電流制限信号を出力して輝
度を自動的に制限する自動輝度制限回路を利用している
。そして、第2に画面上の文字周辺の輝度を下げるため
のハーフトーン信号を文字信号のブランキングパルス出
力期間中に自動輝度制限回路に与える回路手段を設ける
ことにより、自動輝度制限回路は回路手段からのハーフ
トーン信号を前記ビーム電流制限信号として映像信号処
理回路に出力するようにしている。
(Structure of the Invention) The present invention firstly outputs a beam current limiting signal for limiting the beam current of the picture tube to a specified value or less to a video signal processing circuit in accordance with a detected value of a change in the picture tube anode current. It uses an automatic brightness limiting circuit that automatically limits brightness. Second, by providing a circuit means for supplying a halftone signal for lowering the brightness around the characters on the screen to the automatic brightness limiting circuit during the blanking pulse output period of the character signal, the automatic brightness limiting circuit can be controlled by the circuit means. A halftone signal from the beam current limit signal is outputted to the video signal processing circuit as the beam current limit signal.

(実施例の) 第1図は本発明の一実施例に係る回路図である。(Example) FIG. 1 is a circuit diagram according to an embodiment of the present invention.

この実施例のテレビジョン受像機は、映像信号を処理す
る映像信号処理回路1と、この映像信号処理回路lから
のR,G、B信号をそれぞれ増幅して受像管2のカソー
ドに出力する増幅器3,4.5とを備えている。また、
このテレビジョン受像機は輝度が異常に上がりすぎたた
めに受像管2に過大な電流が流れることを防止するため
の自動輝度制限回路6を有している。
The television receiver of this embodiment includes a video signal processing circuit 1 that processes video signals, and an amplifier that amplifies R, G, and B signals from the video signal processing circuit 1 and outputs the amplified signals to the cathode of a picture tube 2. 3, 4.5. Also,
This television receiver has an automatic brightness limiting circuit 6 for preventing excessive current from flowing through the picture tube 2 due to abnormally high brightness.

この自動輝度制限回路6は、周知のものであり(例えば
rNHK カラーテレビ受信技術」 i和58年8月1
日 日本放送協会発行参照)、フライバックトランス7
の2次側高圧巻線8に流れる受像管アノード電流がコン
デンサ9を充電することにより生ずる負の電圧と抵抗1
0を介して加わる正の電圧との和に対応してビーム電流
制限回路11から映像信号処理回路1に対して、受像管
2のビーム電流を規定値以下に制限するビーム電流制限
信号を出力して輝度を自動的に制限するものである。
This automatic brightness limiting circuit 6 is well-known (for example, rNHK Color TV Receiving Technology, August 1, 1999).
Japan Broadcasting Corporation), flyback transformer 7
The negative voltage generated when the picture tube anode current flowing through the secondary high-voltage winding 8 charges the capacitor 9 and the resistance 1
0, the beam current limiting circuit 11 outputs a beam current limiting signal to the video signal processing circuit 1 to limit the beam current of the picture tube 2 to below a specified value. This automatically limits the brightness.

この実施例は、このような通常のテレビジョン受像機に
備えられている自動輝度制限回路6を利用して次の回路
手段12により文字周辺の輝度を下げるようにしている
In this embodiment, the automatic brightness limiting circuit 6 provided in such a normal television receiver is used to reduce the brightness around the characters by the following circuit means 12.

12は画面上の文字周辺の輝度を下げるためのハーフト
ーン信号を文字信号ブランキングパルス出力期間中に自
動輝度制限回路6に与える回路手3一 段である。この回路手段12は、第2図(a)に示すよ
うなハイレベルのノ\−フトーン信号St力(与えられ
る第1人力部13と、第2図(b)に示すようなハイレ
ベルが文字信号ブランキング期間となるブランキングパ
ルスS2が与えられる第2人力部14とを備える。第1
人力部13に与えられたハーフトーン信号Stは第1ト
ランジスタ15のベースに与えられる。文字信号ブラン
キングp<)レスS2は第2トランジスタ16のベース
に与えられる。第1トランジスタ15のベースは第2ト
ランジスタ16のコレクタとエミ・ツタとを介して接地
される。従って、第1入力部13に与えら1”したハー
フトーン信号Slは、第2人力部14に与えられた文字
信号ブランキングl<レスS2の71イレベル期間と一
致して第1トランジスタ15のコレクタに第2図(C)
に示すようなノ\イレベル部分力(ハーフトーン期間と
なる7X−フトーン信号S3となってあられれる。即ち
、この)1−フトーン信号S3は実際にハーフトーンに
すべき文字信号の周辺部に対応してレベルが7−イレベ
ルに変化する波形となっている。
Reference numeral 12 designates one stage of circuitry 3 for applying a halftone signal for lowering the brightness around characters on the screen to the automatic brightness limiting circuit 6 during the character signal blanking pulse output period. This circuit means 12 receives a high-level noftone signal St as shown in FIG. 2(a) and a high-level signal St as shown in FIG. A second human power unit 14 is provided with a blanking pulse S2 serving as a signal blanking period.
The halftone signal St applied to the human power section 13 is applied to the base of the first transistor 15. The character signal blanking p<)res S2 is applied to the base of the second transistor 16. The base of the first transistor 15 is grounded via the collector of the second transistor 16 and the emitter. Therefore, the halftone signal Sl applied to the first input unit 13 is input to the collector of the first transistor 15 in coincidence with the 71 level period of character signal blanking l<res S2 applied to the second human input unit 14. Figure 2 (C)
The 1-foottone signal S3 corresponds to the periphery of the character signal that is actually to be halftone. The waveform has a waveform in which the level changes from 7 to 1.

第3トランジスタ17は第1トランジスタ15がオフ(
またはオン)のとき、即ちハーフトーン信号S3がハイ
レベル(またはローレベル)期間のときにオン(または
オフ)になる。この第3トランジスタ17のエミッタに
はコンデンサ18が接続されている。このコンデンサ1
8は電源電圧Vccを抵抗19と可変抵抗20とで分割
してなる電圧で充電されている。この可変抵抗20はハ
ーフトーンレベルを調整するためのものである。
The third transistor 17 is turned off when the first transistor 15 is turned off (
or on), that is, when the halftone signal S3 is at a high level (or low level). A capacitor 18 is connected to the emitter of the third transistor 17. This capacitor 1
8 is charged with a voltage obtained by dividing the power supply voltage Vcc by a resistor 19 and a variable resistor 20. This variable resistor 20 is for adjusting the halftone level.

文字周辺のためにハーフトーン信号S3がハイレベルの
ときは第3トランジスタ17はオンしており、第3トラ
ンジスタ17がオンしていると、自動輝度制限回路6の
ビーム電流制限回路11にはダイオード21を介してほ
ぼコンデンサ18の充電電圧に等しい低い電圧が与えら
れる。またノ\−フトーン信号S3がローレベルのとき
は第3トランジスタ17はオフしてビーム電流制限回路
llには電源電圧Vccにほぼ等しい高い電圧が与えら
れる。
When the halftone signal S3 is at a high level for the periphery of characters, the third transistor 17 is on, and when the third transistor 17 is on, a diode is connected to the beam current limiting circuit 11 of the automatic brightness limiting circuit 6. A low voltage approximately equal to the charging voltage of capacitor 18 is applied via 21 . Further, when the noft tone signal S3 is at a low level, the third transistor 17 is turned off, and a high voltage approximately equal to the power supply voltage Vcc is applied to the beam current limiting circuit 11.

ビーム電流制限回路11は、ダイオード21から低い電
圧が与えられると、映像信号のレベルを半分にし、また
高い電圧が与えられると、文字信号の輝度にまでその映
像信号のレベルを上げるようなビーム電流制限信号を映
像信号処理回路1に与える。
The beam current limiting circuit 11 generates a beam current such that when a low voltage is applied from the diode 21, the level of the video signal is halved, and when a high voltage is applied, the level of the video signal is increased to the brightness of the character signal. A limiting signal is given to the video signal processing circuit 1.

したがって、自動輝度制限回路6は回路手段12からの
出力に応じてビーム電流制限信号を映像信号処理回路1
に出力し、映像信号処理回路lはそのビーム電流制限信
号により文字周辺の輝度を下げるように映像信号を処理
して増幅器3,4.5を介して受像管2に出力する。
Therefore, the automatic brightness limiting circuit 6 outputs the beam current limiting signal to the video signal processing circuit 1 in accordance with the output from the circuit means 12.
The video signal processing circuit 1 processes the video signal so as to reduce the brightness around the characters using the beam current limiting signal, and outputs the processed video signal to the picture tube 2 via the amplifiers 3, 4.5.

第3図(a)の斜線部分はハーフトーン信号Slに対応
する受像管2の画面上での位置を示し、第3図(b)は
文字信号(T V Y M)に対応する受像管2の画面
上での位置を示し、第3図(C)はハーフトーン信号S
3に対応する受像管2の画面上での位置を示している。
The shaded area in FIG. 3(a) shows the position of the picture tube 2 on the screen corresponding to the halftone signal Sl, and FIG. 3(b) shows the position of the picture tube 2 on the screen corresponding to the character signal (T V Y M). Figure 3 (C) shows the position of the halftone signal S on the screen.
3 shows the position of the picture tube 2 on the screen corresponding to 3.

(発明の効果) 以」二のように、本発明によれば画面上の文字周辺の輝
度を下げるためのハーフトーン信号を文字信号のブラン
キングパルス出力期間中に前記自動輝度制限回路に与え
る回路手段を設け、テレビジョン受像機に備えられてい
る自動輝度制限回路が前記回路手段からのハーフトーン
信号を前記ビーム電流制限信号として前記映像信号処理
回路に出力するようにしたので、文字周辺の輝度を下げ
るためのハーフトーン信号処理回路としては通常の自動
輝度制限回路をそのまま利用し、前記回路手段としては
ハーフトーン信号をブランキングパルス出力期間中に自
動輝度制限回路に出力するだけで済み、したがって回路
構成が極めて簡単になる。
(Effects of the Invention) As described in item 2 below, according to the present invention, a circuit provides a halftone signal for reducing the brightness around characters on the screen to the automatic brightness limiting circuit during the blanking pulse output period of the character signal. The automatic brightness limiting circuit provided in the television receiver outputs the halftone signal from the circuit means as the beam current limiting signal to the video signal processing circuit, so that the brightness around the characters can be reduced. As a halftone signal processing circuit for lowering the brightness, a normal automatic brightness limiting circuit is used as is, and the circuit means only needs to output the halftone signal to the automatic brightness limiting circuit during the blanking pulse output period. The circuit configuration becomes extremely simple.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の回路図、第2図は一水平走
査期間中における各信号のタイムチャート1.第3図は
画面上の文字の表示の説明に供する図である。 lは映像信号処理回路、2は受像管、6は自動輝度制限
回路、2はビーム電流制限回路、12は回路手段、13
.14は入力部、Sl、S3はハ−フトーン信号、S2
はブランキングパルス、S3、S4は映像信号。
FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a time chart of each signal during one horizontal scanning period. FIG. 3 is a diagram for explaining the display of characters on the screen. 1 is a video signal processing circuit, 2 is a picture tube, 6 is an automatic brightness limiting circuit, 2 is a beam current limiting circuit, 12 is a circuit means, 13
.. 14 is an input section, Sl, S3 is a halftone signal, S2
is a blanking pulse, and S3 and S4 are video signals.

Claims (1)

【特許請求の範囲】[Claims] (1)受像管アノード電流変化の検出値に応じて映像信
号処理回路に対して、該受像管のビーム電流を規定値以
下に制限するビーム電流制限信号を出力して輝度を自動
的に制限する自動輝度制限回路と、 画面上の文字周辺の輝度を下げるためのハーフトーン信
号を文字信号のブランキングパルス出力期間中に前記自
動輝度制限回路に与える回路手段とを設け、 前記自動輝度制限回路は前記回路手段からのハーフトー
ン信号を前記ビーム電流制限信号として前記映像信号処
理回路に出力することを特徴とするテレビジョン受像機
におけるハーフトーン信号処理回路。
(1) Automatically limit the brightness by outputting a beam current limiting signal that limits the beam current of the picture tube to a specified value or less to the video signal processing circuit according to the detected value of the change in the picture tube anode current. an automatic brightness limiting circuit; and circuit means for applying a halftone signal for reducing brightness around characters on the screen to the automatic brightness limiting circuit during a blanking pulse output period of the character signal, the automatic brightness limiting circuit comprising: A halftone signal processing circuit for a television receiver, characterized in that the halftone signal from the circuit means is output to the video signal processing circuit as the beam current limiting signal.
JP60112697A 1985-05-24 1985-05-24 Halftone signal processing circuit in television receiver Pending JPS61269573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60112697A JPS61269573A (en) 1985-05-24 1985-05-24 Halftone signal processing circuit in television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60112697A JPS61269573A (en) 1985-05-24 1985-05-24 Halftone signal processing circuit in television receiver

Publications (1)

Publication Number Publication Date
JPS61269573A true JPS61269573A (en) 1986-11-28

Family

ID=14593225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60112697A Pending JPS61269573A (en) 1985-05-24 1985-05-24 Halftone signal processing circuit in television receiver

Country Status (1)

Country Link
JP (1) JPS61269573A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5631711A (en) * 1994-06-09 1997-05-20 Samsung Electronics Co., Ltd. Background-picture compensating circuit using on-screen display signals

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5631711A (en) * 1994-06-09 1997-05-20 Samsung Electronics Co., Ltd. Background-picture compensating circuit using on-screen display signals
DE4432175B4 (en) * 1994-06-09 2006-06-29 Samsung Electronics Co., Ltd., Suwon Video signal processor for OSD signals

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