JPS61265911A - Detection circuit for automatic gain control - Google Patents

Abstract

PURPOSE:To obtain full wave rectification with small sized circuit constitution by forming two differential amplifiers with specific constitution and connecting them in parallel. CONSTITUTION:An input signal vd is impressed between input nodes N1 and N2. The input node N1 is connected to a base of transistors (TRs) Q11, Q16-Q18 and the input node N2 is connected to a base of TRs Q15, Q12-Q14. The emitter of the TRs Q11-Q14 is grounded via the 1st constant current source 11 and the emitter of the TRs Q15-Q18 is grounded via the 2nd constant current source 12. The amplifier with the constitution above is a differential amplifier circuit composing of TRs Q31, Q32 and since the gain G depends on a current flowing TRs Q33, Q34, the gain is adjusted by controlling the rate of the current of the TRs Q33, Q34.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an automatic gain control detection circuit that detects an original signal amplitude level in an automatic gain control (hereinafter referred to as AGC) circuit.

[Technical background of the invention]

Generally, electronic circuits have performance limitations, and the amplitude of the input signal must be kept within a certain range. In this way, there is an AGC circuit as a circuit that controls the input signal amplitude within a certain range.

FIG. 9 is a block diagram of the AGC circuit. The input signal is
The signal is supplied to a variable gain amplifier circuit 11 and the gain is controlled. The output of the variable gain amplifier circuit 11 is further supplied to the AGC detection circuit 1.
2. The AGC detection circuit 12 outputs a DC voltage or current depending on the amplitude of the signal input to this circuit, and applies this to the gain control terminal of the variable gain amplifier circuit 11. This provides an AGC operation in which the gain is lowered when the output amplitude of the variable gain amplifier circuit 11 is large, and the gain is increased when the output amplitude width is small.

The performance required of the AGC detection circuit 12 is to obtain a signal amplitude value, which can be obtained by rectifying the signal and passing it through a low-pass filter. Analysis and Design uses a diode as a rectifier.
Off Analog Integrate, de Sarkiy) (
Analysis and Design of Ana
An example of this is the one shown in pages 556 to 5sx-e of ``log Integrated C1rcuit'', in which the diode does not turn on unless there is an input of approximately O.SV or more. To compensate for this, an amplifier or the like is required. Therefore, for small signal AGC detection,
Since an additional circuit such as an amplifier is required, it is disadvantageous to integrate the circuit in view of the power consumption of two circuits.

Conventionally, there has been a circuit as shown in FIG. 10 as this type of circuit. The bias voltage (vB2) is set so that the transistor Q1 is turned off when there is no input signal. When the input signal is drifting in the negative direction, transistor Q
The transistor Q1 remains off, and when the input signal is in the positive direction VC, the transistor Q1 is turned on. Therefore, the input signal transmitted between the emitter of transistor Q3, the base and emitter of transistor Q2, and the base of transistor Q becomes a half-wave rectified signal as shown in FIG. 11 when output, and its amplitude is , varies depending on the amplitude of the input signal.

However, this circuit has drawbacks as described below.

(1) Since the output is half-wave rectified, the efficiency of rectification is lower than that of full-wave rectification. Therefore, in order to obtain the same DC component as full-wave rectification, a DC amplifier is required at the next stage. Furthermore, if a DC amplifier is not used, it is necessary to increase the output amplitude of the AGO detection circuit in advance, which necessitates increasing the power supply voltage, and especially when handling high frequencies, other peripheral circuits must be This can cause oscillation where signals tend to leak to the circuit and damage the characteristics of peripheral circuits.

(2) Furthermore, since a coupling capacitor is used on the input side, if it is integrated into an integrated circuit, it is necessary to provide an input bin and externally connect the capacitor.

(9) If you try to incorporate a capacitor into an integrated circuit, a large area will be required to form the capacitor.

As explained above, the conventional AGC circuit has a circuit size,
There are many disadvantageous factors to integrated circuits in terms of power consumption, frequency used, number of pins, etc. [Objective of the Invention] This invention was made in view of the above circumstances. It is an object of the present invention to provide a detection circuit for automatic gain control that has advantages such as efficient rectification characteristics, no restrictions on operating frequencies, low voltage operation, and low power consumption.

[Summary of the invention]

This invention is the ninth to achieve the above object;
As shown in the figure, transistors Q with the same characteristics and polarity
ll~Q14. Q15 to Q1& are prepared, the transistor Qll and the transistors Q12 to Q14 form a first differential amplifier, and the transistor Q15 and the transistor Q1
6 to Q1B form a second differential amplifier. and the first
．． By connecting the second differential amplifier in parallel, the characteristics shown in FIG. 3 are obtained, and full-wave rectification can be obtained with a small-scale circuit configuration.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which the input node Nl
, N2, an input signal vd is applied between them.

Input node N1 is connected to the base of transistor Qll and transistors Q16 . Q17. Q1B is connected to the base, and input node N2 is connected to the base of transistor Q15 and transistors Q12°Q13 . Connected to the base of Q14.

The emitters of the transistors Qll-Q14 are grounded via the first constant current source 11, and the emitters of the transistors Q15-Q1
The emitter of & is grounded via the second constant current source 12.

The collectors of transistors Qll, Q15 are connected to output node N3, and transistors Q12-Q14 . Q16
The collector of ~Ql& is connected to output node N4.

One embodiment of the present invention is constructed as described above.

Here, it is assumed that the current of the constant current source 11.12 is 11.12, and 10-11=12. In addition, the current of output nodes N3 and N4 is
The current flowing only in the collector of 15, transistor Qx
;t, Q13tQ14O current flowing through the common collector is 1
6. 17. The current flowing only to the collector of transistor Q15. Transistor Q ” e Q 17 e Q 1
Let the current flowing through the common collector of B be 18.

If you set it as above, 13-i5+17...(1) 14rits+t
s...(2) holds true.

Just in case, the characteristics of 15#L6 for input signal vd and 17. for input signal vd. The characteristics of [8] are shown in FIG. 2 (&) (b). The emitter-coupled differential switch circuit switches when the input signal is approximately 4 VT.

However, vT- is the Deltzman constant, T is the absolute temperature, and q is the electric charge.

In this circuit, when vd=aQ, transistor Qll~
Since the same current flows through each Q14, when the voltage is -4V, transistor Qll is on and transistors Q12 to Q14 are off, so 15x1l-
10 16!0 vd--4vT, transistor Qll is off%
Since transistors Q12 to Q14 are turned on, 15=O i6asil++mi.

Therefore, the characteristics shown in FIG. 2 (&) are obtained. If we look at the operation of transistors Q15 to Q1B in the same manner as above, we will see the characteristics shown in No. 22).

Therefore, input signal vd vs. current 13. The characteristic of i4 is (1
) From equation (2), it can be found graphically as shown in Figure 3. That is, the characteristics shown in FIG. 3 can be obtained depending on the ratio of the number of transistors that operate differentially.

The input/output characteristics of the above circuit when a sine wave signal is input as the input signal MAd are as shown in FIG. According to this circuit, it is possible to obtain a full-wave rectified output.

As described above, according to the present invention, a full-wave rectified output can be obtained with a small-scale circuit configuration. Since the output is in the form of a current, it is easy to fold back with a current mirror circuit, it is easy to lead the output, and it is also possible to reduce the voltage. Furthermore, the input side can be directly connected to the previous stage,
A coupling capacitor for input is not required, and even if integrated, its pin is not required.

Although the above embodiment is constructed by combining transistors with the same characteristics, in an integrated circuit, as shown in FIG.
Transistor Q21 may be used in place of transistors Q12 to Q14, and transistor Q22 may be used in place of transistors Q15 to Q1g. Transistor Q21, Q
22, the amount of current is adjusted depending on the emitter area. With this configuration, the circuit scale can be further reduced.

In FIG. 1, the number of transistors is described as eight, but the number is not limited to this and may be n. When the number of input signals is n, the characteristics of the input signal d versus the output current 13.14 are as follows:
The result will be as shown in the figure.

FIG. 7 shows an example of a circuit using the above AGC detection circuit. Since the AGC detection circuit shown in FIG. 5 is used, the same parts as in FIG. 5 are given the same reference numerals. On the other hand, transistors Q31 to Qj4, diodes DI and D
2. Resistors R1 to R8 and the like constitute a variable gain amplifier circuit.

That is, input signal town. is applied to the base of transistor 931°C32. Transistor Q31, C3; l
The collector of resistor 81. Bias power supply v via R2
111 and output nodes Nil, N1
2. The emitters of transistors Q31 and C32 are commonly connected to the collector of transistor Q33 through resistors RJ and R4, respectively.

The emitters of the transistors Q31 and C32 are connected to the collector of the transistor Q34 via variable conmecance diodes Di and D2, respectively.

Transistor Q33. The emitter of Q34 is grounded via the constant current source 20 after passing through resistors R5 and R6, respectively.

Here, the AGC control voltage is applied to the base of the transistor Q33. That is, the output node N3 of the AGC detection circuit is connected to the collector of the transistor Q24 that constitutes the current mirror circuit 22. The output of the current mirror circuit 22 is derived from the collector of the transistor Q23, and is subjected to a level shift by the constant current source 21. The resistor R8 and the capacitor C constitute a low-pass filter and convert current into voltage. Also,
Bias voltage v12 is applied to the base of transistor Q34 via resistor R7, which has the same size as resistor R8. Therefore, the output current (A
When the GC current changes, the proportion of current flowing through the transistors Q33 and C34 changes, and the gain of the amplifier circuit is varied.

The above amplifier circuit is basically a differential amplifier circuit of transistors Q31 and C32, with a gain G of 1 and lC5 as a current flowing through the diode D1.

Here, the gain G is the transistor Q33. Since it depends on the current flowing through Q34, the gain can be adjusted by controlling the ratio of currents in transistors Q33 and QJ4, as described above.

FIG. 8 shows the base potential of the transistor QjJ,
It shows the relationship between the output amplitude mad (input signal of the AGC detection circuit). In this way, when the output amplitude vtl is small, the gain control voltage (base potential of transistor Q33) is
, 2, most of the current of the stain current source 20, which is smaller than 2, flows through transistor QJ4. This transistor +14ta
The current further flows through the diodes Di and D2, and -(
--L), and the gain G of the circuit is gm5'
m4 G RJ/CR3/') m5 Σg 5-R1 It works to increase. On the contrary, when the output amplitude vd is small, it works to lower the gain. Not limited by frequency,
Efficient AGC detection can be obtained. In addition, the input can be directly connected to direct current (no coupling capacitor is required), which is advantageous for integrated circuit implementation.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a characteristic diagram of the circuit of FIG. 1, and FIG. 3 is a characteristic diagram of the circuit of FIG. 1.
FIG. 4 is a dynamic characteristic diagram of the circuit shown in FIG. 1, FIG. 5 is a circuit diagram showing another embodiment of the invention, FIG. 6 is a general characteristic diagram of another embodiment of the invention, and FIG. A circuit diagram showing an example of the use of the present invention, FIG. 8 is an operating characteristic diagram of the circuit in FIG. 7, FIG. 9 is a diagram showing an automatic gain control circuit, FIG. 10 is a diagram showing a conventional detection circuit, and FIG. The figure is an output waveform diagram of the circuit of FIG. 10. Qll~Qxs, C21, Q2x...transistors. Applicant's representative Patent attorney Takehiko Suzue Figure 1 (a) (b) Figure 2 Figure 5 Figure 6 119 Figure 10 Figure 1111

Claims (2)

[Claims] (1) Among 2n (n is an integer of 2 or more) transistors Q1 to Q2n of the same polarity, the emitters of the first to nth transistors are commonly connected to the first current source, and the
The emitters of the 2nth transistors are commonly connected to a second current source, the bases of the 1st and n+2 to 2nth transistors are commonly connected to form a first input node, and the The bases of the (n+1)th transistor are commonly connected to form a second input node;
A detection circuit for automatic gain control having a configuration in which the collector of the +1 transistor forms a first output node, and the collectors of the second to nth and (n+2) to 2nth transistors form a second output node. (2) The automatic gain according to claim 1, wherein the emitter areas of the n-th and 2n-th transistors are n-1 times the emitter areas of the first and n+1-th transistors. Control detection circuit.