JPS61265817A - Baking method - Google Patents

Abstract

PURPOSE:To improve aligning accuracy, which decreases throughput, by performing TTL measurement of the deviating amount in global alignment under the state resist is not applied to the first wafer, correcting the step feeding amount of the second wafer based on the measured value, and globally performing the alignment. CONSTITUTION:With respect to the first wafer 1, on which photoresist is not applied, the coordinates of the position, e.g., an alignment mark, of the reference point of the wafer are read at off-axis 2. The distance of a base line is measured by a laser interferometer and the stage sending of each shot to the reference position is performed 3. At this time, the measurement of deviation amount by a TTL method 4 is performed at every shot position. A map of the deviation amount is prepared 5. For the second wafer and thereafter 7, the wafers, on which the resist is applied, are used, and actual baking is carried out. At this time, after the reading and off-axis alignment of coordinates of the position of the reference point 8, correction based on the map of deviation prepared for the first wafer is added to the distance of stage sending based on the laser interferometer 9. Then the stage sending for each shot is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention provides a method for printing, particularly a step-and-repeat semiconductor printing apparatus, which achieves both speed and accuracy when printing a reticle pattern on a semiconductor wafer. The intended burning is related to the method.

[Summary] The present invention is a step-and-repeat semiconductor printing method in which a reticle pattern is printed on a wafer using a device, in which the first wafer in a group of wafers is sequentially sent step-by-step without applying resist. Meanwhile, the amount of deviation of each shot position with respect to the pattern formed in the preceding process is measured in TTL, and the second and subsequent wafers are fed stepwise toward the corrected shot position based on the above measurement value. This realizes the five-speed performance of so-called global alignment and the high accuracy close to so-called die-pie-die alignment.

[The day before the invention] Conventional step-and-repeat semiconductor printing equipment uses a method to detect the relative position of the reticle and wafer.
An off-axis type and a TTL-die-pie-die type are known.

In the off-axis type, as shown in Figure 2, after reading the reference mark, the stage is moved based on the distance from the baseline to each chip and the baseline distance measurement value of the laser interferometer. Ta. That is, it is global alignment. Therefore, although this method requires less time for printing, it has disadvantages such as stage accuracy, fluctuations in baseline distance, problems inherent to the dirt removal model when used in combination with other models, and the inability to correct misalignment due to wafer deformation. Ta.

On the other hand, in the TTL-die-pie-die method, the third
As shown in the figure, alignment (die
Although it is possible to deal with variations in stage accuracy and baseline distance, it takes time to align each shot, and uneven photoresist coating affects alignment accuracy. There was an inconvenience.

[Object of the invention] The object of the present invention is to solve the problems of the conventional type described above,
Step-and-repeat semiconductor printing is a method of printing a reticle pattern using a device on a group of wafers that have undergone at least one pattern forming process, and is a compromise between global alignment and die-pie-die alignment. The objective is to simultaneously improve overlay accuracy and throughput based on the idea of eliminating the drawbacks and at the same time taking advantage of the advantages of both methods.

[Description of Examples] Hereinafter, the present invention will be described in more detail based on Examples.

FIG. 1 shows the operation flow of a semiconductor printing apparatus to which a printing method according to an embodiment of the present invention is applied.

This method has an off-axis optical system and a TTL optical system for position detection, and does not require a conventional printing device that uses a central processing unit (CPU) such as a microprocessor to control alignment and exposure operations. If so, the semiconductor printing can be carried out without modifying the hardware configuration by simply changing the control program of the CPU, so a description of the hardware configuration of the semiconductor printing apparatus will be omitted here.

Next, referring to FIG. 1, the operation of the above-described printing apparatus will be explained.

Before performing this baking using a printing device, wafers of the same lot are stored in the same cassette in advance. At this time, the first wafer in the cassette should not be coated with photoresist. In addition, the step feed angle, etc. are also set in advance.In the printing process, the reference position of each shot is calculated in the printing apparatus based on the step feed height, shot layout, wafer rise, etc.

In the printing apparatus, this cassette is set at a predetermined position, and when a command to start printing is given, the first wafer is first taken out from the cassette and transported to a predetermined position under the off-axis optical system. Next, after reading off-axis position coordinates of a reference point, for example, an alignment mark, on the wafer, the stage is moved (step feed) to the reference position for each shot while measuring the baseline distance using a laser interferometer. At this time, a TTL method deviation m is measured for each shot position sent, and a deviation amount map is created. This amount of deviation can be measured by measuring the amount of deviation between the alignment marks on the reticle and the wafer, or by measuring the amount of deviation in the coordinate position of a predetermined pattern on the wafer with respect to a predetermined standard, such as the central axis of a projection lens. Any method may be used.

For the second and subsequent wafers, actual baking is performed using wafers coated with resist. At this time, the stage is sent to each shot while adding correction based on the shift map created for the first wafer to the distance to which the position coordinates of the reference point are sent based on the laser interferometer after off-axis alignment.

In this way, off-axis alignment can be achieved by measuring the amount of off-axis alignment deviation for the first wafer, and performing off-axis alignment for the second and subsequent wafers while correcting the step feed m based on that value.・Alignment accuracy is improved compared to the alignment method, and
There is also a slight decrease in throughput. This is because by correcting the step feed amount using the TTL measurement value, it is possible to correct baseline fluctuations, stage quirks, and quirks of each model when multiple models are used in combination. Furthermore, by using a wafer without resist coating on the first sheet, the influence of coating unevenness on TTL measurement is eliminated, and the accuracy of TTL measurement is improved.

[Application Examples of the Invention] Note that the present invention is not limited to the above-described embodiments, and can be implemented with appropriate modifications. For example, in the above embodiment, off-axis and TTL are used as the wafer position detection system.
Although a case has been described in which both are provided, the present invention can be applied even to a case where only TTL is provided. In this case, instead of off-axis reference point detection and off-axis alignment described above,
TTL position measurement and TTL alignment may be performed at a shot position or one or more arbitrary shot positions.

[Effects of the Invention] As described above, according to the present invention, the deviation base of global alignment is measured in TTL without applying resist to the first wafer, and the step feed amount for the second and subsequent wafers is calculated based on that value. Since global alignment is performed while correcting, the following effects are achieved. That is, (1) Since a wafer without resist coating is used as the first wafer, alignment accuracy is not affected by coating unevenness.

In other words, the accuracy of detecting the amount of deviation is improved.

■Since all shot positions are corrected using TTL measurement values,
Baseline fluctuations can be corrected.

■Also, if the reproducibility of the stage is good, it is possible to correct the stage's quirks.

■Furthermore, when using multiple types of machines, the unique habits of each machine can be read from the first wafer. Therefore, correction of these habits is also possible. , ■ Since the second and subsequent sheets are aligned globally, throughput is improved compared to the die-pie-die alignment method.

[Brief explanation of drawings]

FIG. 1 is an operational flowchart of a semiconductor printing apparatus according to an embodiment of the present invention, and FIGS. 2 and 3 are operational flowcharts of a conventional semiconductor printing apparatus, respectively.

Claims (1)

[Claims] 1. When baking a group of wafers after the second mask using a step-and-repeat baking device,
Using a wafer with no resist coated on the first sheet, step feeding is performed to each reference shot position, and for each shot, the amount of deviation between the reference position of the shot and the pattern formed in the preceding process is calculated. A baking method characterized by measuring TTL and storing it, and for the second and subsequent wafers, the stage is sent to each printing position while making corrections based on the stored measurement values. 2. The printing method according to claim 1, wherein the reference position of each shot is calculated based on a step feed amount set in advance. 3. Claim 1 or 2, wherein the TTL measurement measures the amount of deviation between the alignment mark formed on the wafer in the preceding process and the alignment mark on the reticle in the current process. Baking method described in section.