JPS61264909A - Schmitt trigger circuit - Google Patents

Schmitt trigger circuit

Info

Publication number
JPS61264909A
JPS61264909A JP60107625A JP10762585A JPS61264909A JP S61264909 A JPS61264909 A JP S61264909A JP 60107625 A JP60107625 A JP 60107625A JP 10762585 A JP10762585 A JP 10762585A JP S61264909 A JPS61264909 A JP S61264909A
Authority
JP
Japan
Prior art keywords
current
temperature
resistor
equal
flows
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60107625A
Other languages
Japanese (ja)
Other versions
JPH0317415B2 (en
Inventor
Yoshihiro Sakai
坂井 良広
Fumio Ogawa
小川 富美雄
Koichi Saito
公一 斉藤
Fujito Fukutome
福留 不二燈
Shinichi Yonemoto
伸一 米本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60107625A priority Critical patent/JPS61264909A/en
Publication of JPS61264909A publication Critical patent/JPS61264909A/en
Publication of JPH0317415B2 publication Critical patent/JPH0317415B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/2893Bistables with hysteresis, e.g. Schmitt trigger

Abstract

PURPOSE:To compensate the effect of a temperature characteristic of a resistive element by supplying a current from a constant current source having a characteristic entirely opposite to a temperature characteristic of a resistor setting a trigger level to an input voltage rise and a trigger level to an input voltage decrease. CONSTITUTION:TRs 21, 22 constitute a level shift-inverse level shift, a reference voltage VB equal to a band gap reference voltage VR is generated at the emitter of the TR 22 while each base-emitter voltage is cancelled and a current IB flows to a resistor 42. Nearly the same current IC as the current IB flows to the collector of the TR 22 and the current IC flows the same current ID equal to the current IC at the collector side of a TR 24 by a current mirror circuit comprising TRs 23, 24. The current ID flows currents I1-I3 each equal to the current ID by using the current mirror circuit comprising TRs 25, 27, 30 and 32. Thus, the current IB, I1-I3 are all equal. Thus, the temperature dependance of the trigger level is compensated and the waveform shaping circuit or the like is operated stably.

Description

【発明の詳細な説明】 〔概要〕 動作電流を定電流源によって制御するシュミットトリガ
回路に於いて、抵抗の温度特性を定電流源の温度特性に
より補償して安定なトリガレベルを得る。
DETAILED DESCRIPTION OF THE INVENTION [Summary] In a Schmitt trigger circuit whose operating current is controlled by a constant current source, a stable trigger level is obtained by compensating the temperature characteristics of the resistance with the temperature characteristics of the constant current source.

〔産業上の利用分野〕[Industrial application field]

本発明はシュミットトリガ回路に係り、特にトリガレベ
ルの温度変動を補償する回路に関するものである。
The present invention relates to a Schmitt trigger circuit, and more particularly to a circuit that compensates for temperature fluctuations in trigger level.

従来のシュミットトリガ回路のトリガレベルは温度変動
により変化する欠点があり、此の改善が強く求められて
いた。
Conventional Schmitt trigger circuits have the disadvantage that the trigger level changes due to temperature fluctuations, and there has been a strong demand for improvement.

〔従来の技術〕[Conventional technology]

第3図(a)は従来の定電流源により駆動されるシュミ
ットトリガ回路の一例を示す図、第3図(blは第3図
(a)の回路の動作説明図である。
FIG. 3(a) is a diagram showing an example of a conventional Schmitt trigger circuit driven by a constant current source, and FIG. 3 (bl is an explanatory diagram of the operation of the circuit in FIG. 3(a)).

図中、1.3.4、及び7は夫々トランジスタ、2°、
5、及び6は夫々抵抗、8.9、及び10は夫々定電流
源である。尚以下全図を通じ同一記号は同一対象物を表
す。
In the figure, 1.3.4 and 7 are transistors, 2°,
5 and 6 are resistors, respectively, and 8.9 and 10 are constant current sources, respectively. The same symbols represent the same objects throughout all the figures below.

トランジスタ1.3.4、及び7は同等のトランジスタ
で、定電流源8の出力電流をIl、定電流源9の出力電
流をI2、定電流源10の出力電流をI3とする。
The transistors 1, 3, 4, and 7 are equivalent transistors, and the output current of the constant current source 8 is Il, the output current of the constant current source 9 is I2, and the output current of the constant current source 10 is I3.

今入力端子INに第3図(b)に示す入力信号■。Now, the input signal ■ shown in FIG. 3(b) is input to the input terminal IN.

を印加する。入力信号V、がトリガレベルを通過する毎
に出力信号V、は反転する。
Apply. The output signal V, is inverted every time the input signal V, passes the trigger level.

此の場合入力信号上昇時のトリガレベルvTAと入力信
号下降時のトリガレベルVtBは夫々次式で与えられる
In this case, the trigger level vTA when the input signal rises and the trigger level VtB when the input signal falls are given by the following equations, respectively.

■アミ”−It Rz −(VsEofi−Vmt−)
  ・(1)Vtm=−1s R+   It Rz+
(Vlloa  VIEs )  ’ (2)但し、V
ll!:。7はトランジスタが導通状態になっている時
のベース・エミッタ間電圧、VIEsはトランジスタが
遮断状態から導通状態へ移行する時のベース・エミッタ
間電圧、R1は抵抗2の抵抗値、R2は抵抗5の抵抗値
である。
■Ami”-It Rz-(VsEofi-Vmt-)
・(1) Vtm=-1s R+ It Rz+
(Vlloa VIEs) ' (2) However, V
ll! :. 7 is the base-emitter voltage when the transistor is in a conductive state, VIEs is the base-emitter voltage when the transistor transitions from a cut-off state to a conductive state, R1 is the resistance value of resistor 2, and R2 is the resistor 5 is the resistance value of

電圧V lfO+sと電圧v IEsの差は一定値であ
り、約0.1 Vである。従って(1)式、(2)式は
VtA霧−IzRz  O,1(3) Vtm=  I 3. R+ −It Rz + 00
1(4)となる。
The difference between the voltage V lfO+s and the voltage v IEs is a constant value, about 0.1 V. Therefore, equations (1) and (2) are VtA fog - IzRz O, 1 (3) Vtm = I 3. R+ −It Rz + 00
1(4).

(3)式、及び(4)式から判る様にトリガレベルは動
作電流1z、I2、抵抗2〔RI〕、抵抗5〔R2〕の
値により決まる。
As can be seen from equations (3) and (4), the trigger level is determined by the values of the operating current 1z, I2, resistor 2 [RI], and resistor 5 [R2].

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従って温度が変化した場合、抵抗2 [R1)、抵抗5
(R2)は夫々其の温度係数に応じて其の抵抗値が変化
する。一方動作電流1.、Lは上記従来回路では温度の
如何に拘わらず一定の電流を供給している。
Therefore, when the temperature changes, resistance 2 [R1), resistance 5
The resistance value of (R2) changes depending on its temperature coefficient. On the other hand, operating current 1. , L supply a constant current regardless of the temperature in the conventional circuit described above.

此の為温度変化によりトリガレベルvTA1及びV□が
変動すると云う欠点があった。
For this reason, there is a drawback that the trigger levels vTA1 and V□ fluctuate due to temperature changes.

本発明の目的は定電流源に温度特性を賦与して抵抗素子
の温度特性の影響を補償出来るシュミットトリガ回路を
提供することである。
An object of the present invention is to provide a Schmitt trigger circuit that can compensate for the influence of the temperature characteristics of a resistance element by imparting temperature characteristics to a constant current source.

〔問題点を解決するための手段〕[Means for solving problems]

第1図に示す様に本発明に依るシュミットトリガ回路の
原理図では、温度制御型定電流源11から電流を供給し
、温度制御型定電流源11は抵抗2、抵抗5の温度特性
と逆の温度特性を持たせる。尚抵抗2、抵抗5の温度特
性は同一とする。
As shown in FIG. 1, in the principle diagram of the Schmitt trigger circuit according to the present invention, current is supplied from a temperature-controlled constant current source 11, and the temperature-controlled constant current source 11 has opposite temperature characteristics to the resistors 2 and 5. temperature characteristics. It is assumed that the temperature characteristics of resistor 2 and resistor 5 are the same.

全抵抗2、抵抗5の温度係数をαとし、成る温度Tに於
ける抵抗2の抵抗値をRol、抵抗5の抵抗値をR02
、 対応する電流値をI。ts Iozとする。
The temperature coefficient of the total resistance 2 and resistance 5 is α, the resistance value of resistance 2 at the temperature T is Rol, and the resistance value of resistance 5 is R02.
, the corresponding current value I. ts Ioz.

温度がTからT゛へ変化した時の抵抗値を夫々R1”、
Rzo  とすると、 R1′=Ro+ (i+α(T’−T))  (5)R
z ’ =Rot (1+α(T’−T))  (6)
一方温度制御型定電流源11の温度特性は抵抗2、抵抗
5の温度特性と逆の特性であるので、■。2は温度Tの
時抵抗5に流れる電流、IO3は温度Tの時抵抗2に流
れる電流、1% は温度T′の時抵抗5に流れる電流、
1.1 は温度T゛の時抵抗2に流れる電流である。
The resistance value when the temperature changes from T to T is R1'',
Rzo, R1'=Ro+ (i+α(T'-T)) (5) R
z' = Rot (1+α(T'-T)) (6)
On the other hand, since the temperature characteristics of the temperature-controlled constant current source 11 are opposite to those of the resistors 2 and 5, (2). 2 is the current flowing through resistor 5 at temperature T, IO3 is the current flowing through resistor 2 at temperature T, 1% is the current flowing through resistor 5 at temperature T',
1.1 is the current flowing through the resistor 2 when the temperature is T'.

此の時入力電圧上昇に対するトリガレベルに就いて見る
と温度Tの場合は、 VtA”−IozRoz  0.1    ・ ・ ・
 ・(9)であり、温度T゛の場合は、 VIA’ =  Iz ’ Rz ’  0.1 ” 
’ (10)となる。(10)式に(6)式、(7)式
を代入すると、VIA’  = −I otRot  
O,1・・・・(11)従って、VtA””V’rA 
 ・・・・・・・(12)即ち、トリガレベルVtaは
温度に関係なく一定である。
In this case, when looking at the trigger level for the input voltage rise, in the case of temperature T, VtA''-IozRoz 0.1 ・ ・ ・
・(9), and in the case of temperature T゛, VIA' = Iz ' Rz '0.1''
' (10). Substituting equations (6) and (7) into equation (10), VIA' = -IotRot
O, 1... (11) Therefore, VtA""V'rA
(12) That is, the trigger level Vta is constant regardless of temperature.

同様に入力電圧下降に対するトリガレベルに就いて見る
と温度Tの場合は、 Vryr= −I ozRo+  I ozRoz+ 
0.1 ・・(13)となり、温度T°の場合は、 VTI’  =−I3 ’ R+ ’ −It ’ R
z ’  +0.1・・・・・(14) (14)式に(5)式、(6)式、(7)式、(8)式
を代入すると、 7丁8° ””    I  03R(II    I
  ozRoz+ 0.1従ってVTm’=VTl  
  ・・−・・−(15)となり、同様にトリガレベル
VTBは温度に関係なく一定となる。
Similarly, looking at the trigger level for input voltage drop, in the case of temperature T, Vryr= -I ozRo+ I ozRoz+
0.1...(13), and if the temperature is T°, VTI' = -I3' R+ '-It' R
z' +0.1...(14) Substituting equations (5), (6), (7), and (8) into equation (14), we get 7 to 8° "" I 03R( II I
ozRoz+ 0.1 Therefore VTm'=VTl
(15) Similarly, the trigger level VTB remains constant regardless of the temperature.

〔作用〕[Effect]

本発明に依ると入力電圧上昇に対するトリガレベル、及
び入力電圧下降に対するトリガレベルを設定する抵抗の
温度特性と全く逆な特性を有する定電流源から電流を供
給することにより両トリガレベルが一定となる。
According to the present invention, both trigger levels are kept constant by supplying current from a constant current source that has characteristics completely opposite to the temperature characteristics of the resistor that sets the trigger level for input voltage increases and the trigger level for input voltage decreases. .

〔実施例〕〔Example〕

第2図は本発明に依るシュミットトリガ回路の一実施例
を示す図である。
FIG. 2 is a diagram showing one embodiment of a Schmitt trigger circuit according to the present invention.

図中、21.22.25〜32は夫々NPN)ランジス
タ、23.24はPNPトランジスタ、41〜49は夫
々抵抗、50はバンドギャップ基準電圧源(BGR)で
ある。
In the figure, 21, 22, 25-32 are NPN transistors, 23, 24 are PNP transistors, 41-49 are resistors, and 50 is a bandgap reference voltage source (BGR).

以下図に従って本発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.

トランジスタ23.24の一対、及びトランジスタ25
.27.30.32の一組は夫々間等のトランジスタで
あり、カレントミラー回路を構成している。
A pair of transistors 23, 24, and a transistor 25
.. A pair of transistors 27, 30, and 32 are intervening transistors, respectively, and constitute a current mirror circuit.

又抵抗41〜49の内、抵抗42.45.46は同等の
温度係数を持ち、抵抗43.44.47.49は抵抗値
、温度係数が相等しい一組である。
Also, among the resistors 41 to 49, resistors 42, 45, and 46 have the same temperature coefficient, and resistors 43, 44, 47, and 49 are a pair having the same resistance value and temperature coefficient.

バンドギャップ基準電圧源50は温度変動によらず其の
両端に一定電圧vRを生ずる回路である。
Bandgap reference voltage source 50 is a circuit that generates a constant voltage vR across it regardless of temperature fluctuations.

ダイオード接続になっているトランジスタ21とトラン
ジスタ22はレベルシフト−逆レベルシフトを構成し、
互いのベース・エミッタ間電圧が打ち消し合ってトラン
ジスタ22のエミッタ側にバンドギャップ基準電圧■7
と等しい基準電圧■8を発生する。此の結果抵抗42に
は電流I、が流れる。
Transistor 21 and transistor 22, which are diode-connected, constitute a level shift-inverse level shift,
The base-emitter voltages cancel each other out, and a bandgap reference voltage ■7 is applied to the emitter side of the transistor 22.
Generates a reference voltage ■8 equal to . As a result, a current I flows through the resistor 42.

■、=vB/R2=v、I/R2・・・・(20)但し
、R2は抵抗42の抵抗値である。
(2) = vB/R2 = v, I/R2 (20) where R2 is the resistance value of the resistor 42.

トランジスタ22のコレクタ側にも電流■3と略同じ電
流■。が流れ、電流1cはトランジスタ23.24から
なるカレントミラー回路によりトランジスタ24のコレ
クタ側に電流I、と等しい値の電流I、を流す。
The collector side of the transistor 22 also has a current ■ which is approximately the same as the current ■3. flows, and the current 1c causes a current I having a value equal to the current I to flow to the collector side of the transistor 24 by a current mirror circuit consisting of transistors 23 and 24.

電流IQは更にトランジスタ25.27.30.32の
カレントミラー回路によって伝達され、電流■。
The current IQ is further transmitted by a current mirror circuit of transistors 25, 27, 30, and 32, resulting in a current ■.

と等しい値の電流11、I2、I3を流す。Flow currents 11, I2, and I3 with values equal to .

従って電流工3、1、I2、及びI3は全て■ 等しくなり、其の値は(20)式から次の様になる。Therefore, electricians 3, 1, I2, and I3 are all ■ are equal, and their values are as follows from equation (20).

I、 =Iz =I3 =VR/RZ  ・・・・(2
1)此処で抵抗42(R2)、抵抗45〔R3〕、抵抗
46CRb〕の温度係数をtx (ppm/K)とし、
温度Tに於ける抵抗4’2(R,)の値をR02とし、
温度がToに変化した時には抵抗42 CR2)の値は
下記の様になる。
I, =Iz =I3 =VR/RZ...(2
1) Here, the temperature coefficient of resistance 42 (R2), resistance 45 [R3], resistance 46CRb] is tx (ppm/K),
The value of resistance 4'2 (R,) at temperature T is R02,
When the temperature changes to To, the value of the resistor 42 (CR2) becomes as follows.

Rz ’  =Rot (1+α(T’  −T) )
  ・(22)電圧vRは温度に関係ない一定であるの
で、温度Tの時の電流値は、 Io+= Ioz= l03=Vll /Roz・・・
・(23)温度がToに変化した時、 I+’=Iz”=13″ ” ”R/ RO2(1+α(T’ −T))・・・・
・・・・・(24) (23)式と(24)式を比較すると、1+α(T’ 
−T) (26)式、(27)式は動作電流■2、I3の温度特
性が前記(7)式、(8)式と等しいことを意味し、本
実施例により温度補償が行われることを示している。
Rz' = Rot (1+α(T' - T))
・(22) Since the voltage vR is constant regardless of temperature, the current value at temperature T is: Io+= Ioz= l03=Vll/Roz...
・(23) When the temperature changes to To, I+'=Iz"=13"""R/RO2(1+α(T'-T))...
...(24) Comparing equations (23) and (24), 1+α(T'
-T) Equations (26) and (27) mean that the temperature characteristics of the operating current ■2 and I3 are equal to the above-mentioned equations (7) and (8), and temperature compensation is performed by this embodiment. It shows.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明した様に本発明によれば、シュミットト
リガ回路に於いて抵抗の温度特性によるトリガレベルの
温度依存性を補償出来るので波形整形回路等が安定に動
作出来ると云う大きい効果がある。
As explained in detail above, according to the present invention, the temperature dependence of the trigger level due to the temperature characteristics of the resistor can be compensated for in the Schmitt trigger circuit, so that the waveform shaping circuit etc. can operate stably, which is a great effect.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に依るシュミットトリガ回路の原理図で
ある。 第2図は本発明に依るシュミットトリガ回路の一実施例
を示す図である。 第3図(a)は従来の定電流源により駆動されるシュミ
ットトリガ回路の一例を示す図、第3回申)は第3図(
a)の回路の動作説明図である。 図中、1.3.4、及び7は夫々トランジスタ、25〜
32は夫々NPN l−ランジスタ、23.24はPN
Pトランジスタ、41〜49は夫々抵抗、50はバンド
ギャップ基準電圧源(BGR)である。 13≦)
FIG. 1 is a principle diagram of a Schmitt trigger circuit according to the present invention. FIG. 2 is a diagram showing one embodiment of a Schmitt trigger circuit according to the present invention. Figure 3(a) is a diagram showing an example of a Schmitt trigger circuit driven by a conventional constant current source;
FIG. 3 is an explanatory diagram of the operation of the circuit a). In the figure, 1, 3, 4, and 7 are transistors, and 25 to 7 are transistors, respectively.
32 are NPN l-transistors, 23.24 are PN
P transistors, 41 to 49 are resistors, and 50 is a bandgap reference voltage source (BGR). 13≦)

Claims (1)

【特許請求の範囲】 動作電流が定電流源に依って制御されるシュミットトリ
ガ回路に於いて、 トリガレベルを設定する抵抗(2)、抵抗(5)の温度
特性と逆な特性を有する該定電流源(11)を備えたこ
とを特徴とするシュミットトリガ回路。
[Claims] In a Schmitt trigger circuit in which the operating current is controlled by a constant current source, a trigger level setting resistor (2) and a resistor (5) having temperature characteristics opposite to those of the resistor (5) are provided. A Schmitt trigger circuit comprising a current source (11).
JP60107625A 1985-05-20 1985-05-20 Schmitt trigger circuit Granted JPS61264909A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60107625A JPS61264909A (en) 1985-05-20 1985-05-20 Schmitt trigger circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60107625A JPS61264909A (en) 1985-05-20 1985-05-20 Schmitt trigger circuit

Publications (2)

Publication Number Publication Date
JPS61264909A true JPS61264909A (en) 1986-11-22
JPH0317415B2 JPH0317415B2 (en) 1991-03-08

Family

ID=14463929

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60107625A Granted JPS61264909A (en) 1985-05-20 1985-05-20 Schmitt trigger circuit

Country Status (1)

Country Link
JP (1) JPS61264909A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2635620A1 (en) * 1988-08-19 1990-02-23 Radiotechnique Compelec ACCELERATED SWITCHED INPUT CIRCUIT
JP2008131650A (en) * 2006-11-20 2008-06-05 Samsung Electro Mech Co Ltd Oscillator using schmitt trigger

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2635620A1 (en) * 1988-08-19 1990-02-23 Radiotechnique Compelec ACCELERATED SWITCHED INPUT CIRCUIT
JP2008131650A (en) * 2006-11-20 2008-06-05 Samsung Electro Mech Co Ltd Oscillator using schmitt trigger

Also Published As

Publication number Publication date
JPH0317415B2 (en) 1991-03-08

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