JPS61256448A - Recognizing circuit for circuit substrate - Google Patents

Abstract

PURPOSE:To simplify a recognizing circuit for circuit substrate by using a single return line to fetch the substrate name signal defined to each circuit substrate. CONSTITUTION:The circuit substrates 5 and 6 contain inverters 5a and 6a whose output stages consist of open collector transistors and substrate name designating resistances 5b and 6b connected to the output sides of the inverters 5a and 6a and having values different between the substrates 5 and 6. The other sides of the resistances 5b and 6b are pulled up by a fixed resistance 3 of a CPU board 1 via a return line RL and then fetched totally by an input terminal P1. Then a CPU 2 selects successively inverters 5a and 6a to reduce the output impedances of both inverters and connects each end of resistances 5b and 6b to the earth. The input signal voltage decided by the voltage dividing ratio between both resistances is discriminated through the board 1 at this time point. Thus the names of both substrates 5 and 6 are recognized successively.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention recognizes that the circuit boards that it should be equipped with are correctly mounted in a microcomputer device or the like that mounts a plurality of circuit boards. 0 [Prior Art] In a microcomputer device, a plurality of input/output interface 7 ace ports (hereinafter referred to as I10 boards) are used to connect with various systems. The user is responsible for installing the I/L board, which is designed to be selectively equipped with. If not, the intended system operation will not be obtained, and erroneous operation or signal transmission will occur.

For this purpose, in conventional microcomputer equipment, dip switches are provided on each I10 board.
The board salt of the I10 board is digitized and set on the dip switch. The set value of this dip switch is recognized by being supplied to a central processing board (hereinafter referred to as a CPU board) via a data bus.

[Problem that the invention seeks to solve]

However, since the circuit board recognition circuit having the above configuration uses a data bus to transmit board information, it is necessary to provide a new data bus in a system that does not have a data bus. Also, since the board information is set using dip switches,
There have been various problems such as the time-consuming setting and the increased number of setting errors.

[Means for solving problems]

Therefore, the circuit board am device based on the INK of this invention includes an inverter whose output stage is composed of open collector transistors on each circuit board, and a board name specified resistor connected to the output side of this inverter, which has a different value for each circuit board. The other end of each of the board name designating resistors is connected to the input terminal K, which is simply assembled by the fixed resistor of the CPU board, via a return line. And C.P.
For the U board, select the inverter of each board in turn to lower its output impedance. From K, ground one end of the resistor designated by the board name, and then calculate the voltage division ratio between the fixed resistor on the CPU board and the resistor designated by the board name. When determining the input signal voltage determined by K, the circuit board name is sequentially determined by Iil! It is something to be aware of.

[For production]

Circuit board S configured like this! In the identification circuit, the board name designating resistances from each circuit board can be collected in a time-division manner using one return line, thereby eliminating the need for a data bus.

In addition, the parts provided on each circuit board to specify the board name are as follows:
Since only an inverter and a resistor are required, it is extremely inexpensive and eliminates the trouble and setting errors required to set the board name.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of the circuit board recognition circuit according to the present invention, especially for the I10 board of a microcomputer system! This is applied when doing &igm. In the figure, 1 is the CPU board, which is an input port that converts analog signals into digital values and inputs them.)
It has a central processing circuit (hereinafter referred to as CPU) 2 having a Pl and a data output port Px, a resistor 3 that pulls up the input port P1, and a decoder 4 that decodes the signal from the data output port Pg. ing. 5.6 receives a signal from an external device (not shown) and connects it to the CPU board 1.
is supplied via a signal line (not shown) to C.
I performs an interface "-7 ace" when supplying a signal output from the PU board 1 to an external device (not shown).
There are 10 boards. And this I10 board 5,
6, an inverter 5ae6m and an inverter 5a* each receiving signals sequentially supplied from the decoder 4.
It has board name designating resistors 5b and 6b connected to the output terminal of 5b. In this case, since the output stage of the inverter 5ay6a is constituted by an open collector transistor, the output impedance becomes high impedance or low impedance depending on the input condition. The board name designated resistors 5b and 6b are each I/L) board 5,
The resistance values R1-Rs are set corresponding to the board name No. 6, and the other end is connected to the CPU 20 input capo Pt via one return line RL.

In the circuit configured in this way, when the CPU 2 enters the circuit board recognition mode, the specified data specifying the slots in which the I/L boards 5 and 6 are set is output from the data output capo-Ps to the decoder 4. Supplied. decoder 4
By decoding this designated data, it supplies an "H" level select signal to the inverters 5as6m of the L ports 5 and 6 set in the corresponding slots. For example, "H" is output only from the output terminal Q1 of the decoder 4.
When the level select signal is output, the inverter 5a
The output of inverter 6a is inverted to @L”, and the output of inverter 6a is 1H.
” remains the same.

Here, since the output stage of the inverters 5a, 6& is composed of open collector transistors,
``In the inverter 5a that receives the level select signal as input, the open collector transistor provided in its output stage is turned on, the output impedance becomes extremely low, and the inverter 5& side of the board name specified resistor R1 is grounded. On the other hand, the inverter 6a of the Nirboard 6 which does not receive the select signal, that is, inputs the "L" signal, has a high output impedance because the open collector transistor provided in the output stage is turned off. Therefore, the inverter 5b side of the board name designated resistor R3 is disconnected from the ground and is in a floating state.

Therefore, since a series circuit of the resistor 3 and the resistor 5b is interposed between the power supply V and the ground, the resistance value of both Rce
The voltage divided according to R1 is supplied to the input capacitor Pl of the CPU 2 via the return twin RL. In this case, the voltage signal has a resistance value R,
Since this is a value given only to I10 board 5, it means that 5% of I10 boards exist and represents the board name.

On the other hand, the CPU 2 takes in the voltage signal supplied to the input port P1 after converting it into a digital value.
Figure 2 shows a 70-chart for performing this determination process, and first, in step Ss, the l register is determined by software processing. After setting "1" to step S! to move to. In step Ss, by supplying the value indicated by the contents of the l register to the decoder 4, the decoder 4 outputs the 'H# signal to the first output line, and the other output twins output the 1L signal. "outputs the signal. Next, in step S3, the CPU
2 reads the input voltage signal MIN of the input port Rt as a digital value, and in step S4 the reference value V
th is the input signal range VM [N ””V lowest value - ~ v
! 0 step S1 to set the minimum value VMrN K of 1Mx
In this step, the reference value Vth and the input signal MIN are compared, and if the condition vth>vIN cannot be obtained, the process proceeds to step SS, where the reference value Vth is increased by ΔV, and the process proceeds to step Sγ. In step 8tVc, after incrementing the board name Pj by PjtlK, step S
Return to step g and perform the comparison operation again. As shown in Figure 3, one reference value Vth is set to the lowest value VMIN of the input signal range.
This means that a comparison is made with the input signal TIN while increasing the value by ΔV from ΔV to find a condition under which vth<vIN. Then, when the determination result in step Ss is YES and such conditions are determined, the process moves to step SsK and 1
It is recognized that the th I10 board is pt(Pj).

Next, in step Ss, 1 is added to the contents of register l, and then the process moves to step S1o. and,
In this step sia, it is determined whether the contents of register l have reached the maximum value imax of the slot stage, and if the determination result is NO, step S
! When the determination result is ημs, it is assumed that the board names for the Nilboards set in all slots have been recognized, and the recognition operation is terminated.

The result recognized in this way is a screen that displays what type of board name (model number) the board name (model number) is inserted in each slot, for example, using a numeric display, or whether a genuine board is correctly set. It becomes possible to display only the determination result as to whether or not the

In the above embodiment, an inverter with an open collector configuration was used in the output stage to connect the board name specified resistor to ground, but any gate configuration can be used as long as the output stage has an open collector transistor. It may be.

〔Effect of the invention〕

As explained above, the circuit board U identification circuit according to the present invention is
The output stage provided on each circuit board is composed of open collector transistors. Selectively specify the gate to make the output side a low impedance state. In addition, specify the name of the board commonly connected to the return line. One end of the resistor is connected to ground, and the circuit board name is recognized by determining a value determined by the voltage division ratio between the fixed resistor and the board name designated resistor connected to this ground. Therefore, the circuit is simplified because the board name signal defined for each circuit board can be taken in using one return line without using a pass line. Furthermore, since each circuit board only needs to be provided with an inexpensive gate and a resistor as identification parts, there are various effects such as being able to measure stop-down.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the circuit board recognition circuit according to the present invention, FIG. 2 is a flowchart showing the recognition operation, and FIG. 3 is a diagram showing the relationship between reference values and input signals. 1...-CPU board, 2... CPU, 3... fixed resistor, 4... decoder, 5.6... nil board,
5&#6&... Inverter, 5b, 6b... Board name specified resistor. Patent Applicant Yamatake Honeywell Co., Ltd. Figure 3

Claims (1)

[Claims] a board name designating resistor provided on each circuit board and set to different resistance values; a gate connecting one end of the board name designating resistor to ground when an open collector transistor provided in the output stage is turned on; A return line that commonly connects the other ends of the board name designated resistors, a fixed resistor connected between this return line and the power supply, and an open collector transistor that sequentially controls each of the gates and is provided at its output stage. and a central processing circuit that turns on the return line and recognizes the board name by determining the voltage of the return line.