JPH06161627A - Keyboard - Google Patents

Abstract

PURPOSE:To make it possible to easily attain function preventing the occurrence of a ghost key at the time of a multiple depression. CONSTITUTION:A D/A converter 6 outputting scan signals of a level in a Hi level and scan signals of an arbitrary analog value in a Low level is provided in a one-chip microcomputer 3. By this D/A converter 6, a scanning is performed for a resistance matrix 1 and a detection signal is converted into digital data in an A/D converter 5. By comparing this conversion data with data for threshold and judging the ON/OFF of a switch part 2, an N key roll-over function is realized. An easy coping with the increase of the number of switches is enabled, and an easy realizing of the N key roll-over function is enabled regardless of power supply voltage because the detection signal converted into digital data does not depend on power supply voltage VCC.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a keyboard widely used as an input device of an information processing apparatus, and more particularly, to a function of preventing a ghost key which is erroneously operated as a key which is not turned on at the time of multiple keystrokes (N Keyboard having a key rollover function).

[0002]

2. Description of the Related Art Conventionally, in such a keyboard, generation of a ghost key due to multiple keystrokes has been studied. The mechanism of ghost key generation in this multiple keystroke will be described.

FIG. 8 is a circuit diagram of a conventional keyboard. As shown in FIG. 8, the conventional keyboard has a key matrix 1a in which switch portions S00 to S97 are arranged in a 10 × 8 matrix, and this key matrix 1a.
The matrix driver 23 that sequentially outputs high levels to the plurality of scanning lines X0 to X9 connected in the row direction via the diode 24 and the plurality of detection lines Y0 to Y7 connected in the column direction of the key matrix 1a. The matrix receiver 22 receives signals, the control unit 4a controls the matrix driver 23 by the signals of the matrix receiver 22, and load resistors RL0 to RL7.

Here, the matrix driver 23 outputs a high level to the scanning line X0 (all the other scanning lines are Low).
S00 and S1 of the switch part
Assuming that 0 and S11 are turned on, the ghost current IG is X0 → Y0 → X1 → Y1 → load resistance RL as shown in the figure.
It flows in order of 1. Therefore, since the detection line Y1 rises to the Hi level, a voltage is generated as if the switch S01 that was not turned on is turned on. This is the mechanism of ghost key generation.

The function of preventing the occurrence of the above-mentioned ghost key and always confirming the ON state of one switch in the ON order of the switch is called N-key rollover, and conventionally, one diode is mounted in each switch section rather than in a row unit. The method is general.

FIG. 9 is a circuit diagram of a keyboard showing another conventional example. As shown in FIG. 9, this keyboard implements an N-key rollover by mounting a diode 24, and here also a basic circuit is shown. As in the configuration shown in FIG. 8, the configuration includes a key matrix 1a, a matrix driver 23, a matrix receiver 22 and a control unit 4a. In particular, a diode 24 is mounted in series on each switch section of the key matrix 1a. According to this keyboard, matrix driver 2
High level is output to X0 from 3 (all other scanning lines are L
ow level), S00,
Even if S10 and S11 are turned on, the diode 24 mounted in S10 is reverse biased. Therefore, the current is Y
Since it does not flow from 0 to X1, Y1 does not go to the Hi level,
No ghost key is generated.

[0007]

In such a conventional keyboard, in order to realize the N-key rollover function, it is necessary to mount one diode for each key or each row. Since the same number of diodes are required, it is difficult to reduce the size, and the material cost of the diode and the mounting man-hours increase the cost.

An object of the present invention is to provide a keyboard which is easy to realize the N key rollover function and which is small in size and low in cost.

[0009]

The keyboard of the present invention comprises:
A D / A for sequentially outputting a scanning signal from a resistive key matrix in which switch units in which resistive elements are connected in series to a switch unit are arranged in a matrix, and a plurality of scanning lines connected in the row direction of the resistive key matrix. A converter, an A / D converter that receives an analog signal based on ON / OFF of the switch unit from a plurality of detection lines connected in the column direction of the resistance type key matrix, and converts the analog signal into digital data; An A converter and a control unit for controlling the A / D converter, the control unit controlling the A / D converter and a command group for outputting a scanning signal to the D / A converter. The digital data and threshold data are compared to determine ON / OFF of the switch section. Read-only memory for storing a command word group, a random access memory capable of storing / writing the digital data converted by the A / D converter, and a command word stored in the read-only memory The A / D circuit includes a control circuit that reads out a group and generates control information based on each command word, and an arithmetic circuit that performs an arithmetic operation in response to the control information.
The reference voltage of the converter and the reference voltage of the D / A converter are used as power supply voltages.

[0010]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a circuit diagram of a keyboard showing an embodiment of the present invention. As shown in FIG. 1, in this embodiment, a resistance matrix 1 and D / s connected to the resistance matrix 1 are connected.
A converter 6 and A / D converter 5, and these D
The control unit 4 controls the / A converter 6 and the A / D converter 5, and the load resistors RL0 to RL7. The control unit 4, the D / A converter 6, and the A / D converter 5 form a one-chip microcomputer 3 integrated on one chip. The resistance matrix 1 is configured by arranging switch units 2 in which resistance elements R00 to R157 and switch portions S00 to S157 are connected in series in a 16 × 8 matrix, and scanning lines in the row direction of the resistance matrix 1 are arranged. X0 to X15 are connected to the D / A converter 6. Moreover, the detection lines Y0 to Y7 in the column direction of the resistance matrix 1 are connected to the A / D converter 5 and pulled down to the signal ground (hereinafter abbreviated as SG) by the load resistances RL0 to RL7. On the other hand, the control unit 4 includes a ROM 9 in which a command word group for controlling the D / A converter 6 and the A / D converter 5 and processing data is written, and a RAM 10 capable of reading and writing at least the data of the A / D converter 5. And ALU 12 for performing various calculations, and A
An input / output channel 7 for interfacing with the / D converter 5, an output channel 8 for interfacing with the D / A converter 6, a command word of the ROM 9, and a RAM 10, an ALU 12, an input / output channel 7, and an output channel 8. It is composed of a control circuit 11 for transmitting and receiving data to and from each control and control line, and an internal bus 13.
The internal bus 13 is composed of ROM9, RAM10, ALU1.
2, input / output channel 7, output channel 8 and control circuit 11 are connected to each other. Further, the reference voltage VREF1 of the A / D converter 5 and the reference voltage VR of the D / A converter 6
EF2 is connected to the power supply voltage VCC.

FIG. 2 is a block diagram of the A / D converter 5 shown in FIG. As shown in FIG. 2, the A / D converter 5 constitutes an 8-bit successive approximation type A / D converter, and includes an analog multiplexer 14, a latch 15, and a VC.
Series resistor string 17 connected between C and SG
a, a latch 15, a successive approximation register 18 for comparing the values of the series resistor strings 17a, and a buffer 19,
It has a sequence controller 16 for controlling each part. First, the 8-input analog signals AN0 to AN7 are selected as 1 input by the analog multiplexer 14, and the latch 1
Holds at 5. This analog data is the reference voltage VR
The data is stored in the successive approximation register 18 by the successive approximation method while being compared with the value obtained by dividing between EF1 and SG by the tap decoder of the series resistance string 17a. The 8-bit data converted into digital data by the register 18 is stored in the buffer 19.

Further, the tap decoder of the series resistor strings 17a can divide the voltage between the reference voltages VREF1 and SG into 2 8 (= 256). Furthermore,
The sequence controller 16 controls the analog multiplexer 14, the latch 15, the successive approximation register 18 and the buffer 19. Data stored in these buffers 19 and signals from the sequence controller 16 are transferred to the input / output channel 7.
However, since VREF1 is connected to VCC,
The analog data input to the analog signals AN0 to AN7 is converted into digital data as represented by the following equation (1).

[0014]

FIG. 3 is a block diagram of the D / A converter shown in FIG. As shown in FIG. 3, this D / A converter 6
Constitutes a resistor string type D / A converter having an 8-bit resolution, and selects the series resistor strings 17b and taps and outputs them to the scanning line X0.
And a plurality of blocks including the D / A conversion setting register 20 for controlling the tap selector 21.

The operation of the D / A converter 6 outputs an analog value by writing a desired output value into the 8-bit D / A conversion value setting register 20. This output voltage range outputs a value obtained by dividing the voltage applied to VREF2 by the tap selector 21 of the series resistor string 17b.
That is, the tap selector of the series resistor strings 17b sets the voltage between the reference voltages VREF2 and SG to the power of 2 (= 8).
It is possible to output by dividing into 256). The analog data output to the analog output terminal is converted as shown in the following expression (2).

[0017]

Next, the operation of the circuit described with reference to FIGS. 1 to 3 will be described with reference to FIGS. 4 to 7.

First, based on the instruction group written in the ROM 9, the D / A converter 6 sequentially sets the scanning lines X0 to X15 to the Hi level and sets the scanning signals other than that to arbitrary analog values in the resistance matrix scan. Output to 1. The analog multiplexer 1 of the A / D converter 5 is synchronized with the scanning signal and one line in the row direction is set to Hi level.
4 is sequentially selected, and the detection signal levels of the detection lines Y0 to Y7 are sequentially A / D converted. The digital data is sequentially R
Store in AM10.

FIGS. 4A to 4C are equivalent circuit diagrams for explaining the operation when the same Y-line multiple keys are pressed in FIG. First, as shown in FIG. 4A, for example, a state in which a high level is output to X0 (signal level: VC
When the switch section S00 is turned on in C), the detection signal V00 which is obtained by the resistance ratio of the resistance element R00 connected to the switch section S00 and the load resistance RL0 of the Y0 line is
It can be expressed by the following equation (3).

[0021]

Here, VCC = 5V, RL0 = 100k
Assuming Ω and R00 = 10 kΩ, V00 = 4.55
It becomes V.

Further, V00 (digital) converted into digital data by the equation (1) is "233 (= E8).
h) ”. Assuming that all the switch units arranged on the X0 line other than the switch unit S00 are OFF, the RAMs assigned to Y0 to Y7 of the X0 line.
E8h is stored only in Y0 in 10, and 0 in Y1 to Y7.
0h is stored. By comparing the data stored in the RAM 10 with the threshold data set by the means described below, the ON / OFF of the switch unit is turned on / off.
Judge as OFF.

Next, as shown in FIG. 4B, X0 is set to H.
While the i level is being output, the switch section S00,
When S10 is turned on, an arbitrary analog value VG is output to the scanning line X1, so V00 can be expressed by the following equation (4).

[0025]

Here, when R00 = R10, the above equation (4) is transformed into the following equation (5).

[0027]

Similarly, as shown in FIG. 4C, the O of the switch section (S00 to S90) mounted on the Y0 line is turned on.
Let N be the number of keys that are doing N, and use resistive elements (R00 to R9
0) all have the same resistance value (R00 = R10 = ... R90)
Then, V00 in this case can be expressed by the following equation (6).

[0029]

Here, V00 obtained by converting V00 in the equation (6) into digital data by using the equation (1) described above.
When (digital) is calculated, equation (7) is obtained.

[0031]

FIG. 5 is a characteristic diagram of a detected voltage when the same Y-line multiple keys are tapped in FIG. As shown in FIG. 5, this characteristic is shown in FIG. 4C, where VCC = 5V, VG = VCC / 5,
The result of calculation of the above-mentioned formula (7) is shown assuming that RL0 = 100 kΩ and R00 = 10 kΩ. This V00
The 8-bit data represented by (digital) in hexadecimal is the data stored in the RAM 10. Therefore,
The threshold data VTH is set so that the detection voltage V00 (digital) is at the Hi level even when all the switches arranged on the Y line are ON (N = 15 in FIG. 5).

FIG. 6 is an equivalent circuit diagram for multiple keystrokes for explaining the ghost key generation pattern in FIG.
As shown in FIG. 6, this circuit shows an equivalent circuit in the state where S00, S10, and S11 of the switch section are ON while the Hi level is output to X0. Even in this state, it is possible to prevent the occurrence of a ghost key by setting the threshold data VTH so that the detection voltage (V01) of Y1 does not become the Hi level. The detected voltage V01 (digital) of Y1 is obtained from the following equation (8).

[0034]

Here, VCC = 5V, VG = VCC /
Assuming that 5, RL1 = 100 kΩ and R11 = 10 kΩ, the formula (8) is calculated, and the detection voltage V01 (digital) of Y1 becomes 2 Dh. Further, even when all the switches arranged on the Y line are turned on, the detection voltage V00 (digital) is at the Hi level. Furthermore, X
Even when the Hi level is output to 0 and S00, S10, and S11 of the switch unit are ON,
By setting the threshold data VTH so that the detection voltage V00 (digital) of Y1 does not become the Hi level, the N key rollover can be realized. The VTH shown in FIG. 5 described above (decimal number = 50, hexadecimal number = 3
2h) is an example of the threshold data VTH set by the above method.

FIG. 7 is a characteristic diagram of the detected voltage when the same Y-line multiple keys are tapped in FIG. As shown in FIG. 7, this characteristic has VCC = 5V, VG = 0V, R in FIG.
Assuming that L0 = 100 kΩ and R00 = 10 kΩ, the result of calculating the above-mentioned formula (7) is shown.

Here, FIG. 5 and FIG. 7 are compared. Comparing the output of an arbitrary analog value at the Low level of the scanning signal with the output of the CMOS level, the detection voltage is higher when the arbitrary analog value is output. Therefore, the number of switches in the Y line is determined. The number of keyboard switches can be increased as a result.

Since the reference voltage of the D / A converter 6 is connected to the power supply voltage VCC, the power supply voltage VCC and the arbitrary analog value VG have a proportional relationship. So VG
When calculated as = VCC / 5, the following equation (9) is obtained.

[0039]

In this case, there is no VCC-dependent term in equation (9). Therefore, the data V00 after digital conversion
Since (Digital) has a constant value even if the power supply voltage fluctuates, the difference between the A / D converted detection voltage and the threshold data is kept constant without depending on the power supply voltage. Regardless of this, it is possible to realize the N key rollover function.

In the above-described embodiment, the reference voltage VREF1 of the A / D converter 5 and the reference voltages VREF2 and VCC of the D / A converter 6 are set as external terminals of the one-chip microcomputer 3 and are connected in a pattern. However, the internal wiring of the one-chip microcomputer 3 may be used for connection.

[0042]

As described above, in the keyboard of the present invention, the resistance matrix is scanned by the D / A converter which outputs the scanning signal of the CMOS level at the Hi level and the arbitrary analog value VG at the Low level, and the detection signal is detected. A
After the digital data is converted by the / D converter, it is compared with the threshold data and the switch is turned on.
By determining ON / OFF, there is an effect that the N-key rollover function can be easily realized, and downsizing and cost reduction can be realized. Further, according to the present invention, since the detection signal converted into digital data has a constant value without depending on VCC, the fluctuation of VCC can be ignored and the N-key rollover function can be realized regardless of the power supply voltage. It is possible. Further, the present invention can cope with an increase in the number of keyboard switches by setting the Low level of the scanning signal to an arbitrary analog value VG.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a keyboard showing an embodiment of the present invention.

FIG. 2 is a configuration diagram of the A / D converter shown in FIG.

FIG. 3 is a configuration diagram of the D / A converter shown in FIG.

FIG. 4 is an equivalent circuit diagram for explaining the operation when the same Y-line multiple keys are tapped in FIG.

5 is a characteristic diagram of a detected voltage when multiple keys are tapped on the same Y line in FIG.

6 is an equivalent circuit diagram at the time of multiple keystrokes for explaining the ghost key generation pattern in FIG.

FIG. 7 is a detection voltage characteristic diagram at the time of multiple keystrokes of the same Y line when the Low level in FIG. 4 is set to 0V.

FIG. 8 is a circuit diagram of a keyboard showing a conventional example.

FIG. 9 is a circuit diagram of a keyboard showing another conventional example.

[Explanation of symbols]

 1 resistance matrix 2 switch unit 3 one-chip microcomputer 4 control unit 5 A / D converter 6 D / A converter 7 input / output channel 8 output channel 9 ROM 10 RAM 11 control circuit 12 ALU 13 internal bus 14 analog multiplexer 15 latch 16 sequence Controllers 17a, 17b Series resistor strings 18 Successive approximation register 19 Buffer 20 D / A conversion value setting register 21 Tap selector

Claims (5)

[Claims] 1. A sequential scanning signal is supplied from a resistive key matrix in which switch units in which resistive elements are connected in series to a switch unit are arranged in a matrix, and a plurality of scanning lines connected in the row direction of the resistive key matrix. D / to output
The A / converter and a plurality of detection lines connected in the column direction of the resistance type key matrix are used to turn ON / OFF the switch unit.
The control unit includes an A / D converter that receives an analog signal based on OFF and converts the analog signal into digital data, and a control unit that controls the D / A converter and the A / D converter.
/ A converter for outputting a scanning signal and a command for controlling the A / D converter and comparing the A / D converted digital data with threshold data to determine ON / OFF of the switch unit A read-only memory for storing a group, a random access memory capable of writing / reading the digital data converted by the A / D converter, and a command word group stored in the read-only memory A control circuit that generates control information based on each command word and an arithmetic circuit that performs an arithmetic operation in response to the control information are provided, and the reference voltage of the A / D converter and the reference voltage of the D / A converter are set. A keyboard characterized by a power supply voltage. 2. The control unit and the D / A
The keyboard according to claim 1, wherein the converter and the A / D converter constitute a one-chip microcomputer integrated on one chip. 3. The control unit includes the D /
2. An output channel and an input / output channel for connecting to the A converter and the A / D converter respectively, and the output channel and the input / output channel are connected to the read-only memory or the like via an internal bus. The listed keyboard. 4. The keyboard according to claim 1, which realizes a function of preventing a ghost key regardless of a power supply voltage. 5. The keyboard according to claim 1, wherein a CMOS level is output when the level of the scanning signal output from the D / A converter is high level, and an arbitrary analog value is output when the level is low level.