JPS6125309A - Level stabilizing circuit - Google Patents

Level stabilizing circuit

Info

Publication number
JPS6125309A
JPS6125309A JP14713084A JP14713084A JPS6125309A JP S6125309 A JPS6125309 A JP S6125309A JP 14713084 A JP14713084 A JP 14713084A JP 14713084 A JP14713084 A JP 14713084A JP S6125309 A JPS6125309 A JP S6125309A
Authority
JP
Japan
Prior art keywords
voltage
circuit
output
level
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14713084A
Other languages
Japanese (ja)
Inventor
Hiroshi Tsurumaki
鶴巻 博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP14713084A priority Critical patent/JPS6125309A/en
Publication of JPS6125309A publication Critical patent/JPS6125309A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To stabilize a sufficient level with a simple circuit by providing a logical circuit as a level stabilizing element, a BPF rectifying a rectangular wave into a sinusoidal wave and a control circuit generating a control voltage required to stabilize an output voltage. CONSTITUTION:A sinusoidal wave signal inputted to an input terminal 1 becomes a rectangular wave by the logical circuit 2. The rectangular wave is shaped into a sinusoidal wave by a BPF3 and the result is fed to an output terminal 4. Thus, the control circuit 5 rectifying an output voltage in order to obtain a DC control voltage required to stabilize an output voltage at the output terminal 4 and comparing the rectified voltage with a reference voltage of the stabilized DC voltage is provided. Then the rectified and compared DC control voltage obtained by the control circuit 5 is impressed to an input terminal 1 as a threshold voltage of the logical circuit 2. Thus, the sufficient stabilization of the level is attained with a simple circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、搬送装置に使用される搬送波供給回路のレベ
ル安定化回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a level stabilizing circuit for a carrier wave supply circuit used in a carrier device.

〔従来の技術〕[Conventional technology]

従来、この種のレベル安定化回路は、第2図に示すよう
な構成になっており、入力端子(1)に入力した正弦波
信号は高増幅度の増幅器(6)により大振幅電圧に増幅
され、次に、ダイオード等によるリミッタ回路(7)に
より、圧縮を受けてレベルの安定化が行なわれ、該回路
出力の波形を正弦波に整形する帯域P波器(3)ヲ使用
した構成により、レベルの安定化を計っていた。このた
め、前記の増幅器(6)の構成は、高増幅度、高出力電
力の性能が必要となり、使用部品点数の増大、高価格部
品の使用、大型化、高消費電力化し、これにともなって
発熱量も問題となり、信頼性も低下するという欠点を有
していた。
Conventionally, this type of level stabilization circuit has a configuration as shown in Figure 2, in which a sine wave signal input to the input terminal (1) is amplified to a large amplitude voltage by a high amplification amplifier (6). Then, the level is stabilized by compression through a limiter circuit (7) using a diode or the like, and the configuration uses a band P waveform generator (3) that shapes the waveform of the circuit output into a sine wave. , aimed at stabilizing the level. For this reason, the configuration of the amplifier (6) described above requires performance of high amplification and high output power, which increases the number of parts used, uses high-priced parts, increases size, and increases power consumption. The problem was the amount of heat generated, and the reliability was also reduced.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上述の欠点を有する回路構成を用いる
ことなく、簡易な回路構成により、十分なレベルの安定
化を実現可能とし、従来の技術における種々の欠点を改
善可能とするものである。
An object of the present invention is to make it possible to achieve a sufficient level of stability with a simple circuit configuration without using the circuit configuration having the above-mentioned drawbacks, and to improve various drawbacks in the conventional technology. .

〔発明の構成〕[Structure of the invention]

本発明は、搬送波供給回路において、正弦波を入力する
レベル安定化素子としての論理回路と、該論理回路の出
力である方形波を正弦波に′!lk形する帯域ろ波器と
、該帯域ろ波器からの出力電圧を整流して得られる整流
電圧と基準電圧とを比較して制御電圧を出力する制御回
路とにより構成され、該制御回路の制御電圧を前記論理
回路の入力に印加して、搬送波の出力レベルを安定にす
るようにしたことを特徴とするレベル安定化回路である
The present invention provides a carrier wave supply circuit that includes a logic circuit as a level stabilizing element that inputs a sine wave, and converts a square wave output from the logic circuit into a sine wave! lk-shaped bandpass filter, and a control circuit that compares the rectified voltage obtained by rectifying the output voltage from the bandpass filter with a reference voltage and outputs a control voltage. The level stabilizing circuit is characterized in that a control voltage is applied to the input of the logic circuit to stabilize the output level of the carrier wave.

〔発明の原理と作用〕[Principle and operation of the invention]

本発明は、入力信号である正弦波を、一般的に使用され
ている論理回路(たとえはナントゲート)の入力端子に
注入し、該回路の出力として方形波を得る。次に、この
方形波′t−帯域f波器により正弦波に波形整形を行な
い所要とする搬送波出力電圧を採り出す。ここで、該出
力電圧を安定化するのに必要な直流制御電圧を得るため
に、該出力電圧を整流し、この整流電圧と安定化した直
流電圧より成る基準電圧との比較を行な5制御回路を設
ける一次に該制御回路で得られた整流、比較された直流
制御電圧を、該論理回路のスレッショルド電圧とするた
めに入力端子に印加する。ここで該論理回路の入力信号
である正弦波電圧とスレッショルド電圧との増減の関係
上、正比例するよう構成しておくことで、入力信号であ
る正弦波電圧の増減により、該論理回路の出力である方
形波のデユーティ−ファクタが増減し、方形波に含まれ
る正弦波成分が増減することになる。
The present invention injects a sine wave as an input signal into the input terminal of a commonly used logic circuit (for example, a Nant gate) and obtains a square wave as the output of the circuit. Next, the square wave 't-band f wave generator performs waveform shaping on the sine wave to obtain the required carrier wave output voltage. Here, in order to obtain the DC control voltage necessary to stabilize the output voltage, the output voltage is rectified, and this rectified voltage is compared with a reference voltage consisting of the stabilized DC voltage. First, a rectified and compared DC control voltage obtained by the control circuit is applied to an input terminal to be used as a threshold voltage of the logic circuit. Here, by configuring the logic circuit so that it is directly proportional to the increase/decrease between the sine wave voltage that is the input signal and the threshold voltage, the output of the logic circuit is The duty factor of a certain square wave increases or decreases, and the sine wave component included in the square wave increases or decreases.

〔実施例の説明〕[Explanation of Examples]

本発明の一実施例′lt第1図に示すブロック図により
説明する。
One embodiment of the present invention will be explained with reference to the block diagram shown in FIG.

第1図において、(1)は入力端子、(2)は一般的な
論理回路(たとえばナントゲート)、(3)は帯域ろ波
器、(4)は出力端子、(5)は制御回路、(8)は整
流回路、(9)は基準電圧発生回路、(10)は比較回
路である。
In FIG. 1, (1) is an input terminal, (2) is a general logic circuit (for example, a Nant gate), (3) is a bandpass filter, (4) is an output terminal, (5) is a control circuit, (8) is a rectifier circuit, (9) is a reference voltage generation circuit, and (10) is a comparison circuit.

第1図に示す回路構成によるレベル安定化のための制御
特性を説明する。
Control characteristics for level stabilization using the circuit configuration shown in FIG. 1 will be explained.

入力端子(1)に入力した正弦波信号は、論理回路(2
)に入力される。論理回路(2)の入力には、制御回路
6)からの直流制御電圧により定まるスレッショルド電
圧が印加されているため、論理回路(2)の出力として
、該スレッショルド電圧を越えた入力である正弦波電圧
の大きさに比例した時間幅を持つ方形波を発生すること
になる。
The sine wave signal input to the input terminal (1) is sent to the logic circuit (2).
) is entered. Since a threshold voltage determined by the DC control voltage from the control circuit 6) is applied to the input of the logic circuit (2), the output of the logic circuit (2) is a sine wave whose input exceeds the threshold voltage. This will generate a square wave with a time width proportional to the magnitude of the voltage.

次K、この方形波は、帯域ろ波器(3)により正弦波に
整形され出力端子(4)に至る。
Next, this square wave is shaped into a sine wave by a bandpass filter (3) and reaches an output terminal (4).

同時に出力端子(4)での出力信号は、整流およびこの
整流電圧と、安定化された直流電圧から成る基準電圧と
の比較を行な5制御回路(5)に印加され、制御回路(
5)の出力として、論理回路(2)のスレッショルド電
圧となる直流制御電圧を発生させる。なお、制御回路(
5)は、整流回路(8)と基準電圧発生回路(9)と比
較回路(10)とKより構成される。
At the same time, the output signal at the output terminal (4) is rectified and the rectified voltage is compared with a reference voltage consisting of a stabilized DC voltage, and is applied to the control circuit (5).
As the output of step 5), a DC control voltage is generated which becomes the threshold voltage of the logic circuit (2). In addition, the control circuit (
5) is composed of a rectifier circuit (8), a reference voltage generation circuit (9), a comparison circuit (10), and K.

ここで各部の動作関係を述べる。入力信号である正弦波
電圧の増減とスレッショルド電圧の増減を正比例する様
に構成されているため、論理回路(2)の出力である方
形波のデユーティファクタの変化は、入力信号である正
弦波電圧の増減に反比例することになる。方形波のデユ
ーティ−ファクタの増減とこれに含iれる正弦波成分の
増減とは反比例しているため、上述の各々の関係により
、出力レベルの安定化が達成されるようになる。
Here, the operational relationship of each part will be described. Since the configuration is such that the increase/decrease in the sine wave voltage that is the input signal is directly proportional to the increase/decrease in the threshold voltage, the change in the duty factor of the square wave that is the output of the logic circuit (2) is proportional to the sine wave that is the input signal. It will be inversely proportional to the increase or decrease in voltage. Since the increase/decrease in the duty factor of the square wave is inversely proportional to the increase/decrease in the sine wave component included therein, the output level can be stabilized by each of the above-mentioned relationships.

〔発明の効果〕〔Effect of the invention〕

以上の如(本発明によると、欠点を有する増幅器の構成
を用いることなく、簡易な回路構成により、レベルの安
定化を実現することができる効果、および従来の増幅器
の構成にともなう欠点を改善することができる効果があ
る。
As described above (according to the present invention), it is possible to realize level stabilization with a simple circuit configuration without using an amplifier configuration having drawbacks, and to improve the disadvantages associated with the conventional amplifier configuration. There is an effect that can be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明によるレベル安定化回路を示すブロッ
ク図、第2図は、従来のレベル安定化回路を示すブロッ
ク図である。 1・・・入力端子、 2・・・論理回路、3・・・帯域
ろ波器、4・・・出力端子、 5・・・制御回路、8・
・・整流回路、9・・・基準電圧発生回路、 10・・
・比較回路。
FIG. 1 is a block diagram showing a level stabilizing circuit according to the present invention, and FIG. 2 is a block diagram showing a conventional level stabilizing circuit. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Logic circuit, 3... Bandpass filter, 4... Output terminal, 5... Control circuit, 8...
... Rectifier circuit, 9... Reference voltage generation circuit, 10...
・Comparison circuit.

Claims (1)

【特許請求の範囲】[Claims] 搬送波供給回路において、正弦波を入力するレベル安定
化素子としての論理回路と、該論理回路の出力である方
形波を正弦波に整形する帯域ろ波器と、該帯域ろ波器か
らの出力電圧を整流して得られる整流電圧と、基準電圧
とを比較して制御電圧を出力する制御回路とにより構成
され、該制御回路の制御電圧を前記論理回路の入力に印
加して、搬送波の出力レベルを安定にするようにしたこ
とを特徴とするレベル安定化回路。
In the carrier wave supply circuit, a logic circuit as a level stabilizing element that inputs a sine wave, a bandpass filter that shapes the square wave output from the logic circuit into a sine wave, and an output voltage from the bandpass filter. and a control circuit that compares the rectified voltage obtained by rectifying the voltage with a reference voltage and outputs a control voltage, and applies the control voltage of the control circuit to the input of the logic circuit to adjust the output level of the carrier wave. A level stabilizing circuit characterized by stabilizing the level.
JP14713084A 1984-07-16 1984-07-16 Level stabilizing circuit Pending JPS6125309A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14713084A JPS6125309A (en) 1984-07-16 1984-07-16 Level stabilizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14713084A JPS6125309A (en) 1984-07-16 1984-07-16 Level stabilizing circuit

Publications (1)

Publication Number Publication Date
JPS6125309A true JPS6125309A (en) 1986-02-04

Family

ID=15423236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14713084A Pending JPS6125309A (en) 1984-07-16 1984-07-16 Level stabilizing circuit

Country Status (1)

Country Link
JP (1) JPS6125309A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5874664A (en) * 1996-01-30 1999-02-23 Denso Corporation Air fuel ratio sensor and method for assembling the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5874664A (en) * 1996-01-30 1999-02-23 Denso Corporation Air fuel ratio sensor and method for assembling the same
US6178806B1 (en) * 1996-01-30 2001-01-30 Denso Corporation Air fuel ratio sensor and method for assembling the same
US6258234B1 (en) 1996-01-30 2001-07-10 Denso Corporation Air fuel ratio sensor
DE19703458B4 (en) * 1996-01-30 2008-06-19 Denso Corp., Kariya Air-fuel ratio sensor
DE19758940B4 (en) * 1996-01-30 2009-02-05 Denso Corp., Kariya-shi Method for assembling a gas sensor

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