JPS61248529A - Manufacture of resin layer - Google Patents

Manufacture of resin layer

Info

Publication number
JPS61248529A
JPS61248529A JP60088826A JP8882685A JPS61248529A JP S61248529 A JPS61248529 A JP S61248529A JP 60088826 A JP60088826 A JP 60088826A JP 8882685 A JP8882685 A JP 8882685A JP S61248529 A JPS61248529 A JP S61248529A
Authority
JP
Japan
Prior art keywords
film
solution
coated
resin
polyamide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60088826A
Other languages
Japanese (ja)
Inventor
Atsuko Iida
敦子 飯田
Takeshi Miyagi
武史 宮城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60088826A priority Critical patent/JPS61248529A/en
Publication of JPS61248529A publication Critical patent/JPS61248529A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

PURPOSE:To form a protective film with excellent flatness without any pinholes at all by a method wherein, when a resin film is formed on a semiconductor substrate or mounting substrate, the substrate is coated with varnish type resin solution and after preliminarily heating to form the resin film, this film is further coated with the resin film made of the same material thinned with solvent to be hardened at high temperature. CONSTITUTION:A semiconductor substrate formed of semiconductor element is spin-coated with polyamide solution while the surface is dried at a low temperature of around 150 deg.C for 15min to evaporate the solution into a polyamide film. Next the same polyamide solution is thinned with solvent to lower the viscosity from 1,700cp down to 200cp to cost the polyamide solution again and then heated to form another film around 10mum thick. Later this film is coated with rubber base negative resist film as usual and then the film 10mum thick is etched with hydrazine solution, using the negaresist film as a mask to form the film with specified shape. Through these procedure, any soft error due to alpha ray irradiation can be prevented from occurring.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体装置もしくは実装基板の製造方法（二係
り、特（：ポリイミド膜を半導体ウエーノ為もしくは実
装基板上にコーティングする方法の改善に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in a method for manufacturing a semiconductor device or a mounting board (particularly, a method for coating a semiconductor wafer or a mounting board with a polyimide film).

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

集積回路半導体素子の萬密度、高速度化が急速Ｃ：進展
している中で、信号の高速伝搬のため、半導体基板もし
くに実装基板に誘電率の低い絶縁膜が要求される。また
保護膜としてもたとえばＭＯｆ９ダイナミックＲＡＭ或
はＣＣＤ　（Ｃｈａｒｇｅ　ＣｏｕｐｊａｄＤｅｖｉｃ
ｅ　）など（ニパッケージ材料からのα線照射Ｃ二よる
ソフト・エラーが発生し、このソフト・エラーを抑える
対策がこれからの大容置化感二とって重要な問題となる
。As the density and speed of integrated circuit semiconductor devices are rapidly increasing, insulating films with low dielectric constants are required for semiconductor substrates or mounting substrates for high-speed signal propagation. Also, as a protective film, for example, MOf9 dynamic RAM or CCD (Charge Coupjad Device) can be used as a protective film.
Soft errors occur due to α-ray irradiation from package materials, and measures to suppress these soft errors will become an important issue in the future as the capacity increases.

そこで半導体基板もしくは実装基板とに所定厚の低誘電
率の高分子樹脂膜例えばポリイミド（εＶ＝３．８）を
絶縁層として形成し、信号伝搬の尚連化を計る方法がと
られている。またα線対策の一つとして保護膜をして利
用する方法もある。Therefore, a method has been adopted in which a low dielectric constant polymer resin film of a predetermined thickness, such as polyimide (εV=3.8), is formed as an insulating layer on a semiconductor substrate or a mounting board to further improve signal propagation. There is also a method of using a protective film as a measure against alpha rays.

し刀１しながら且記ポリイミド膜にスピンコード法で５
μｍ〜１０μｍを形成するため、通常粘度が大キく、ピ
ンホールが出来やすいという欠点を有していた。At the same time, the polyimide film was coated with a spin code method.
Because it forms a micrometer to 10 micrometers, it usually has a high viscosity and has the drawback of easily forming pinholes.

〔発明の目的〕[Purpose of the invention]

本発明の目的）１刀１かる欠点を解消して、ピンホール
のない平坦度の良好な樹脂層を得ることにある。(Objective of the present invention) It is an object of the present invention to solve the above drawbacks and obtain a resin layer with good flatness and no pinholes.

〔発明の概要〕[Summary of the invention]

本発明は半導体基板上もしくは実装基板上にワニス状の
樹脂を塗布し、予備加熱し、その最Ｊ：層に、下層より
も粘度の小さい樹脂層を同様に塗布し、予備加熱（二よ
り所定膜厚の樹脂層を形成した後、リンゲラフィブロセ
スにより所望のパターンとし、これを高温硬化させて樹
脂層とする工程が含まれていることを特徴とする。In the present invention, a varnish-like resin is coated on a semiconductor substrate or a mounting board, preheated, a resin layer having a lower viscosity than the lower layer is similarly coated on the uppermost layer, and preheated (two or more predetermined The method is characterized in that it includes a step of forming a resin layer with a film thickness, forming a desired pattern using Ringer's fibrosis process, and curing the pattern at a high temperature to form a resin layer.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例；：ついて詳細；；説明する。 Examples of the present invention will be described in detail below.

通常の半導体ウェーへプロセス（二よって形成された半
導体素子を具備してなる半導体基板上にポリアミド溶液
（１７０００Ｐ）をスピンコード法によって、全面５二
被覆した後、温度約１５０℃で約１５分間低温乾燥し溶
剤を蒸発させてポリアミド膜を形成し、引続いて同様の
方法にてそれを溶剤でうすめ、十分の一程度の粘度（２
００ＣＰ）ｔ：　ｌ、たちのを塗布し、予備加熱して１
０戸　の膜厚のポリアミド膜を形成する。次いで通常の
フォトプロセスを用いてゴム系のネガ・レジスト膜をポ
リアミド膜によって被覆された半導体基板上の所望館域
ζ二形成し該ネガ・レジスト膜をマスクとしてヒドラジ
ン等力１らｆ（るエツチング液を用いる通常のウェット
・エンチング法により上記ポリアミドｌｌＸ７Ｌの辿択
エツチングを行って所望パターンのポリアミド保護膜を
形成する。次いでこのポリアミド保護膜を温度４５０℃
時間約３０分間制温硬化させ該ポリアミド保護膜を充分
にキュアさせてポリイミド保護膜とする。A polyamide solution (17000P) is coated on the entire surface of a semiconductor substrate with a semiconductor element formed by a normal semiconductor wafer process (2) by a spin cord method, and then the temperature is about 150℃ for about 15 minutes. Dry and evaporate the solvent to form a polyamide film, which is then diluted with a solvent in the same manner to a viscosity of about one tenth (2
00CP) t: Apply 1, preheat and heat 1
A polyamide film with a film thickness of 0.0 mm is formed. Next, a rubber-based negative resist film is formed on the semiconductor substrate covered with the polyamide film using a conventional photo process, and etching with hydrazine is performed using the negative resist film as a mask. The above polyamide 11X7L is selectively etched by a conventional wet etching method using a liquid to form a polyamide protective film with a desired pattern.The polyamide protective film is then heated at a temperature of 450°C.
The polyamide protective film is cured at a constant temperature for about 30 minutes to be sufficiently cured to form a polyimide protective film.

〔発明の効果〕〔Effect of the invention〕

鼠との様な本発明ζ：よれば、ピンホールのない平坦度
の良好な樹脂膜が得られる。According to the present invention ζ:, a resin film with good flatness and no pinholes can be obtained.

代理人　弁理士　則　近　憲　佑 （ばか１名）Agent: Patent Attorney Noriyuki Chika (1 idiot)

Claims (1)

【特許請求の範囲】[Claims] 　半導体基板上もしくは実装基板上にワニス状の樹脂溶
液を塗布し、予備加熱によつて樹脂膜を形成し、その上
に下層で塗布した該樹脂よりも粘度の小さいものを最上
層に塗布して所定膜厚のパターンとし、次いで該樹脂層
を高温硬化させて絶縁膜や保護膜とする樹脂層の製造方
法。A varnish-like resin solution is applied onto a semiconductor substrate or a mounting board, a resin film is formed by preheating, and then a top layer is applied with a resin having a lower viscosity than the resin applied in the lower layer. A method for manufacturing a resin layer, which is formed into a pattern with a predetermined thickness, and then cured at a high temperature to form an insulating film or a protective film.
JP60088826A 1985-04-26 1985-04-26 Manufacture of resin layer Pending JPS61248529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60088826A JPS61248529A (en) 1985-04-26 1985-04-26 Manufacture of resin layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60088826A JPS61248529A (en) 1985-04-26 1985-04-26 Manufacture of resin layer

Publications (1)

Publication Number Publication Date
JPS61248529A true JPS61248529A (en) 1986-11-05

Family

ID=13953738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60088826A Pending JPS61248529A (en) 1985-04-26 1985-04-26 Manufacture of resin layer

Country Status (1)

Country Link
JP (1) JPS61248529A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6414925A (en) * 1987-07-09 1989-01-19 Fujitsu Ltd Semiconductor device
JPH05326491A (en) * 1992-05-15 1993-12-10 Nec Corp Manufacture of semiconductor device
US5719090A (en) * 1996-09-10 1998-02-17 International Business Machines Corporation Technique for forming resin-imprenated fiberglass sheets with improved resistance to pinholing

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6414925A (en) * 1987-07-09 1989-01-19 Fujitsu Ltd Semiconductor device
JPH05326491A (en) * 1992-05-15 1993-12-10 Nec Corp Manufacture of semiconductor device
US5719090A (en) * 1996-09-10 1998-02-17 International Business Machines Corporation Technique for forming resin-imprenated fiberglass sheets with improved resistance to pinholing
US5858461A (en) * 1996-09-10 1999-01-12 International Business Machines Corporation Technique for forming resin-impregnated fiberglass sheets with improved resistance to pinholing
US5871819A (en) * 1996-09-10 1999-02-16 International Business Machines Corporation Technique for forming resin-impregnated fiberglass sheets with improved resistance to pinholing
US6096665A (en) * 1996-09-10 2000-08-01 International Business Machines Corporation Technique for forming resin-impregnated fiberglass sheets with improved resistance to pinholing

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