JPS61245575A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61245575A JPS61245575A JP8702485A JP8702485A JPS61245575A JP S61245575 A JPS61245575 A JP S61245575A JP 8702485 A JP8702485 A JP 8702485A JP 8702485 A JP8702485 A JP 8702485A JP S61245575 A JPS61245575 A JP S61245575A
- Authority
- JP
- Japan
- Prior art keywords
- concentration
- diffusion layer
- semiconductor device
- diffusion
- high concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の拡散層の構造に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to the structure of a diffusion layer of a semiconductor device.
本発明は、半導体装置において、拡散層の構造が、表面
に不純物の高濃度の拡散層を有し、それに接して中濃度
の拡散層を有する構造とする事で濃度の急激な変化をな
くシ、局部的な電界集中を回避する事により、ホットキ
ャリアの発生を低減したり、耐圧の向上をするものであ
る。The present invention provides a semiconductor device in which the structure of the diffusion layer has a diffusion layer with a high impurity concentration on the surface and a diffusion layer with a medium concentration in contact with the diffusion layer, thereby eliminating rapid changes in concentration. By avoiding local electric field concentration, generation of hot carriers is reduced and breakdown voltage is improved.
従来の拡散層の構造は、一般的に行なわれている様に、
不純物の高濃度の拡散のみである。The structure of the conventional diffusion layer is, as is generally done,
Only high concentration diffusion of impurities occurs.
〔不発明が解決しようとする問題点と目的〕しかし、前
述の従来技術では、濃度の急激な変化により、局部的な
電界集中が生じ、短チャンネルの半導体装置では、十分
な耐圧を得られないばかりか、ホットキャリアの発生が
顕著となる問題が生じる。[Problems and objectives to be solved by the invention] However, with the above-mentioned conventional technology, rapid changes in concentration cause local concentration of electric fields, making it impossible to obtain sufficient withstand voltage in short-channel semiconductor devices. Moreover, a problem arises in which the generation of hot carriers becomes conspicuous.
そこで不発明は、この様な問題点を解決するもので、そ
の目的とするところは、十分な耐圧を有し、ホットキャ
リアの発生を低減する構造を、提供するところにある。Therefore, the invention is intended to solve these problems, and its purpose is to provide a structure that has sufficient breakdown voltage and reduces the generation of hot carriers.
本発明の半導体装置は、拡散層が、単一の不純物により
、表面に高濃度（１０１ｅ〜１０！！（コ／ｃｍ” ）
の拡散層を有し、それに接して、中濃度（＋Ｑｌ＠〜１
０′８コ／ｃｍ” ）の拡散層を有する構造を特徴とす
る特〔作用〕
本発明の上記の構造によれば、高濃度、中濃度の拡散層
を接する事で、濃度の急激な変化をなくす事により、電
界集中を緩和する事が可能となる。In the semiconductor device of the present invention, the diffusion layer has a high concentration (101e to 10!! (co/cm)) on the surface due to a single impurity.
, and in contact with it, there is a medium concentration (+Ql@~1
According to the above-described structure of the present invention, rapid changes in concentration can be prevented by bringing the high-concentration and medium-concentration diffusion layers into contact with each other. By eliminating this, it becomes possible to alleviate electric field concentration.
第一図は本発明の一実施例の断面図であり、そのときの
チャンネル方向の濃度分布を第２図に示す。半導体基板
（＋０１）に高濃度の拡散（１０２）に８１ｐ＋のｌ
ｏ”＞−”中濃度の拡散（＋０５）に８Ｐ＋の１０″ｍ
−”を有する。、実施方法としては、Ａｌｐ＋をＩ／Ｉ
の後、９５０℃２０分等の熱処理にょシ中濃度の拡散を
作った後もう一度Ｓｉｐ＋を■／工し、ランプアニール
等の瞬時アニールによって高濃度の浅い拡散を作る事に
よって作られる。本実施例においては拡散不純物にｌｊ
ｐ＋を使用しているが、他の不純物においても適用可能
である。FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 shows the concentration distribution in the channel direction. 81p+ l in high concentration diffusion (102) in semiconductor substrate (+01)
o">-"10"m of 8P+ for medium concentration diffusion (+05)
-”, as an implementation method, Alp+ is I/I
After that, after heat treatment at 950° C. for 20 minutes to create medium concentration diffusion, Sip+ is applied once again, and high concentration shallow diffusion is created by instantaneous annealing such as lamp annealing. In this example, the diffusion impurity is lj
Although p+ is used, other impurities are also applicable.
以上述べた様に本発明の構造によれば、電界集中が緩和
される事によシ、耐圧で数十優、ホットキャリアによる
コンダクタンスの劣化が５襲になるまでの時間で数百〜
数千倍の改善が可能である。As described above, according to the structure of the present invention, the electric field concentration is relaxed, the withstand voltage is in the tens of tens of points, and the time it takes for the conductance deterioration due to hot carriers to reach the 5th attack is in the hundreds or more.
Improvements of several thousand times are possible.
第１図は不発明の半導体装置の一実１ｌｌｌｉ例を示す
主要断面図。
第２図は、第１図のチャンネル方向の濃度分布を示すグ
ラフ。
第５図は従来の半導体装置を示す主巽断面図。
第４図は、第５図のチャンネル方向の濃度分布を示すグ
ラフ。
＋Ｏ１，＋０２・・・半導体基板
＋０２，２０２・・・ゲート電極
＋０５，２０５・・・ゲート絶縁寝
ＩＱ４，２０４・・・高濃度拡散層
１０５ ・・・中濃度拡散１−
以 上FIG. 1 is a main sectional view showing one example of an inventive semiconductor device. FIG. 2 is a graph showing the concentration distribution in the channel direction of FIG. FIG. 5 is a main cross-sectional view showing a conventional semiconductor device. FIG. 4 is a graph showing the concentration distribution in the channel direction of FIG. +O1, +02...Semiconductor substrate +02,202...Gate electrode +05,205...Gate insulation layer IQ4,204...High concentration diffusion layer 105...Medium concentration diffusion 1- or more
Claims (1)
おいて、表面に１０＾１＾９（コ／ｃｍ＾３）以上の濃
度の拡散層を有し、それに接して１０＾１＾６〜１０＾
１＾８（コ／ｃｍ＾３）の濃度の拡散層を有する事を特
徴とする半導体装置。In a semiconductor device in which a diffusion layer is formed of a single impurity, there is a diffusion layer on the surface with a concentration of 10^1^9 (co/cm^3) or more, and a concentration of 10^1^6 to 10 ^
A semiconductor device characterized by having a diffusion layer with a concentration of 1^8 (co/cm^3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8702485A JPS61245575A (en) | 1985-04-23 | 1985-04-23 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8702485A JPS61245575A (en) | 1985-04-23 | 1985-04-23 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61245575A true JPS61245575A (en) | 1986-10-31 |
Family
ID=13903386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8702485A Pending JPS61245575A (en) | 1985-04-23 | 1985-04-23 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61245575A (en) |
-
1985
- 1985-04-23 JP JP8702485A patent/JPS61245575A/en active Pending
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