JPS61244274A - Control system of pwm converter - Google Patents

Control system of pwm converter

Info

Publication number
JPS61244274A
JPS61244274A JP60084405A JP8440585A JPS61244274A JP S61244274 A JPS61244274 A JP S61244274A JP 60084405 A JP60084405 A JP 60084405A JP 8440585 A JP8440585 A JP 8440585A JP S61244274 A JPS61244274 A JP S61244274A
Authority
JP
Japan
Prior art keywords
current
pwm
output
converter
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60084405A
Other languages
Japanese (ja)
Other versions
JPH0817573B2 (en
Inventor
Yoshiro Tagami
田上 芳郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60084405A priority Critical patent/JPH0817573B2/en
Publication of JPS61244274A publication Critical patent/JPS61244274A/en
Publication of JPH0817573B2 publication Critical patent/JPH0817573B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

PURPOSE:To reduce a current unbalance by providing a circuit for compensating the current unbalance at every unit PWM converter in addition to a batch (current) control circuit. CONSTITUTION:A harmonic wave contained in a power source system is detected, a plurality of unit pulse width modulation control converters (PWM converters) 1a, 1b are multiplexed in parallel to suppress harmonic waves with the harmonic wave as a current command value Iu*to control a current. The sum of the output current of the converter 1 and the deviation of the command Iu* are amplified by an error amplifier 2, fed to PWM controllers 3a, 3b, and the semiconductor switching element of the converter 1 is driven together with a carrier through a carrier output circuit 5 from an oscillator 4. In this case, individual controllers are formed of a proportional circuit 7, and an error amplifier 8 for amplifying the deviations between the output of the circuit 7 and the outputs Iu of the converters 1. Thus, since the batch current controller which mainly contains the amplifier 2 is higher than the carrier of the individual current controller, its gain can be enhanced higher than the amplifier 8.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は複数の単位パルス幅変調制御変換器を並列接続
してなる多重化パルス幅変調制御変換装置の制御方式(
:関する。
Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a control method (
:Related.

[発明の技術的背景とその問題点] 第2図1;示す様(:例えば電源系統I:含まれる高調
波を検出しこれを電流指令値工υ として高調波を抑制
する為C二、複数の単位パルス幅変調制御変換器(以下
PWM変換器又は装置と記す)1g、1bを並列多重化
して電流制御されるPWM変換装會(ここでは2]1化
を例として図示した。)がある。
[Technical background of the invention and its problems] Figure 2 1; As shown (For example, power supply system I: In order to detect the included harmonics and use this as the current command value υ to suppress the harmonics, There is a PWM conversion device (here, 2] 1 is shown as an example) in which current is controlled by multiplexing unit pulse width modulation control converters (hereinafter referred to as PWM converters or devices) 1g and 1b in parallel. .

本装置C:於て電流制御する場合、PWM変換器la、
lbの出力電流IUl、 Iυ2の和と電流指令Iυ 
の偏差を誤差増幅器2で増幅し該増幅器出力(ユよるP
WM変換器出力電圧指令Ecを得る。(Iul、Iυ2
の一括電流制御方式)。この電圧指令Ecは各PWM変
換器のPWM制御回路3a、 3b (:、送られる。
When controlling the current in this device C: PWM converter la,
lb output current IUl, sum of Iυ2 and current command Iυ
The error amplifier 2 amplifies the deviation of
Obtain the WM converter output voltage command Ec. (Iul, Iυ2
(batch current control method). This voltage command Ec is sent to the PWM control circuits 3a, 3b (:,) of each PWM converter.

又4の発振器出力C:基づいてそれぞれのPWM変換器
1a、lb毎に位相をずらしfc(360’ / nの
位相差。
Also, the phase of each PWM converter 1a and lb is shifted based on the oscillator output C of 4: fc (phase difference of 360'/n).

nは多重化の数)搬送波が5の搬送波出力回路よリPW
M制御回路3a、 3b C送られ、3g、 3bの出
力C:より、PWM変換器1a、lbの半導体スイッチ
ング素子が駆動される。
n is the number of multiplexing) PW from a carrier wave output circuit with 5 carrier waves
The outputs C of M control circuits 3a and 3b are sent, and the semiconductor switching elements of PWM converters 1a and 1b are driven by the outputs C of 3g and 3b.

この方式では搬送波の位相をずらしている為(:それぞ
れPWM変換器出力電流IU1. IU、、ののリップ
ル電流が少くなり等測的t: P W M変換装置とし
ての搬送周波数が上り制御むだ時間要素が小さくなるの
で電流制御機能が向上する利点を持つ。これ5;対し第
2図に示す様にPWM変換器1a、lbは交流系統とり
アクドル5a、 5bを介して接続されているので、こ
のリアクトル値の誤差や初期電流値の違いでPWM変換
器間の電流不平衡を生じる欠点も有する。
In this method, since the phase of the carrier wave is shifted (: respectively, the ripple current of the PWM converter output current IU1. Since the elements are smaller, the current control function has the advantage of being improved.On the other hand, as shown in FIG. It also has the disadvantage of causing current imbalance between PWM converters due to errors in reactor values and differences in initial current values.

[発明の目的] 本発明の目的は多重化PWM装置に於て、上述し几一括
電流制御の利点を生じると共に、単位PWM変換器間の
電流不平衡を小さく出来るPWM変換装置の制御方式を
提供することを目的とする。
[Object of the Invention] The object of the present invention is to provide a control method for a PWM converter that can achieve the above-mentioned advantages of collective current control and reduce current unbalance between unit PWM converters in a multiplexed PWM device. The purpose is to provide.

[発明の概要] 本発明は、一括(電流)制御回路の他に各単位PWM変
換変換器量電流不平衡を補償する回路を設け、電流不平
衡を小さくすることを図ったものである。
[Summary of the Invention] The present invention aims to reduce the current unbalance by providing a circuit for compensating for the current unbalance of each unit PWM converter in addition to the collective (current) control circuit.

[発明の実施例] 第1図は本発明の一実施例を示す概略構成図であり、図
中7は電流指令IU”を各単位PWM変換器毎に割振る
比例回路(出力は通常工υ/n 、 nは多重化数)、
$a、 gbはそれぞれ谷PWM変換器の出力電流と7
の比例回路出力との偏差を増幅する誤差増幅器で電流不
平衡を補償する回路である。
[Embodiment of the Invention] Fig. 1 is a schematic configuration diagram showing an embodiment of the present invention, and 7 in the figure is a proportional circuit that allocates the current command IU'' to each unit PWM converter (the output is normally /n, n is the number of multiplexing),
$a, gb are the output current of the valley PWM converter and 7, respectively.
This circuit compensates for current imbalance using an error amplifier that amplifies the deviation from the proportional circuit output.

又他の構成要素は第2図と同様である。Other components are the same as those shown in FIG.

この様な制御方式を実施すると誤差増幅器2を主に構成
される一括電流制御回路は、等測微送波がga、 8b
を主として構成される個別電流制御回路の搬送波より高
いので、誤差増幅回路2の利得を誤差増幅回路8a、 
gbよりも高くとれ、前述した一括電流制御の利点であ
る出力電流°の制御性能を維持出来る。又8a、 gb
を王として構成される個別電流制御回路の誤差増幅器の
利得は2の利得よりもむだ時間要素が大きいので低くな
るが、単位PWM変換変換器量流指令値(比例回路7の
出力)C二補正しようと制御するので電流不平衡が改善
されること(−なる。筆者らの実験により、各単位PW
M変換器間の電流不平衡は本発明の補償なしのときに例
えば±10〜±20%程度あったものが本発明を実施す
ることで±2〜±3%程度C二抑えられることをM認し
た。
When such a control method is implemented, the collective current control circuit mainly composed of the error amplifier 2 has an isometry fine wave of ga, 8b.
Since it is higher than the carrier wave of the individual current control circuit mainly composed of , the gain of the error amplification circuit 2 is
gb, and the control performance of the output current °, which is an advantage of the collective current control described above, can be maintained. Also 8a, gb
The gain of the error amplifier of the individual current control circuit configured as a king is lower than the gain of 2 because the dead time element is larger, but let's correct the unit PWM conversion converter flow command value (output of proportional circuit 7) C2 As a result, the current imbalance is improved (-).According to the authors' experiments, each unit PW
The current unbalance between M converters, which was about ±10 to ±20% without the compensation of the present invention, can be suppressed by about ±2 to ±3% by implementing the present invention. Approved.

[発明の効果] 以上説明の様C二、本発明(ユよれば一括電流制御回路
と個別電流制御回路を設けること(−より装置としての
出力電流の制御性能(電流の追従性)を高め、又個別電
流制御回路(二より各単位PWM変換変換器量力電流の
不平衡を補正でき女定な制御が可能となる。
[Effects of the Invention] As explained above, the present invention (according to Yu) provides a collective current control circuit and an individual current control circuit (-) to improve the output current control performance (current followability) as a device, In addition, the individual current control circuit (2) can correct the unbalance of the output current of each unit PWM conversion converter, making it possible to perform precise control.

以上多重化構成の場合2重化を例として説明したがnx
化の場合は、個別電流制御回路をn個設け、搬送波出力
回路5の出力をn個、PWM制御回路もn個設ければ良
いことは容易に類推できる。
In the case of a multiplex configuration, duplexing was explained above as an example, but nx
In this case, it can be easily inferred that it is sufficient to provide n individual current control circuits, n outputs of the carrier wave output circuit 5, and n PWM control circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す構成図、第2図は本発
明の詳細な説明する為の説明図である。 記号の説明 la、 lb −・−P W M変換器 2.8a、 
8t)・・誤差増幅器3a、 3b・・・PWM制御回
路  4・・・発振器5・・・搬送波出力回路 5a、
 5b・・・リアクトル7・・・比例回路 代理人 弁理士 則 近 憲 佑(ほか1名)第1図 第2図
FIG. 1 is a configuration diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram for explaining the present invention in detail. Explanation of symbols la, lb -・-PWM converter 2.8a,
8t)...error amplifier 3a, 3b...PWM control circuit 4...oscillator 5...carrier output circuit 5a,
5b...Reactor 7...Proportional circuit agent Patent attorney Noriyuki Chika (and 1 other person) Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 複数の単位PWM変換器を並列接続してなる多重化PW
M装置に於て、前記各単位PWM変換器毎に搬送波の位
相をずらすと共に、電流指令値と前記各単位PWM変換
器の(入力)出力電流の総和をつき合せこの偏差出力を
零になる様に多重化PWM装置を制御する一括電流制御
回路と、各単位PWM毎に前記電流指令値を単位PWM
毎の電流指令値に割振った第2の電流指令値とそれぞれ
の単位PWM変換器の出力(入力)電流との偏差出力を
零になる様制御する個別電流制御回路を設け、単位PW
M変換器を前記一括電流制御回路の出力と各単位毎の個
別電流制御回路出力値の和でもって各単位PWM変換器
の電流制御を行なつて該多重化PWM装置の電流を制御
することを特徴としたPWM変換装置の制御方式。
Multiplexed PW made by connecting multiple unit PWM converters in parallel
In the M device, the phase of the carrier wave is shifted for each unit PWM converter, and the current command value is matched with the sum of the (input) output current of each unit PWM converter so that this deviation output becomes zero. A collective current control circuit that controls a multiplexed PWM device, and a current command value for each unit PWM unit PWM device.
An individual current control circuit is provided to control the deviation output between the second current command value assigned to each current command value and the output (input) current of each unit PWM converter to zero.
The current of the multiplexed PWM device is controlled by controlling the current of each unit PWM converter in the M converter using the sum of the output of the collective current control circuit and the output value of the individual current control circuit for each unit. Characteristic control method of PWM conversion device.
JP60084405A 1985-04-22 1985-04-22 Control method for voltage-type multiplexed PWM converter Expired - Lifetime JPH0817573B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60084405A JPH0817573B2 (en) 1985-04-22 1985-04-22 Control method for voltage-type multiplexed PWM converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60084405A JPH0817573B2 (en) 1985-04-22 1985-04-22 Control method for voltage-type multiplexed PWM converter

Publications (2)

Publication Number Publication Date
JPS61244274A true JPS61244274A (en) 1986-10-30
JPH0817573B2 JPH0817573B2 (en) 1996-02-21

Family

ID=13829677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60084405A Expired - Lifetime JPH0817573B2 (en) 1985-04-22 1985-04-22 Control method for voltage-type multiplexed PWM converter

Country Status (1)

Country Link
JP (1) JPH0817573B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008289354A (en) * 2007-05-19 2008-11-27 Converteam Ltd Control method for synchronization and phase of pulse width modulation (pwm) strategy of power converter

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002206566A (en) * 2001-01-11 2002-07-26 Toyoda Mach Works Ltd Driving force transmission controller

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610079A (en) * 1979-06-30 1981-02-02 Toshiba Corp Inverter
JPS58127575A (en) * 1982-01-20 1983-07-29 Mitsubishi Electric Corp Parallel operating system for inverters

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610079A (en) * 1979-06-30 1981-02-02 Toshiba Corp Inverter
JPS58127575A (en) * 1982-01-20 1983-07-29 Mitsubishi Electric Corp Parallel operating system for inverters

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008289354A (en) * 2007-05-19 2008-11-27 Converteam Ltd Control method for synchronization and phase of pulse width modulation (pwm) strategy of power converter
CN102868171A (en) * 2007-05-19 2013-01-09 科孚德机电技术有限公司 Control methods for the synchronisation and phase shift of the pulse width modulation (pwm) strategy of power converters
US9293921B2 (en) 2007-05-19 2016-03-22 Ge Energy Power Conversion Technology, Ltd. Control methods for the synchronization and phase shift of the pulse width modulation (PWM) strategy of power converters
CN102868171B (en) * 2007-05-19 2018-06-12 通用电气能源能量变换技术有限公司 Power inverter pulsewidth modulation(PWM)The control method of synchronization and the phase shift of strategy

Also Published As

Publication number Publication date
JPH0817573B2 (en) 1996-02-21

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