JPS61240787A - Data handling for tv signal - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for handling data in a received television signal of the MAC packet type, the television signal comprising digital data burst components in the form of time multiplexed components. The majority of the line period of a television frame that includes the vision component, the data burst component has a first and a second subcomponent in each frame forming data in the first and second subframes, respectively. 1 and 2 adjacent components, each subframe's data being organized as a packet multiplex. The invention also relates to an apparatus for use in the above method.

MAC packet type television signals are based on European Broadcasting Union document 5P8284, revised 3rd edition, rc-MA.
C packet system broadcasting satellite service standard television standard (Television Standard)
s for the 5atellite 3er
vicespecificationoftheC-M
ACPacket SVstem) J, December 1984, and S P B 352, Methods for the Transmission of rc-MAC Packet Signals to Small and Large Community Antennas and Cable Network Facilities (Lylethods for C
onveying C-MACPacket Sig
nals in 5mall and largeC
OIllUnitV Ante! nnaand C
able NetWOrkInstallation
) J December, and both are listed here for reference. , C-MAC and D-MAC
For packet systems, data is contained in two subframes in each television frame, and data related to a particular service is contained in one or both such subframes. Let's go. Keeping the required connections to a minimum so that the data from both subframes is easily available to the data recovery device and at the same time, in particular, packet formation and recovery are performed by separate integrated circuits. is necessary.

It is an object of the present invention to provide a method and apparatus for handling such data, while keeping such connections to a minimum.

The present invention provides a method for handling data of a received television signal of the MAC packet type, the television signal comprising a digital data burst component and a vision component in the form of time multiplexed components. - most of the line period of the frame, the data burst component has first and second adjacent subcomponents with first and second subcomponents in each frame forming data in the first and second subframes, respectively. The data of each subframe is organized as a packet multiplex, and the method is characterized by comprising the following steps. 1. extracting said data burst from said received television signal; ii. forming the data of the extracted data burst into individual packets associated with the first or second subframe; iii. forming correspondingly positioned packets from each subframe from the packets of the second subframe; substantially simultaneously applying the bits to the common data line with the bits from the packets of the first subframe alternating with the bits.

Thus, according to the present invention, only one data line is required to carry packets from both subframes.

The invention also relates to an apparatus for handling data in a MAC packet type television signal, the television signal comprising a digital data burst component and a vision component in the form of time multiplexed components. most of the line period of the John frame, and the data burst
The components form the first and second subframes in each frame forming data in the first and second subframes, respectively.
in a handling apparatus comprising first and second adjacent subcomponents having subcomponents, wherein the data of each subframe is organized as a packet multiplex, wherein said apparatus comprises a first and a second adjacent subcomponent having subcomponents; means for extracting a data burst; means for forming data of the extracted data burst into individual packets associated with the first or second subframe;
and means for substantially simultaneously applying correspondingly positioned packets from each subframe to the common data line with bits from the packet of the first subframe alternating with bits from the packet of the second subframe. It is a feature.

The method of forming data into individual packets depends on the data rate depending on the received signal and dinterleaving (de-interleaving).
interleaving) - Reduced audio/data FI compared to that of random access memory
It will have FO.

The above-mentioned and other features of the invention will be explained with reference to the accompanying drawings.

Figure 1 shows the above-mentioned European Broadcasting Union document 5P8284.
2 shows a block diagram of a decoder for a MAC television signal of the C-MAC type, as described in European Broadcasting Union Document 33 C352 mentioned above; In this figure, the first
The human lead 1 carries the demodulated video signal, while the second human lead 2 carries the demodulated data signal, which leads can be supplied from a separate demodulator in the case of C-MAC, while the type In the case of signals with B-variant II (D-MAC) they can be connected together.

The two input leads are assumed to carry time-coincident video and data signals at the demodulator output, which establishes the time data for which any differential path delay can be calculated. These input leads connect to the first unit (MAC
AN) 3, which performs a number of analog functions based on the applied signals. Video signal is unit 3
from there it is applied via connection 4 to a suitable A/D converter 5 for digitization (a suitable A/D converter is a Philips type P N
A 7507). In unit 3, the data signal is subjected to a slicing action, while data transition detection allows the 20.25 MHz master clock to enter and be phase-locked to the data, and the 20.25 MHz crystal 6 is connected to unit 3 for this purpose. It is connected to the. The resynchronized binary data is decoded from the deco binary if necessary and is taken out of the unit 3 by connection 7 together with the clock signal derived from the master clock.

The digitized video signal from the A/D converter 5 in the form of 7-bit digitized video samples at a speed of 20.25 MHz is sent via connection 8 to another unit (MAC8TOP) 9. , where the video signal is subjected to decompression and descrampling to generate parallel luminance Y and chrominance LJ/V samples at rates of 13.5 MHz and 6.75 MHz, respectively. The Y, U and V samples are passed from unit 9 via connections 10.11 and 12, respectively (appropriately such as Philips type P N 75113) D
/A converters 13, 14 and 15. The analog outputs of the D/A converters 13.14.15 are connected to the respective Y, U and Matrixing can be done by a fairly simple transistor circuit or by a Philips type T D
This is accomplished either by the use of integrated circuits such as the A8461.

Connection 7 carrying the binary data and clock signals from unit 3 is connected to the synchronization and data extraction unit (MAC8).
YNC) 19, and in that digital circuit MA
Synchronization information included in the C signal is extracted. This circuit is 2
It operates on the stage, first the 6-bit line synchronization word Wl,
Line synchronization is obtained by W2 detection and windowing, followed by frame synchronization by checking the Wl/W2 line synchronization word sequence. A digital flywheel circuit continuously checks that synchronization, once achieved, is maintained. Once global synchronization is achieved, the local timing chain provides all system timing. System timing is timing interconnect 20
is applied to the MACAN unit 3 and the MAC8TOR unit 9 by the MACAN unit 3 and the MAC8TOR unit 9. Synchronization signals for the display of RlG,B signals are taken from the MAC8YNC unit 19 by connection 21.

MAC8YNC unit 19 has two other major functions. The 8-bit data bus 22 is connected to the system interpretation (3l).
on) information (line 625 data, packet "0" and associated 8 packets) to microcomputer 23 and its random access memory (RAM) 24.

In addition, the data forming the packet multiplex of MAC signals (lines 1-623 provide 82 packets per subframe) is processed to format and drive the packet bus 25. This bus effectively comprises two serial data lines, one for each subframe (although actually multiplexed to save bins), one for each 6.75 MH
It is accompanied by a z clock signal and a confirmation signal. The data format of each line is a net speed of 3.375 Mbit/
It is a data format of serial dinterleave packet length bursts transmitted in seconds. Energy spread descrampling is also applied within the MAC8YNC unit 19 so that the packet bus data is subject to conditional access scrambling.
``Literally (
literal ) J.

The use of packet bus 25 allows restoration of any service within the multiplex by connecting an appropriate service decoder (service restoration device) to the bus.

This provides a data decoding building block structure that allows set manufacturers to provide many selected simultaneous services as required by simply duplicating recovery equipment. - As an example, as well as an audio output with the video signal, the decoder for the MAC receiver also provides a radio audio output, which can be used simultaneously with the video signal audio output by simply duplicating the audio recovery device. be made into Such a packet bus also allows the addition of newly defined services, such as packet telex or packet telesoftware, with appropriate restoration for these new services. It would only be necessary to develop the device.

The above-mentioned EBU documents SP 8284 and 3 p 1335
2 generally describes two services for which recovery devices can be defined, these are packet digital MW and cryptographic data services for conditional access purposes, which are covered in Parts 3 and 5 of this EBIJ document, respectively. It is described in. FIG. 1 therefore shows two suitable recovery devices connected to the packet bus 25, these being a packet digital recovery device (PDSR) 26 and a packet encryption recovery device (PER) 27. Each restoration device connected to the packet bus is programmed during operation with a packet address corresponding to the service or services selected by the user, and the set management software, as well as the set management software, makes this process transparent. These packet addresses are determined by software interpretation of packet "0" information by the microcomputer 23.
), and the programming of the packet address contains information necessary to ensure correct service decoding, such as information about the acoustic encoding used and whether it is mono/stereo, e.g. for PDSR equipment@26. arbitrary interpretation system tll (1nterpretation
n control) to the microcomputer 23 by connection 28 and each connection 29 and 30.
This is executed via an I2C bus connected to the PDSR device 26 and the PER device 27. Since cryptographic services are performed on two packet addresses, P
ER device 27 need not be programmed with both of these.

The recovery device converts the address of each packet on the packet bus 25 into the address (23,1 of Golay (GOIeV)).
2) Process only those packets that match (by code error correction) and compare with the programming value. Packet addresses on packet bus 25 are monitored simultaneously by all recovery devices. This means that packets from a particular service are either C-MAC signals or D-M
This means that it can be received from the corresponding packet position of any subframe of the AC signal. This means that, despite its physical organization as two data subframes, the broadcaster may
- Allows almost transparent use of the full multiplexing capacity of MAC signals. It should be noted that EBU documents SPB 284 and SPB 352 do not allow packets to carry the same service component to occupy the same relative position in each subframe.

Even if the data capacity of each subframe is 1.5 Mbit/
A fairly high transmission rate of 3.375M pits/second is used for each effective data line of the packet bus, although just over a second. This is quite international, and it means that in practice large gaps (on average 3.375M I (just under 900 bit periods in z) of duration) appear in the valid data.

These gaps are used by the MAC8YNC unit 19 to move 81 packets into and out of RAM 24, and the method used is described in our co-pending patent application no.
It is similar to that described in No. 6322.

The treatment of conditional access to video and data signals is still widely debated among broadcasters, set manufacturers and program suppliers alike. EBU document 3 p.
[Part 5 of 3284 and S P B 352, of course, specifies the service scrambling methods to be used, but notes that the actual systems used for "back-office management" are outside the scope of standardization.] clearly stated. The interface concept (rEBU standard interface) is explained as follows. That is, this conceptual interface (which need not correspond to any physical limitations of the receiver) represents the limit of standardization. As proposed, the role of the PER device 27 is to take encrypted data packets from the packet bus 25 and present their raw data content in a specific interface format.

At the same time, it has control access (CA
Control words CW1 and CW2 were used to seed a pseudorandom binary sequence (PRBS) generator that descrambled each 256 television frame from a controlled access system (not shown). Receive. All conditional access descrampling functions (PRBS1/3 and MAC8 of PDSR device 26)
Since the PRBS 2) of the TOR unit 9 is provided locally in the recovery device, simultaneous descrampling of separately scramped service sets is possible. To achieve this, the initialization word generated by the PER device 27 is
rds) IWl and IW2 connect to PD via connection 32
Applied to each connection 33 and 34 for application to the SR device 26 and the MAC8TOR unit 9. Additionally, a data input/output bus 49 connects PO3R26 with an external buffer random access memory (RAM>50.PO
The descrambled data from the 8R device 26 is ■2
It is led therefrom by an S-connection 35.

FIG. 2 shows some of the components of the MAC8YNC unit 19 in detail, as well as references to those used in FIG. 1 to show similar components. In Figure 2 the connections from the MACAN unit 3 carrying the data and clock signals are split and shown as two input fluids VC7' and 7'' respectively.20.25
The MHz clock signal is routed from input connection 7″ to the horizontal counter (
±1296) and a vertical counter (±625). timing chain 3
All system timing from 6 to timing device 3
7, and this timing is used not only within the MAC3YNC unit 19, but also outside it by the timing interconnect 20 and the connection 21 for display synchronization. timing chain 36
The counters therein are preset to a known timing relationship to the incoming signal by a synchronization extraction circuit 38 which also includes a digital wheel that checks that synchronization is maintained once acquired. The synchronization information provided to the incoming data at input connection 7' is therefore applied to the input of synchronization extraction circuit 38 in order to establish the above-mentioned timing relationship.

For energy spreading purposes, the incoming data is scrambled prior to transmission, and to descramble it, the scrambled data is applied to the first input of an exclusive OR (EXOR) gate 39;
The second human power is pseudorandom binary sequence (PRBS)
) is connected to a generator 40, which generator is specified in the above-mentioned EBU documents 5PB 284 and SPB 352. The data on line 625 is not subjected to energy spreading scrambling and therefore does not require such descrampling. Line 625 data is therefore captured prior to the descrambling process by line 625 capture circuit 41, where it is formatted into an 8-bit word prior to application to data bus 22.

Descrambled data bursts from other lines are passed from the output of EXOR gate 39 to the audio/data FIFO.
42, where the data is expanded from its high input rate to a lower and more manageable rate. This low-speed data is applied to deinterleaving random access memory (RAM) 43, and these RA
M, under the control of control circuit 44, produces an output on packet bus 25 whose bits are in their correct time sequence. Furthermore, BI packets can be transferred by the data bus 22 to the microcomputer 23 if detected and in the presence of Bl packets whose signal is detected at the input connection 45, just as their presence causes the packet address "0" to be transferred to the microcomputer 23. This is so that a packet with address "0" can be transferred when detected by the detector 46.

If such a presence is detected, the packet address “
The output of the 0'' detector 46 produces a ``high'' signal which is applied to the first input of the Noah gate 47, whose output is generally ``low'' to cause the output provided to the unit output 48 to be ``low''.
It has become “high”. Output 48 is microcomputer 2
3 (FIG. 1) and is used to signal that this packet rOJ should be loaded into RAM 24 by data bus 22. A BI packet whose signal is detected at input 45 will go "low" in the presence of the 81 packet, and will also cause the NOR gate 47 to load the RAM 24 with the 81 packet in a similar manner.
Set the output to "low".

FIG. 3 shows how the bits from the subframe packets are multiplexed onto the data lines of packet bus 25 of FIG. Figure 3a starts from bit 1 of the packet from one subframe (data "A").
751, while FIG. 3b shows the bits from the corresponding packet from another subframe (data "B") as residing in the RAM 43 of the MAC8YNC unit 19 of FIG. Figure 3C shows the RAM
Figures 3a and 3b show the data bits multiplexed from 43 onto the data lines of packet bus 25, with each bit derived alternately from two subframes (data rAJ and data "B"). half of the duration indicated by the bit. Even if the bit rate of the data brought on the packet bus 25 is 6.75 Mbit/s (thus the 6.75M tz clock signal is required), the instant of the packet from one subframe The data rate is 3.375 Mbit/sec. The confirmation signal VAL shown in FIG. 3d indicates the packet period during which an interleaved packet is valid in terms of the gap between adjacent pairs of packets as described in co-pending patent application No. 8,506,322 mentioned above. (1502 clock periods in 6.75 M Sat).

Since the MAC8YNC unit 19 will be in the form of an integrated circuit, multiplexing the packets from two subframes will reduce the number of bins required to extract that data from such an integrated circuit. Reducing the ratio to 2:1 would be appreciated. Recovery equipment [P D S R2B and P E
R27 is applied to select bits from the requested packet regardless of which subframe it appears in.

(Summary) In a C-MAC or D-MAC packet television signal receiver, the first subframe (data "A"
) are multiplexed with the correspondingly positioned packet bits of the second subframe (data "B") and applied to the data line of the packet bus, so that the bits from the two packets are Take turns.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a receiver employing the method and apparatus according to the present invention. FIG. 2 shows a block diagram of a synchronization and data extraction unit using the receiver of FIG. FIG. 3 is a diagram showing the time relationship. 1.2...Input lead 3...MACAN unit 4...Connection 5...A/D converter 6...Crystal 7.8...Connection M 9...MAC8TOR unit 10, 11 .12...Connection 13.14.15...
D/A converter 16, 17.18... Output connection 19... Synchronization/data extraction unit (MAC3YNC
)20...Timing interconnection 21...Connection 22
...Data bus 23...Microcomputer 2
4...RAM, 25...Packet bus 26...Packet digital sound restoration device (PDSR) 27...
Packet encryption recovery device (PER) 28-35...Connection 36...Timing chain 37...Timing device 38...Synchronization extraction circuit 39...Excl.
Shivor (ExOR) gate 40...pseudo random 2
PRBS sequence generator 41...capture circuit 42...sound @/data FIFO
43... Dinterleaping RAM 44... Control circuit 45... Input connection 46... Packet address rOJ detector 47... Noah gate 48... Unit output 49... Data power/output bus 50. ...External Buffer RAM Patent Applicant N.B.Philips Fluiran Benfabriken Procedures Amendment May 15, 1985 Commissioner of the Patent Office Michibe Uga Indication of Case 16 Patent Application No. 50697 of 1986 No. 2, Name of the invention Handling of television signal data 3, Relationship to the amended case Name of patent applicant N.B. Philips Fluiranbenfabriken 4, Agent ■. "Packet" on page 6, line 4 of the specification is "packet"
Correct. 2. Correct ``Tsuiteino'' on page 15, line 15 of the same page to ``J''. 3. Correct "Priprogera" in line 7 of page 16 to "Priprogera". 4. Correct rI"sJ on page 19, line 9 of the same to rI2cJ. 5. Change "elergi" to "energy" on page 20, line 14 of the same.
Correct. 6. On page 21, line 5, "prior to the process" is corrected to "prior to the process." 7. Correct r&EWJ on page 23, line 7 to ``put''. 8. Figure 1 of the drawings is corrected as shown in the attached drawing.

Claims (1)

Claims: 1. A method for handling data in a received television signal of the MAC packet type, the television signal comprising a digital data burst component and a vision component in the form of time multiplexed components. The majority of the line period of a television frame that includes a component, the data burst component having first and second subcomponents in each frame forming data in the first and second subframes, respectively. a second contiguous subcomponent, wherein the data of each subframe is organized as a packet multiplex, the method comprising: i. extracting the data burst from the received television signal; ii; forming the data of the extracted data burst into individual packets associated with the first or second subframe; and iii. forming correspondingly positioned packets from each subframe from the packets of the second subframe; 1. A method for handling data in a received television signal, comprising the steps of: substantially simultaneously applying bits to a common data line with bits from packets of a first subframe alternating with bits. 2. [Citing drawings] A data handling method substantially described herein. 3. An apparatus for handling data in a MAC packet type television signal, the television signal comprising television frames comprising a digital data burst component and a vision component in the form of time multiplexed components. the data burst component comprises first and second adjacent subcomponents with first and second subcomponents in each frame forming data in the first and second subframes, respectively. , in a handling device in which the data of each subframe is organized as a packet multiplex, means for extracting said data burst from said television signal when said device receives said extracted data burst; means for forming data into individual packets associated with the first or second subframe; and means for alternating correspondingly positioned packets from each subframe with bits from packets of the second subframe; means for substantially simultaneously applying bits from packets of data to a common data line. 4. The above means for forming data into individual packets,
4. Device according to claim 3, characterized in that it comprises an audio/data FIFO whose data rate is reduced compared to that in the received signal and in the deinterleaving random access memory. 5. A data handling device substantially as described herein with reference to the drawings.