JPS61237466A - Manufacture of bipolar transistor - Google Patents

Abstract

PURPOSE:To form another main electrode region finely without being short- circuited with other regions by shaping another main electrode region and an inactive control electrode region in a self-alignment manner by using a residual insulator as a mask. CONSTITUTION:The ions of an N-type impurity are implanted by employing insulators 11a left on both sides of an emitter opening section 12 and oxide films 6 and 10 as masks. The whole is heat-treated. Consequently, an N<+> emitter region 13 is shaped while a P-type impurity is diffused from polysilicon 9 to form a P<+> region 14 as an inactive base region. Opening sections are shaped to the oxide film 10 and the oxide film 6 on an N<+> region 5, and an emitter electrode 15, a base electrode 16 and a collector electrode 17 are formed. Consequently, a mask alignment process is used only when said polycrystalline semiconductor is shaped substantially, thus simplifying processes. Another main electrode region can be formed finely without being short-circuited with other regions.

Description

DETAILED DESCRIPTION OF THE INVENTION [-Industrial Application Field] The present invention relates to a method for manufacturing bipolar transistors, and particularly to a novel method for easily manufacturing small-sized bipolar transistors.

[Prior art and its problems] In order to manufacture large-scale integrated circuits, it is necessary to eliminate dead spaces and to miniaturize each element as much as possible.

However, with conventional methods for manufacturing bipolar transistors, there is a limit to the miniaturization of transistors. For example, in conventional manufacturing methods, diffusion regions such as an element isolation region, a collector region, an emitter region, and a base region are each formed using separate mask patterns. In this method, if the regions are placed too close to each other, short circuits or punch-through phenomena between the emitter region and the collector region are likely to occur due to errors in mask alignment. therefore.

It is necessary to form each diffusion region with a margin in size and position in consideration of errors in mask alignment, which poses an obstacle to miniaturization of elements.

[Means for Solving the Problems] A method for manufacturing a bipolar transistor according to the present invention includes a method for manufacturing a bipolar transistor having a main electrode region made of one conductivity type semiconductor and a control electrode region made of one opposite conductivity type semiconductor. , a first step of forming an insulating film having an opening on the one main electrode region, and forming the control electrode region using the insulating film as a mask; a second step of bonding to a part of the control electrode region; and covering other parts of the control electrode region and the polycrystalline semiconductor with an insulator and etching the insulator to form a side surface of the polycrystalline semiconductor. and a third step of leaving the insulator on the side surface of the opening, and forming the other main electrode region in another part of the control electrode region using the remaining insulator and the polycrystalline semiconductor as a mask. and a fourth step of forming an inactive control electrode region containing a high concentration of impurities in a portion of the control electrode region bonded to the polycrystalline semiconductor.

[Operation] In this way, since the other main electrode region (for example, emitter region) and the inactive control electrode region (inactive base region) are formed in a self-aligned manner using the residual insulator as a mask, the mask alignment process is performed. This is substantially only when forming the polycrystalline semiconductor, which simplifies the manufacturing method and allows the other main electrode region to be formed minutely and without shorting with other regions.

[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.

FIGS. 1A to 1E are manufacturing process diagrams showing an embodiment of a method for manufacturing a bipolar transistor according to the present invention.

First, in the same figure (A), on the p-type silicon substrate l,
An n+ buried layer 2 and an n-type silicon epitaxial layer 3 are formed thereon, and ohmic contact is made between a collector electrode and a P element isolation region reef for electrically isolating each element region. n0 regions 5 are formed by diffusion. Subsequently, a silicon oxide film 8 is formed over the entire surface of the wafer, and an opening 7 for forming a base region is formed by etching. Subsequently, oxidized H
Using 8 as a mask, P-type impurity ions (for example, boron ions, etc.) are implanted, and heat treatment is performed to form a base region 8 by diffusion.

Next, polysilicon 9 doped with p-type impurities is deposited on the entire surface of the wafer, and an oxide film 10 is further formed on the polysilicon by CVD or thermal oxidation (see Figure (B)).
].

Next, the polysilicon 3 and the oxide 15I10 are partially removed by photolithography, and the polysilicon 8 and the oxide 15IIQ are removed from the portion where the base electrode is to be formed.
Then, using the CVO method, an insulating layer 1f111 of silicon oxide or the like is deposited so as to form an overhang at the stepped portion [FIG. 4(C)].

Next, the entire surface of the wafer is etched by anisotropic etching using RIE (reactive ion etching).

This anisotropic etching is performed until the semiconductor surface of the base region 8 is exposed. At this time, an insulating film is formed on the side surfaces of the oxide film C and the side surfaces of the polysilicon 3 and the oxide 1910. 1 of the insulator 11a remains to form the emitter opening 12 [FIG. 2(0)].

Next, using the insulator 11a and the oxide films 8 and 10 on both sides of the emitter opening 12 as masks, n-type impurity ions (for example, phosphorus ions) are implanted, and heat treatment is performed to remove the implanted impurities. The n+ emitter region 13 is formed by diffusion, and at the same time, the p-type impurity is diffused from the polysilicon 3 to form the p+ region 1 as an inactive base region.
4 is formed. M, oxide film lO and n+ region 5
After forming an opening in the upper oxide film 8 and depositing a metal such as A1, patterning is performed to form an emitter electrode 15. in the emitter opening s12. Base electrode 1B and collector electrode 17
[Figure (E) 1].

Note that the present invention uses a polycrystalline semiconductor containing impurities as an electrode, forms a first diffusion region by diffusion of impurities from this polycrystalline semiconductor, and leaves an insulator on the side surface of the polycrystalline semiconductor. The present invention can also be easily applied to a method of manufacturing a semiconductor device in which a second diffusion region is formed using this residual insulator as a mask for selective diffusion.

[Effects of the Invention] As explained above in detail, the method for manufacturing a bipolar transistor according to the present invention uses the residual insulator as a mask to form the other main electrode region (e.g. emitter region) and inactive control electrode region (inactive control electrode region). Since the base region (base region) is formed in a self-aligned manner, the mask alignment process is substantially only required when forming the polycrystalline semiconductor, thereby simplifying the process.

Furthermore, since the other main electrode region can be formed minutely and without shorting with other regions, it is possible to reduce the dimensions of the transistor, and also to increase the speed of operation when integrated. This leads to an improvement in yield.

Further, since the impurity contained in the polycrystalline semiconductor is diffused to form an inactive control electrode region containing a high concentration of impurity, the base resistance of the bipolar transistor is reduced and the transistor operation is increased.

[Brief explanation of drawings]

FIGS. 1A to 1E are manufacturing process diagrams showing an embodiment of a method for manufacturing a bipolar transistor according to the present invention. 1...-p-type silicon substrate 3...11 n-type epitaxial region 711... opening 8... p-base region 9.1
111 Polycrystalline silicon lO・・Insulating layer 11a*Φ・Residual insulator 12・
・O emitter opening 13... n0 emitter region 14... inactive base region I5 ・I+# emitter electrode 18... base electrode! 7
... Collector electrode agent Patent attorney Seki Yamashita Child Figure 1 (B) (C)

Claims (3)

[Claims] (1) In a method for manufacturing a bipolar transistor having two main electrode regions made of one conductivity type semiconductor and a control electrode region made of an opposite conductivity type semiconductor, an insulating film having an opening over the one main electrode region. a first step of forming the control electrode region using the insulating film as a mask, and a second step of bonding the polycrystalline semiconductor containing impurities of the opposite conductivity type to a part of the control electrode region. , covering other parts of the control electrode region and the polycrystalline semiconductor with an insulator, and etching the insulator to leave the insulator on the side surface of the polycrystalline semiconductor and the side surface of the opening. 3 steps, forming the other main electrode region in another part of the control electrode region using the remaining insulator and the polycrystalline semiconductor as a mask, and forming the other main electrode region in the part of the control electrode region joined to the polycrystalline semiconductor; A method for manufacturing a bipolar transistor, comprising: a fourth step of forming an inactive control electrode region containing a high concentration of impurities. (2) The method for manufacturing a bipolar transistor according to claim 1, wherein the insulator in the third step is formed by chemical vapor deposition. (3) The method for manufacturing a bipolar transistor according to claim 1, wherein the etching of the insulator in the third step is anisotropic etching.