JPS61236241A - Operating system for degeneracy of information transmitter - Google Patents

Operating system for degeneracy of information transmitter

Info

Publication number
JPS61236241A
JPS61236241A JP60076492A JP7649285A JPS61236241A JP S61236241 A JPS61236241 A JP S61236241A JP 60076492 A JP60076492 A JP 60076492A JP 7649285 A JP7649285 A JP 7649285A JP S61236241 A JPS61236241 A JP S61236241A
Authority
JP
Japan
Prior art keywords
degeneracy
fault
input
data
card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60076492A
Other languages
Japanese (ja)
Other versions
JPH0570974B2 (en
Inventor
Yasuhiro Noguchi
野口 康弘
Takao Nouchi
隆夫 野内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60076492A priority Critical patent/JPS61236241A/en
Publication of JPS61236241A publication Critical patent/JPS61236241A/en
Publication of JPH0570974B2 publication Critical patent/JPH0570974B2/ja
Granted legal-status Critical Current

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  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To apply degeneracy operation of an information transmitter without unnecessary data processing and data transmission by separating immediately a faulty part when a slave station detects a fault. CONSTITUTION:If a process input card 12 of a slave station 3 is faulty, the card 12 sends a fault signal to a control electronics circuit CE 11. The CE 11 input a fault input to a processor 5 via a bus 9. The processor 5 uses a fault interruption routine of a program incorporated in a ROM 7 to recognize a group address and a word address for the fault and sets fault information and a degeneracy parameter into an error table and a degeneracy parameter storage table of the corresponding group address and word address. In fetching an input signal, the degeneracy parameter storage table in a RAM 8 is used to check at first the presence of degeneracy in the unit of groups and then to check whether the degeneracy in the unit of cards exists in the corresponding group or not, and when the degeneracy parameter is set, the card is not scanned but the next word is scanned.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は情報伝送装置に係シ、特に入出力装置の一部分
が故障を起した場合に故障部を切離しくアクセスを中止
)、他の正常な部分のみで運用を行い、かつ親局に故障
を知らせることを要求される監視制御システムに関する
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an information transmission device, in particular, when a part of an input/output device malfunctions, the malfunctioning part is isolated and access is stopped), and other normal operations are performed. The present invention relates to a supervisory control system that operates only in one part and is required to notify a master station of failures.

〔発明の背景〕[Background of the invention]

従来の装置は、特開昭58−19069号に記載のよう
に通常伝送の間に故障検知用のチェックフレームを定期
的に挿入し、子局の故障検出を行い縮退運用を行ってい
た。しかし、故障発生から親局による故障検出→縮退ま
での間、装置が異常状態のまま運用される為、リアルタ
イム性に乏しく、不要データが子局より送出されるとい
う欠点があった。
As described in Japanese Patent Laid-Open No. 58-19069, conventional devices periodically insert check frames for failure detection during normal transmission to detect failures in slave stations and perform degenerate operation. However, since the device is operated in an abnormal state from the occurrence of a failure until the master station detects the failure and degenerates, there is a drawback that real-time performance is poor and unnecessary data is sent from the slave station.

〔発明の目的〕[Purpose of the invention]

本発明の目的は子局にて故障検出を行うと直ちに故障部
を切離すことによシ、不要なデータ処理及びデータ伝送
を行うことなく情報伝送装置縮退運用を行なわせる情報
伝送装置の縮退運用方式を提供するにある。
An object of the present invention is to perform degenerate operation of an information transmission device by immediately disconnecting a failed part when a failure is detected in a slave station, thereby performing degenerate operation of the information transmission device without performing unnecessary data processing or data transmission. There is a method to provide.

〔発明の概要〕[Summary of the invention]

本発明は情報伝送装置において、子局の入力回路に故障
が起った場合にも端末故障検知用のチェック7レームを
送信するまで正常時と同様に入力データを親局に送信し
、親局にて受信データを処理していることに着目し、子
局において故障検出を行った場合には故障部の入力デー
タを親局に送信することなく、子局自ら故障部を切離し
親局に故障情報を送信することにより、親局の負担を軽
減し、データ伝送の効率を上げ更にシステムの信頼性向
上を図ったものである。
The present invention provides an information transmission device in which, even when a failure occurs in the input circuit of a slave station, the input data is transmitted to the master station in the same way as in normal conditions until a check 7 frame for terminal failure detection is transmitted. Focusing on the fact that the received data is processed in the slave station, when a failure is detected in the slave station, the slave station itself disconnects the failed part without transmitting the input data of the failed part to the master station and informs the master station of the failure. By transmitting information, the burden on the master station is reduced, data transmission efficiency is increased, and system reliability is improved.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例を第1図〜第13図によシ説明
する。第13図はシステム構成図、第1図は装置構成図
、第2図は今回発明の入力回路である。図において1は
伝送を管理する中央処理装置としての親局であり、2は
親局とそれぞれの子局3を結ぶ信号伝送装置である。又
、子局3は信号伝送装置2とつながるデータ送受信部4
と複数のデータ入出力部101送受信回路と複数のデー
タ入力回路を結ぶバス9及びマイクロプロセッサ5、マ
イクロプロセッサ5と内部バス6で結ばれているR、0
Mメモリ7、RAMメモリ8からなっている。ROMメ
モリ7には第3図〜第5図に示されるプログラムが内蔵
されており、RAMメモリ8にはグループ別の故障検出
テーブル及びカード単位のエラー状況を格納するエラー
テーブル(第7図)、CE単位及び入力カード単位の縮
退パラメータを格納する縮退パラメータ格納テーブル(
第6図)、子局の現状値を格納する現状値格納テーブル
(第9図)、及び状態変化が起ったワードを時間データ
を付加して格納する状態変化格納テーブル(第8図)が
内蔵されている。
An embodiment of the present invention will be described below with reference to FIGS. 1 to 13. FIG. 13 is a system configuration diagram, FIG. 1 is a device configuration diagram, and FIG. 2 is an input circuit of the present invention. In the figure, 1 is a master station as a central processing unit that manages transmission, and 2 is a signal transmission device that connects the master station and each slave station 3. Further, the slave station 3 has a data transmitting/receiving section 4 connected to the signal transmission device 2.
and a bus 9 that connects the transmission/reception circuit to the plurality of data input/output sections 101 and the plurality of data input circuits, and a microprocessor 5, and a bus R, 0 connected to the microprocessor 5 by an internal bus 6.
It consists of an M memory 7 and a RAM memory 8. The ROM memory 7 has built-in programs shown in FIGS. 3 to 5, and the RAM memory 8 has a failure detection table for each group and an error table (FIG. 7) that stores error status for each card. Degenerate parameter storage table (which stores degenerate parameters for each CE and input card)
(Figure 6), a current value storage table (Figure 9) that stores the current values of slave stations, and a status change storage table (Figure 8) that stores words where a status change has occurred with time data added. Built-in.

通常、本装置はプロセス入力カード12によシ被監視装
置よシ特定のスキャン間隔にてデータを入力し、CEl
lによシ該当するグループアドレス及びワードアドレス
を付加し、バス9を介しプロセッサ5に入力データを渡
す。プロセッサ5はRAMメモリ8にある現状値格納バ
ッファよプ渡されたデータに該当するグループアドレス
及びワードアドレスの現状値データを読み出し、入力デ
ータとの比較を行う。状態変化がなければ入力データを
そのまま捨て、次のワードアドレスのスキャンに移行し
、もし状態変化が起こっていれば該当する現状値格納パ
ックアを今回の入力データに書き替え、且つ同じ<RA
Mメモリ8にある状態変化格納テーブルに時間信号を付
加し格納する。
Typically, the device inputs data from the monitored device via a process input card 12 at specific scan intervals, and
The corresponding group address and word address are added to l, and the input data is passed to the processor 5 via the bus 9. The processor 5 reads the current value data of the group address and word address corresponding to the data passed from the current value storage buffer in the RAM memory 8, and compares it with the input data. If there is no change in state, the input data is discarded as it is, and the process moves on to scanning the next word address. If a change in state has occurred, the corresponding current value storage packa is rewritten with the current input data, and the same <RA
The time signal is added to and stored in the state change storage table in the M memory 8.

尚、状態変化データは親局に送信された時点で状態格納
テーブルよシ消され、又、状態変化格納テーブルが満杯
となった場合は現状値格納テーブルのみ書き替えを行い
、状態変化格納テーブルには反映されないものとする。
In addition, the state change data is deleted from the state storage table at the time it is sent to the master station, and if the state change storage table becomes full, only the current value storage table is rewritten and the state change data is deleted from the state change storage table. shall not be reflected.

この様にして取込まれた現状値データ、及び状態変化デ
ータは親局の要求に応じて各々プロセッサ5によシ送信
フォーマットにデータ変換され送受信回路4及び信号伝
送装置2を介し、特定のポーリング周期にて親局1に送
信される。ポーリング方式においては、状態変化データ
の送信要求を行うのが通常であり、その時点における全
状態変化データを(必要とあらば複数回数に分け)送信
するのが原則となっている場合が多い。従来装置ではこ
の様な場合に入力カードに故障が起こシ、偽υの状態変
化検出が頻発すると親局は次め故障検出チェックフレー
ム送信まで1子局の状態変化検出に多大な時間を要した
。又、親局からのパラメータローディング後の縮退運用
時においても状態変化格納テーブルには多数の送信処理
を必要とする信頼性の低いデータが残シ、現状値格納テ
ーブルには故障発生後の信頼性の低いデータが残るとい
う欠点があった。
The current value data and status change data taken in in this way are converted into a transmission format by the processor 5 in response to a request from the master station, and sent via the transmitter/receiver circuit 4 and the signal transmission device 2 to a specific polling data. It is transmitted to the master station 1 at regular intervals. In the polling method, a request is usually made to send state change data, and in many cases, the principle is to send all state change data at that time (divided into multiple times if necessary). In conventional devices, when a failure occurs in the input card in such a case, and false υ state change detection occurs frequently, the master station takes a large amount of time to detect the state change of one slave station until the next failure detection check frame is sent. . In addition, even during degenerate operation after parameter loading from the master station, unreliable data that requires multiple transmission processes remains in the status change storage table, and unreliable data that requires multiple transmission processes remains in the current value storage table. The disadvantage was that low data remained.

本発明はこの欠点をなくしたものであり、以下に本発明
における故障発生時の処理について述べる。
The present invention eliminates this drawback, and the processing when a failure occurs in the present invention will be described below.

プロセス入力カード12に故障が起こるとプロセス入力
カード12は故障信号をCEIIに出力する。故障信号
を受は九〇EIIはバス9を介し、プロセッサ5に故障
割込を入力する。故障割込を受けたプロセッサ5はRO
M7に内蔵されたプログラムの故障割込ルーチンにより
、故障の起ったグループアドレス及びワードアドレスを
認知し、該当するグループアドレス及びワードアドレス
のエラーテーブル並びに縮退パラメータ格納テーブルに
それぞれの故障情報及び縮退パラメータを設定する。次
に入力信号取込の際には縮退パラメータ格納テーブルに
よシ、まずグループ単位の縮退の有無を調べ、次に該当
するグループにカード単位の縮退かあるかどうかを調べ
、縮退パラメータが設定されていなければ前記スキャン
を行い、縮退パラメータが設定されていれば、そのカー
ドはスキャンすることなく次のワードのスキャンに移行
する。入力信号取込みルーチン終了後、親局にデータ送
信を行う場合には几AM8内のエラーテーブルのグルー
プ別故障検出テーブルを調べ、故障発生による縮退があ
る場合には親局に故障発生のフラグを立てその旨を知ら
せ、親局からのクモ1−トデータローデイングによる縮
退との区別を行う。故障発生を知った親局は必要とあら
ば工2−情報の送信を子局に要求し、要求を受けた子局
はエラーテーブルのグループ別故障検出テーブルに′1
″′が立っているグループのグループアドレスとそのグ
ループのエラーテーブルを親局に送信すると共に送信を
終了したグループのグループ別故障検出テーブルのビッ
トを10″′クリアを行い、一連の動作が終了する。親
局は必要に応じて、状態変化データや現状値データの送
信要求を行うが、本実施列によれば、常に現状値格納テ
ーブルには最新且つ正しいデータが曙保出来ると共に故
障発生後の入力回路によるデータの取込みを防止し、信
頼性の低いデータを親局に送信しない為、伝送効率及び
親局の処理効率を上げ、システム全体の信頼性及び処理
能力が向上するという効果がある。
When a failure occurs in the process input card 12, the process input card 12 outputs a failure signal to the CEII. Upon receiving the fault signal, the 90EII inputs a fault interrupt to the processor 5 via the bus 9. The processor 5 that received the failure interrupt is RO
The fault interrupt routine of the program built into the M7 recognizes the group address and word address where the fault has occurred, and stores the respective fault information and stuck-in parameters in the error table and stuck-in parameter storage table for the corresponding group address and word address. Set. Next, when input signals are captured, the degeneracy parameter storage table is used to first check whether there is degeneracy in groups, then check whether the corresponding group has degeneracy in card units, and set the degeneration parameters. If not, the above-mentioned scan is performed, and if the degeneration parameter is set, the card is not scanned and the next word is scanned. After completing the input signal capture routine, when transmitting data to the master station, check the group-by-group failure detection table of the error table in the AM8, and if there is degeneration due to a failure, set a flag for failure in the master station. This is notified and distinguished from degeneracy due to spider data loading from the master station. When the master station learns of the occurrence of a fault, it requests the slave station to send the information if necessary, and the slave station that receives the request writes '1' in the group-by-group failure detection table of the error table.
The group address of the group for which ``'' is set and the error table of that group are sent to the master station, and the bit of the group failure detection table of the group whose transmission has ended is cleared to 10'', and the series of operations ends. . The master station requests the transmission of status change data and current value data as necessary, but according to this implementation sequence, the current value storage table can always contain the latest and correct data, and can also be input after a failure occurs. Since data is prevented from being taken in by the circuit and unreliable data is not sent to the master station, transmission efficiency and processing efficiency of the master station are increased, and the reliability and processing capacity of the entire system are improved.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、子局入力装置に故障が起った場合に子
局において直ちに故障部をカード単位にて切離し、他の
正常な部分にて縮退運用を行うことが出来るので、不要
なデータ処理及びデータ伝送t−行うことなくシステム
の運用が出来且つ子局よシ親局に故障情報が送られるの
でシステムの信頼性向上の効果がある。
According to the present invention, when a failure occurs in the slave station input device, it is possible to immediately disconnect the failed part in each card in the slave station and perform degraded operation using other normal parts, so that unnecessary data is The system can be operated without any processing or data transmission, and since failure information is sent from the slave station to the master station, the reliability of the system is improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の装置構成図、第2図は故障検出回路を
もった入力回路の一実施例、第3図は入力信号取込ルー
チン、第4図は故障割込ルーチン、第5図はデータ送信
ルーチン、第6図は縮退パラメータ格納テーブル、第7
図はエラーテーブル、第8図は状態変化データ格納テー
ブル、第9図は現状値格納テーブル、第10図は故障縮
退ビットの一送信フオーマット列、第11図は本発明の
タイムチャート、第12図は従来装置のタイムチャート
、第13図はシステム構成図である。 1・・・親局、2・・・信号伝送装置、3・・・子局、
4・・・送受1回路、5・・・マイクロプロセッサ、6
・・・内部バス、7・・・R,(JMメモリ、8・・・
几AMメモリ、9・・・I10バス、10・・・データ
入力装置、ll・・・CB(コントロールエレクトロニ
クス)、12・・・故障検出回路をもった入力回路、1
3・・・PI10接続バス、14・・・入力信号選択回
路、15・・・多重選択検出回路、16・・・f−タ人
力インターフエース回路、17・・・フォトカプラー、
18・・・リレー。
Fig. 1 is a configuration diagram of a device according to the present invention, Fig. 2 is an embodiment of an input circuit having a failure detection circuit, Fig. 3 is an input signal acquisition routine, Fig. 4 is a failure interrupt routine, and Fig. 5 is the data transmission routine, Figure 6 is the degenerate parameter storage table, and Figure 7 is the data transmission routine.
The figure shows an error table, FIG. 8 shows a status change data storage table, FIG. 9 shows a current value storage table, FIG. 10 shows a transmission format string of failure regression bits, FIG. 11 shows a time chart of the present invention, and FIG. 12 is a time chart of a conventional device, and FIG. 13 is a system configuration diagram. 1... Master station, 2... Signal transmission device, 3... Slave station,
4...1 transmission/reception circuit, 5...Microprocessor, 6
...internal bus, 7...R, (JM memory, 8...
几AM memory, 9...I10 bus, 10...data input device, ll...CB (control electronics), 12...input circuit with failure detection circuit, 1
3... PI10 connection bus, 14... Input signal selection circuit, 15... Multiple selection detection circuit, 16... f-ta human interface circuit, 17... Photocoupler,
18...Relay.

Claims (1)

【特許請求の範囲】[Claims] 1、伝送回線を介して親局に接続される子局の情報伝送
装置において、プロセス入出力回路の故障検出を行う故
障検出回路を設け、プロセス入出力回路アクセス時に故
障検出を行つた場合には、当該プロセス入出力回路のア
クセスを中止し、次の親局へのデータ送信時にその旨を
報告するようにしたことを特徴とする情報伝送装置の縮
退運用方式。
1. In the information transmission device of the slave station connected to the master station via the transmission line, if a failure detection circuit is installed to detect a failure in the process input/output circuit, and the failure is detected when the process input/output circuit is accessed, A degenerate operation method for an information transmission device, characterized in that access to the process input/output circuit is stopped and a report to that effect is made at the time of data transmission to the next master station.
JP60076492A 1985-04-12 1985-04-12 Operating system for degeneracy of information transmitter Granted JPS61236241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60076492A JPS61236241A (en) 1985-04-12 1985-04-12 Operating system for degeneracy of information transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60076492A JPS61236241A (en) 1985-04-12 1985-04-12 Operating system for degeneracy of information transmitter

Publications (2)

Publication Number Publication Date
JPS61236241A true JPS61236241A (en) 1986-10-21
JPH0570974B2 JPH0570974B2 (en) 1993-10-06

Family

ID=13606716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60076492A Granted JPS61236241A (en) 1985-04-12 1985-04-12 Operating system for degeneracy of information transmitter

Country Status (1)

Country Link
JP (1) JPS61236241A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01261954A (en) * 1988-04-13 1989-10-18 Hitachi Ltd Data processing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01261954A (en) * 1988-04-13 1989-10-18 Hitachi Ltd Data processing system

Also Published As

Publication number Publication date
JPH0570974B2 (en) 1993-10-06

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