JPS6123478A - Picture display device - Google Patents

Abstract

PURPOSE:To obtain a stable picture while keeping always horizontal synchronizing of the picture by providing a synchronizing signal processing means generating a new horizontal synchronizing signal and inserting the new horizontal synchronizing signal to a location in which the horizontal synchronizing signal is missing. CONSTITUTION:The horizontal synchronizing signal H is fed to a 2/455 frequency division circuit 51 and a pseudo horizontal synchronizing signal H' pulse is outputted to a position where a subcarrier fsc is subject to 2/455 frequency division from the phase inputted at first. When the signals H' and H are ANDed by an AND circuit 53, a gate output HA is obtained in the form of the pseudo horizontal synchronizing signal only when the signal H is missing. The output HA is used as a trigger signal to activate a monostable multivibrator 54 to generate an interpolation pulse HB having the same pulse width as that of the signal H. The pulse HB and the signal H are ORed by an OR gate 55 t obtain a new horizontal synchronizing signal H'', which is utilized in placed of the conventional signal H.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention generates an electron beam for each division when a screen on a screen is vertically divided into a plurality of divisions, and generates an electron beam for each division. The present invention relates to an apparatus for displaying a plurality of lines by vertically deflecting a beam to display a television image as a whole.

Conventional configurations and their problems Traditionally, cathode ray tubes have been mainly used as display elements for displaying color television images, but conventional cathode ray tubes are extremely long and thin compared to the screen size. It was impossible to create a shaped television receiver. In addition, although EL display elements, plasma display devices, liquid crystal display elements, etc. have recently been developed as flat display elements, all of them are insufficient in terms of performance such as brightness, contrast, and color display, and have not been put into practical use. It has not yet been reached.

Therefore, in order to achieve a flat display device using an electron beam, the present application proposed a new display device in Japanese Patent Application No. 56-20618 (Japanese Unexamined Patent Publication No. 57-185590).

'This method generates an electron beam for each section when the screen is vertically divided into multiple sections, and deflects each electron beam vertically for each section to create multiple lines. The television image is displayed as a whole.

First, a basic configuration example of the image display element used here will be explained with reference to FIG. This display element consists of a back electrode (1), a line cathode (2) as a beam source, a vertical focusing electrode (3), a vertical deflection electrode (4), and a beam flow control electrode, in order from the rear to the front. (5), horizontal focusing electrode (6), horizontal deflection electrode (7), beam acceleration electrode (8)
and a screen plate (9), which are housed inside a flat glass bulb (not shown) that is evacuated. A line cathode (2) serving as a beam source is stretched horizontally so as to generate an electron beam distributed linearly in the horizontal direction.
) are arranged vertically at appropriate intervals. In Figure C, (2a
) to (2d) are shown).

In this embodiment, it is assumed that 15 pieces are provided. Let them be (2a) to (2o).

These wire cathodes (2) are constructed by coating the surface of a tungsten wire with a diameter of 10 to 201 iφ with an oxide cathode material for thermionic emission. And these line cathodes (
2a) to (2o) are heated so as to generate a thermionic electron beam by passing an electric current through them, and as will be described later, the electron beams are emitted in sequence from (2a) for a certain period of time. controlled as follows.

The back electrode (1) suppresses the generation of electron beams from other line cathodes other than the line cathode that is controlled to emit electron beams for a certain period of time, and directs the generated electron beams only in the forward direction. It has the effect of pushing out.

This back electrode (1) may be formed by a coating of electrically conductive material applied to the inner surface of the rear wall of the glass bulb.

Moreover, a planar electron beam emitting cathode may be used instead of the back electrode (1) and the linear cathode (2).

The vertical focusing electrode (3) is a conductive plate (2) having a horizontally long slit 01 facing each of the line cathodes (2a) to (20), and focuses the electron beam emitted from the line cathode (2) onto the vertical focusing electrode (3). It is taken out through slit 00 and focused vertically. Electron beams for one horizontal line (860 pixels) are taken out at the same time. In the figure, only one section in the horizontal direction is shown. Slit Q
0 may be provided with crosspieces at appropriate intervals in the middle, or it may be a row of through holes arranged horizontally at small intervals (nearly touching intervals). It may also be configured as a slit. Vertical focusing electrode (3Y
is also similar.

A plurality of vertical deflection electrodes (4) are arranged horizontally at intermediate positions between the slits, and conductor bars are provided on the upper and lower surfaces of the insulating substrate 0, respectively. It is made up of things. Then, a vertical deflection voltage is applied between the opposing conductors 01α and 01′ to deflect the electron beam in the vertical direction.

In this embodiment, the electron beam from one line cathode (2) is vertically deflected to a position corresponding to 16 lines by a pair of conductors as at. and 16 vertical deflection electrodes (
4), 15 pairs of conductors corresponding to each of the 15 &afl poles (2) are constructed, and the electron beam is ultimately deflected to draw 240 horizontal lines on the screen (9).

Next, the control electrodes (5) each consist of a conductive plate (c) having a long slit in the vertical direction, and a plurality of control electrodes (5) are arranged in parallel in the horizontal direction at predetermined intervals. In this example, 180 control electrode conductive plates (15-1) to
(15-n) (only nine are shown in the figure). Each of the control electrodes (5) extracts the Seiko beam horizontally by dividing it into two picture elements each, and controls the amount of the beam passing therethrough in accordance with a video signal for displaying each picture element. Therefore, the conductive plate (15) for the control electrode (5)
-1) If 180 lines of (15-n) are provided, 860 pixels can be displayed per horizontal line. In addition, in order to display the image in color, each picture element is displayed with 8-color phosphors of R, G, and B, and each control electrode (5) has two picture elements of R, G, and B. Each video signal of B is added sequentially. In addition, 180 control electrodes (5) conductive plates (15-
1) 18/1942 for each of ~(15-n)
0 sets (2 picture elements per set) of video signals are applied at the same time, and one line of video is displayed at one time.

Horizontal focusing electrode (6) is the sleeve of the control electrode (5)) Q4
It consists of a conductive plate aη having a plurality of vertically long slits α (180 slits) facing each other, and focuses the electron beams of each picture element divided horizontally in the horizontal direction. Create a narrow electron beam.

A plurality of horizontal deflection electrodes (7) are arranged vertically on each side of the slit QQ on a conductive plate)
Six levels of horizontal deflection voltage are applied to each electrode (9) to deflect the electron beam for each pixel in the horizontal direction, resulting in two horizontal deflections on the screen (9).
Each set of R, G, and B phosphors is sequentially irradiated to emit light. In this embodiment, the deflection range is two picture elements wide for each electron beam.

The accelerating electrode (8) is made up of a plurality of conductive plates (horizontally installed at the same position as the vertical focusing electrode (4)), and it focuses the electron beam on a screen () with sufficient energy.
9) Accelerate so that it collides with

The screen (9) is coated with a phosphor (e) that emits light when irradiated with an electron beam on the back side of the glass screen, and
A metal back layer (not shown) is added. The phosphor (E) is inserted into one slit Q of the control electrode (5).
4, that is, for each electronic beam divided horizontally, two pairs of eight-color phosphors, R, G, and H, are provided. It is applied in one stripe. Screen (9) in Figure 1
The dashed lines drawn in indicate vertical divisions displayed corresponding to each of the plurality of line cathodes (2), and the two-dot chain lines are displayed corresponding to each of the plurality of control electrodes (5). Indicates the horizontal division.

As shown in the enlarged view in Figure 2, one section partitioned by these two pixels has two picture elements of R, G, and B in the horizontal direction.
phosphor (1), and has a width of 16 lines in the vertical direction. For example, the size of one section is 11111 mm in the horizontal direction. There are nine cabinets in the vertical direction.

It should be noted that in FIG. 1, the length in the horizontal direction is drawn to be much larger than the length in the vertical direction for the sake of clarity.

In addition, in this embodiment, one control electrode (5), i.e. one
For the electron beam of the book, only one pair of R, G, and H phosphors (e) is provided for two picture elements, but of course, it is also possible to provide one picture element or eight or more picture elements. In this case, R, G, and B video signals for one picture element or eight or more picture elements are sequentially applied to the control electrode (5), and horizontal deflection is performed in synchronization with this.

Next, the basic configuration and waveforms of each part of a drive circuit for displaying television images on this display element will be explained with reference to FIG. First, a driving portion for irradiating the screen (9) with an electron beam to emit raster light will be described.

! ! ! The source circuit (2) is a circuit for applying a predetermined bias voltage (operating voltage) to each electrode of the display element, -vl is applied to the back electrode (1), vertical focusing electrode (3) (3f d1.
tV, , V5, horizontal focusing voltage tM(6) is Vj
, V8 for the accelerating electrode (8), ■9 for the screen (9)
Apply a DC voltage of

Next, a composite video signal of a television signal is applied to the input terminal (), and a vertical synchronizing signal V and a horizontal synchronizing signal H are separated and extracted in a synchronization separation circuit (2).

The vertical deflection drive circuit is composed of a vertical deflection counter (2), a memory for storing vertical deflection signals (2), and a digital-to-analog converter (hereinafter referred to as I)-A converter). As input pulses to the vertical deflection drive circuit, a vertical synchronizing signal V and a horizontal synchronizing signal fjH shown in FIG. 4 are used. The vertical deflection counter (8 bits) is reset by the vertical synchronizing signal V and counts the horizontal synchronizing signal (2). For this vertical deflection counter), the effective scanning period excluding the vertical retrace period of the vertical period (in this case, 24
This count output is supplied to the address of the memory (2). Vertical deflection signal data corresponding to each address (here 1
0 bit) is output and converted into the vertical deflection signal U e 11' shown in FIG. 4 (FIG. 3(b) D) by the DA converter). This circuit has memory addresses for storing vertical deflection signals corresponding to each line for 240H, and by storing regular data in the memory every 16H, it is possible to obtain 16 levels of vertical deflection signals. can.

On the other hand, the line cathode W, the opening circuit (towards) uses the vertical synchronizing signal V and the output of the vertical deflection counter) to generate the line cathode drive pulse a.
% Create Q. FIG. 5(a) shows the vertical synchronization signal V,
horizontal synchronization signal H and vertical deflection counter)
Shows the relationship between bits. FIG. 6(b) shows a method of creating line cathode drive pulses a' to θ' every 16H using these signals. In Figure 5, LSB indicates the lowest bit, (
LSB+1) means the most significant bit of the LSB.

The first line cathode drive pulse a' is generated using the vertical synchronizing signal V and the output (LSB+4) of the vertical direction counter □□□.
The line cathode drive pulses b' to 0' can be generated using an S flip-flop, etc., and the line cathode drive pulses b' to 0' are output (LS
It can be obtained by transferring the inverted version of B+8) as a clock. These drive pulses a' to 0' are inverted and converted into a line cathode drive pulse a%0, which has a low potential only during each pulse period and a high potential of about 20 volts during other periods (see Fig. 8). (b) E) is added to each line cathode (2a) to (2o).

Each line cathode (2a) to (2o) receives its driving pulse a''-
”.

A current is applied to heat the electrode during the high potential period of , and the heated state is maintained so that electrons can be emitted during the low potential period of the drive pulses a to 0. As a result, 16 green ink lines (2a
) to (2o), low potential drive pulses a to
Electrons are emitted only during the 16H period in which 0 is added. During periods when a high potential is applied, the line cathode (2a ) ~ (2o) Since the high potential applied to (2o) is more positive, green ti! 1i (2a) ~ (2o
) does not emit electrons.

Thus, at the line cathode (2), during the effective vertical scanning period, from the upper green shade aii (2a) to the lower line cathode (
2o), electrons are emitted sequentially for each 16H period.

The emitted electrons are pushed forward by the back electrode (1), and the opposite slit 0 of the vertical focusing electrode (3)
0 and is focused in the vertical direction to form a flat electron beam.

Next, the line cathode drive pulse a~0 and the vertical deflection signal t) or
)' will be explained using FIG. ! l
! The direct deflection signal t)sr)' is one of each line cathode pulse a to O.
6I (changes by IH during the period and changes in 16 steps. Vertical deflection signals v, !: v' and the center voltage are v
4, V increases sequentially and V' decreases sequentially, so that they change in opposite directions.

These vertical deflection signals V and V' are applied to the vertical deflection electrodes (
4), and as a result, the electron beams generated from the respective line cathodes (2a) to (20) are vertically deflected in 16 steps, and the electron beams are applied to the screen (9) as described above. At the top, one electron beam is deflected so as to draw a 16-line raster one line at a time from the top.

As a result of the above, electron beams are emitted for each 16H period starting from the top of the 15 line cathodes (2a) to (2o),
Each electron beam is deflected one line at a time from top to bottom within 15 sections in the vertical direction, so that on the screen (9), from the first line at the top to the second line at the bottom.
The electron beam is vertically deflected one line at a time up to the 40th line, and a total of 240 raster lines are drawn.

The vertically deflected electron beam is sent to the control electrode (5).
It is divided into 180 sections in the horizontal direction by a horizontal focusing electrode (6) and taken out. In Figure 1, one of them
The classification is shown. The amount of this electron beam passing through each section is controlled by a control electrode (5), and is focused horizontally by a horizontal focusing electrode (6) into a single narrow electron beam. The light is deflected in six steps in the direction and sequentially irradiates each of the R, G, and B phosphors for two picture elements on the screen (9). FIG. 2 shows the vertical and horizontal divisions. Control electrode (5
) The phosphors corresponding to (15-1) to (15-n) are R, G, and B for two picture elements, but for convenience of explanation,
One pixel is R15GI*B1 and the other is R2e G2 s
Let's call it B2.

Next, the horizontal deflection drive circuit is a horizontal deflection counter @
(11 bits), a memory storing a horizontal deflection signal), and a DA converter (to). The input pulse of the horizontal deflection drive circuit 61) is synchronized with the vertical synchronizing signal ■ and the horizontal synchronizing signal H as shown in FIG.
A pulse 6H with a repetition frequency of 6 times that of 6H is used. The horizontal thinning counter is reset by the vertical synchronizing signal V and counts the horizontal 6-fold pulse 6H. This horizontal deflection counter) is 6 times during IH and 24 times during 1
0H
) outputs horizontal deflection signal data (in this case 8 bits) according to the address, and the data of hs J+' shown in Fig. 7 (Fig. 8 (b) is converted into a horizontal deflection signal such as In this circuit 6 x 24
There is a memory address for storing the horizontal deflection signal corresponding to each line, and by storing 6 pieces of regular data in the memory for every 1 line, the horizontal (translation) of 6-step waves can be performed during the IH period. You can get surface signals.

This horizontal deflection signal is a pair of horizontal deflection signals ri and h' that change in six steps as shown in FIG. These horizontal deflection signals @h, h' are applied to the electric currents ti (c) and Qi of the horizontal deflection electrode (7), respectively.As a result, they are divided in the horizontal direction. Each electron beam passes through the screen (9) during each horizontal period.
R, G, B, R, G, B (R+.

G1. J, R2, G2. It is horizontally deflected so that the phosphor of Bl) is sequentially irradiated with H/6. Thus, in each line raster, the electron beam is R+ e G+ s for each of the 180 horizontal sections.
Each phosphor (a) of Ble R2* G2 e B2 is sequentially irradiated.

Therefore, for each horizontal section of each line, the electron beam is
By modulating with the video signal G1 m Bl * R2m G2 m B2, a color television image can be displayed on the screen (9).

Next, the modulation control portion of the electron beam will be explained. First, the composite video signal applied to the television signal input terminal (to) is applied to the color demodulation circuit (to), where R
-Y and B-Y color difference signals are demodulated, G-Y color difference signals are matrix-synthesized, and then they are combined into a luminance signal Y.
is synthesized with R,G.

B primary color signals (hereinafter referred to as R, G, and B video signals) are output. Those R, G, B6 video signals are 180
Group sample hold times @ (81-1) ~Cs1-
n). Each sample hold circuit (Sl-1
) to (81-n) are for R1, G1, B, and
It has six sample and hold circuits for R2, G2, and B. These sample and hold outputs are respectively applied to holding memories (82-1) to (j)n).

On the other hand, the reference clock oscillator is constituted by a PLL (1000's locked loop) circuit, etc., and in this embodiment generates a reference clock 6fsc that is six times the color subcarrier fSC and a reference clock 2fsc that is twice the color subcarrier fSC. The reference clock is controlled to always have a constant position with respect to the horizontal synchronization signal H.

The reference clock 2f8c is added to the deflection pulse generation circuit), and a signal fj6H that is six times the horizontal synchronization value @H and a signal switching pulse rlegl*1)Ier2*g2el) for each i are added.
2 (FIG. 8(b) B) is obtained. On the other hand, the reference clock 6f8c is applied to the sampling pulse generation circuit (b), where it is delayed by one clock period by a shift register, so that the horizontal period (68,5μ
1080 sampling pulses R11lGll static BIf e RI2 ・ G12s B12 during the effective horizontal scanning period (about 50μ5ec) of
・R21 meeting G21 So 1321 s R
229G229'Bgg~Rnt,'nt*Bn
1*Rn2e Gn, e Bnffi (@s figure (b) A) are generated sequentially, and then one transfer pulse t is generated. This sampling pulse R11~Bn
2 corresponds to each picture element when one line of the video to be displayed is divided into 86 G picture elements in the horizontal direction, and its position is controlled so that it is always - constant with respect to the horizontal synchronization signal H. .

These 1080 sampling pulses R1□~Bn! are each 180 sets of sample and hold circuits (81-1)
~(81-n), and thereby each sampling hold circuit (81-1) ~(al-n)
When dividing the l line into 180 parts, each 2
R1e Gl m Bl s R2, G2 * for picture elements
Each BQ video signal is individually sampled and held. The 180 sets of R1m that were sampled and held
The video signals of G1 e B1 e R2e G, , B are transferred all at once to 180 sets of memories (82-1) to (82-n) by a transfer pulse t after the completion of the sample hold of 1 line and 2 minutes. is held for one horizontal period. This retained RI.

The Gt*Bt*R2*Gjj e Bg signal is applied to switching circuits (85-1) to (85-n). Switching circuit (85-1) ~<as-n
) are respectively t″LARI I Go1 * Bl * J
*It is composed of a tri-state or analog gate having individual input terminals of G, , B2 and a common output terminal that sequentially switches and outputs them.

The output of each switching circuit (85-1) to (85-n) is 180 sets of pulse width modulation (PWλf) times FN! I(
87-1) to (87-n), where sample and hold R, , G, , B, meeting R29G
The reference pulse signal is pulse width modulated according to the magnitude of the H.29B2 video signal and output. The repetition period of the reference pulse signal is the above signal switching pulse r1 * gts
It is desirable that the pulse width be sufficiently smaller than the pulse width of bl*rg*gffi*b'jr, and for example, a pulse width of about 1:10 to 1:100 is used.

The outputs of the pulse width modulation circuits (87-1) to (87-n) are used as control signals for modulating the electron beam.The 180 conductive plates (15-1) to 180 of the control electrodes (5) of display atoms
(15-n) respectively. Each switching circuit (85-1) to (85-n) has a switching pulse r applied from a switching pulse generation circuit.
l m gl s b1* rg e gll @ b
2, the switching is controlled at the same time. The switching pulse generation circuit is a signal switching pulse rl from the aforementioned deflection pulse generation circuit.

It is controlled by g1*t)l #rg e g2m b2, and each horizontal period is divided into 6 and the switching circuits (85-1) to (85-n) are switched by H/6, R1e Gl m Bl * R2eG , I n,
The switching signals @ rs @ gl * b, o r9 * g! ! *
Generate b2.

What should be noted here is that the switching circuit (85-1
) ~(85-n) R1 @ Gl * Bl
e R2m Gjj *Electron beam R1* G by switching the supply of B and I video signals and the horizontal deflection drive circuit
The horizontal deflection of irradiation switching to the phosphor of l m Ble R2t G2 * 82 is synchronously controlled so that it completely matches both the timing and the order. As a result, when the electron beam is irradiating the R1 phosphor, the irradiation amount of the electron beam is controlled by the R1 video signal, and the G1. B1. R2, G2. B
2 is controlled in the same way, and R1#Gl of each picture element
t Bl e Role Gjl e B! The light emission of each phosphor is the R1e Gle Bl # R□ of that picture element.
Each picture element is controlled by the G* and B video signals, and each picture element is displayed by emitting light according to the input video signal. Such control consists of 180 sets (2 sets each) for 1 line.
This is done simultaneously for each picture element (one picture element at a time) to display an image of 860 picture elements per line, and then for each 240-minute line one by one starting from the upper line.
Two images will be displayed.

The above operations are performed on one input television signal.
This is repeated for each field, and as a result, a moving television image is displayed on the screen (9) in the same way as a normal television receiver.

In the above configuration, one of the outputs of the synchronous separation circuit shown in FIG.
If the horizontal synchronizing signal H is lost due to some reason such as noise, the horizontal synchronization of the image display device will not be achieved, causing serious image distortion.

Purpose of the Invention The purpose of the present invention is to always apply a horizontal synchronizing signal or a signal close to it to the drive circuit of an image display device, thereby always maintaining horizontal synchronization of the image and obtaining a stable image. .

Structure of the Invention The present invention provides an image display device as described above, which includes a horizontal synchronization signal output of a synchronization separation circuit and a pseudo horizontal synchronization signal generation circuit that frequency-divides a color subcarrier by 27455 in synchronization with the horizontal synchronization fd@ output. A synchronization signal processing means is provided to process the output of the UI horizontal synchronization signal and generate a new uI horizontal synchronization signal using the pseudo horizontal synchronization signal at the position where the horizontal synchronization signal is missing, and the new horizontal synchronization signal is sent to the horizontal synchronization signal. By inserting the signal at the position where the signal is missing, stable horizontal synchronization can always be obtained.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 8th
The figure shows a basic configuration diagram. The synchronous separation circuit (2
) is provided with a 2/455 frequency dividing circuit which divides the frequency of the color subcarrier fsc by 2/455 in synchronization with the output of the horizontal synchronizing signal H. This 2/455 frequency division name is a pseudo horizontal synchronization signal generation circuit, and its output pseudo horizontal synchronization signal @" and synchronization separation circuit
The output horizontal synchronizing signal H is inputted to a synchronizing signal processing circuit 154 that processes the horizontal synchronizing signal H to generate a new horizontal synchronizing signal H', and the generated new horizontal synchronizing signal H' is used in place of the conventional H.

FIG. 9 shows a more specific circuit example diagram, and its operation will be explained based on the timing diagram of FIG. 10.

The synchronously separated H pulse is 2/45 of the 9-bit counter.
It is applied to the 5 frequency divider circuit fiIJ, and a pulse of the pseudo horizontal synchronization signal is output at a position where f8c is divided by 2/455 from the first input phase. This output is sent to the pulse of the horizontal synchronization signal H. Adjust the phase so that it is synchronized with the falling edge (Next, when the pseudo horizontal synchronization signal of the frequency divider circuit and the horizontal synchronization signal H of the feed are ANDed with the horizontal synchronization signal H of the feed, the horizontal synchronization signal H of the feed is Only in the clock old product where is missing, the gate output IIA is obtained in the form of a pseudo-horizontal synchronization signal.This gate output H is used as a trigger to operate a monostable oscillator, which has the same pulse width as the horizontal synchronization signal H. Generate an interpolation pulse Hi.The width of this pulse is determined by the time constant of C1R1.By ORing this interpolation pulse HB and the horizontal synchronization signal H for sending using an OR gate,
A new horizontal synchronization signal H' can be obtained.

Effects of the Invention According to the present invention, only when the horizontal synchronization signal is lost,
Using a pseudo-generated internal synchronization signal, synchronization can normally be performed with the feed horizontal synchronization signal, and safe synchronization can be achieved even when the signal is replaced or the signal is lost due to a feed failure. It is possible.

[Brief explanation of the drawing]

Figure 1 is a structural diagram inside the panel of the image display device, Figure 2 is a diagram showing unit image collections on the screen, Figure 8 is a block diagram of the drive circuit and waveform diagrams of each part, and Figure 4 is the vertical deflection signal. FIG. 5 is a timing diagram of the counter, FIG. 6 is a correlation diagram of drive output pulses, FIG. 7 is a diagram of the relationship between horizontal deflection signals and synchronization signals, and FIG. 8 is an example of an implementation of the present invention. A main part configuration diagram showing an example, FIG. 9 is a specific circuit diagram thereof, and FIG. 10 is a timing chart thereof. (1)...Back electrode, (2J(2a)-(20)...
・Line cathode, (3) (3rd... vertical focusing electrode, (4)
... Vertical lunar surface electrode, (5) ... Beam flow control electrode,
(7)...Horizontal deflection electrode, (9)...Screen plate, Ql...slit, (e)...phosphor, ■...
Synchronous separation port circuit, (2) Vertical deflection counter, (E) Line cathode drive circuit, (2) Memory, (2)
・・Horizontal deflection counter, ・・・Memory, ・・・
・Color demodulation circuit, (81-1) to (81-n)...Sample hold circuit, (82-1) to (82-n)...
・Memory, (to)...Reference clock oscillator, (b)・
...Sampling pulse generation circuit, (85-1) to (8
5-n)... Switching circuit, (to)... Switching pulse generation circuit, (87-1) to (87-n).
・・PWN@Route, N m =-D/A converter, (to)・
...Vertical deflection drive circuit, )...Horizontal deflection drive circuit,
Ring: Deflection pulse generation circuit, -: 2/455 frequency divider circuit, -: Synchronous signal processing circuit, -: Monostable oscillator

Claims (1)

[Claims] 1. A screen coated with a phosphor that emits light when irradiated with an electron beam, an electron beam source that generates an electron beam for each vertical section of the screen divided into a plurality of vertical sections; a horizontal separating means for separating the electron beam generated by the electron beam source into each of the plurality of horizontal divisions of the screen on the screen and irradiating the electron beam onto the screen; A deflection electrode is used to deflect the electron beams in multiple steps in the vertical and horizontal directions, and controls the amount of irradiation of the screen with the electron beams separated for each horizontal section. Equipped with a beam flow control electrode that controls the amount of light emitted, a focusing electrode that controls the size of light emitted by the electron beam on the phosphor surface in each pixel, and a back electrode that controls the amount of electron beam generated, and drives these. The horizontal synchronization signal output of the synchronization separation circuit included in the drive circuit and the color subcarrier 2/45 in synchronization with the horizontal synchronization signal output.
A synchronization signal processing means is provided which processes the output of a pseudo horizontal synchronization signal generation circuit whose frequency is divided by 5, and generates a new horizontal synchronization signal using the pseudo horizontal synchronization signal at a position where the horizontal synchronization signal is missing. Image display device.