JPS61234124A - Error correcting system - Google Patents

Abstract

PURPOSE:To improve the correcting capacity and transmitting efficiency of an error correcting system, by reproducing transmission information bit between encoding blocks by adding encoding correlation. CONSTITUTION:Information bit strings a11, a12, a13, a14, a21, a22, a23, and a24 which are about to be transmitted are stored in a memory 3 and read out in the unit of block. Then single error correction encoding is performed at every partial bit string and three redundant bits (error correcting bits) b11, b12, and b13; b21, b22, and b23; and b31, b32, and b33 are implemented at every partial bit string, and then, transmission bit strings put between each two bits of corresponding partial bit strings are sent to a transmission line 5. Single error correction encoding is performed at every block of the sent bit strings by means of a decode generator 8 and the process of a buffer receiving section 7 is performed at a memory 10. Therefore an optional algorithm can be used provided that algorithms corresponding to the transmission and reception are to be used.

Description

[Detailed Description of the Invention] [Summary] By dividing the transmission bit string into two and generating redundant bits for error correction using the transmission bit strings before and after the division, the transmission bit strings before and after the division are made to have a correlation, and errors can be corrected. This improves correction ability.

[, Industrial application field]

The present invention relates to an error correction method, and more specifically, error correction bits placed between each information data unit of a transmission bit string are generated using information data units before and after the error correction bit, and the receiving side The present invention relates to an error correction method for correcting received information bits using the relationship between information data units received at a time and error correction bits between the information data units.

When information data is sent to a destination, it is an important requirement in the transmission and reception of information data that no errors occur in the sent information data.

However, the actual transmission path includes factors that cause errors in the transmitted information data. Therefore, error correction codes are used as a means for correctly reproducing transmitted information data even in the presence of such factors.

When using such an error correction code, it is required that high correction ability and information transmission ability can be obtained without complicating the processing means.

[Conventional technology]

As a means of increasing the correction ability of conventional error correction codes, redundant bits (error correction bits) are generally used.
Techniques are being used to increase the number. Various techniques of this type are known.

[Problem that the invention seeks to solve]

Increasing the number of bits for error correction as described above will certainly improve the correction ability, but the algorithm that processes it will inevitably become more complex, and therefore the hardware will have to be configured more complexly. Not only that, but the code length also becomes longer, and a decrease in transmission efficiency becomes inevitable.

The present invention was created in view of the above-mentioned technical problems, and it is an object of the present invention to provide an error correction method that makes it possible to enjoy high correction ability and transmission efficiency while avoiding complication of algorithms and their hardware. is its purpose.

[Means for solving problems]

The main part of the present invention is to generate an error correction bit for each information data unit to be transmitted according to an error correction encoding algorithm, and to use error correction bits generated between the information data units that caused the error correction bit to be generated. This operation is performed for each information data unit that generates an error correction bit, and the information data unit is transmitted, and on the receiving side, the information bit is corrected using the information data unit and the error correction bit between the information data units.

[Effect]

Error correction bits are generated from information data units using an error correction encoding algorithm. Then, the generated error correction bits are placed between the information data units used to generate the bits and sent out. The trailing information data part that follows the generated error correction bits is considered a leading information data part, and is used in the error correction encoding algorithm along with the trailing information data part that is used to generate the error correction bits that follow. Correlation encoding processing is sequentially performed between the information data portion which has been converted into the prefix information data portion and the postfix information data portion.

The encoded and transmitted information data unit and error correction bits are subjected to a decoding algorithm corresponding to the error correction encoding algorithm to correct the error information bits occurring in the information data unit.

〔Example〕

For a better understanding of the present invention, an example of encoding used in the present invention will be explained.

Assume that the information bit string to be transmitted is as shown in FIG. Each partial bit string a of the information bit string, a12a13a14; a11a14aZIa2Zi
az+azzaz*az4 i a22a24a31
a32G "" is subjected to error correction coding, for example, single error correction coding (this coding will be described below), and three redundant bits (error correction bits) are applied to each partial bit string bth bItbI3 : bzIbzzbz
x: t)++t)! ! FIG. 1 shows the state in which these three redundant bits are placed between each two bits of the corresponding partial bit string. The encoded bit string shown in FIG. 1 will be transmitted.

On the receiving side, each encoded block o of the received bit string is
, ri (7 bits), that is, alla12bllb12b+
xa 1sa+a; a+:+a+at)z+1
)zzt)z:+az+azz;aZl a ZZt
)31t)321:133a21a24; a2
:1a24t) 41 to 14! b43a, 123Z;...
・Error correction decoding is performed for each block, and at that time, error correction coding is performed as described above (in the case of single error correction coding, up to two error information bits are corrected for each block). Transmitted information bit string a II a 12a
13a taa 21 a 22azxazaa, l1
azzas3axa” is played.

Examples of configurations implementing the above-mentioned basic concept are shown in FIGS. 3 and 4. In FIG. 3, reference numeral 1 denotes an information bit string output section provided in the transmitting section 2, and the information bit string a from the output section 1 is
Eye a12213314am1222altlaza...
is stored in the memory 3 in the manner shown in FIG. 5, and a II a tta Iffa +4 i a
13a 14az+azz; az+azza*zaz
4; It is read out in block units such as ``''. The control unit 4 controls such writing and reading. Then, a single error is detected for each partial information bit string read out in block units as described above. The code generator 6 performs correction encoding and sends the above-mentioned transmission bit string (see FIG. 1) to the transmission path 5.

The decoding generator 8 of the receiving section 7 performs simple error correction encoding on each block of the bit string sent from the transmitting section 2. Information bit string a reproduced from decoding generator 8
II a tta 13a 14a 21a tta
! 3a I! 4a 31812... are buffered in the memory 10 under the control of the control section 9, and the information bit strings are processed by the receiving section 7.

As mentioned above, since the two bits in a coded block are correlated between blocks, the error correction coding has a low correction ability even though it is encoded and decoded by the decoding means. can be increased. In other words, according to the present invention, it is possible to provide means that can utilize only the advantages of the conventional block encoding/decoding technique and the convolutional encoding/decoding technique.

Therefore, there is no restriction that only specific encoding and decoding algorithms can be used in the present invention, and any algorithm can be used as long as the corresponding algorithms are used in transmission and reception.

〔Effect of the invention〕

As explained above, since a coding correlation is given between coded blocks and used to reproduce the transmission information bits, it is possible to improve the correction ability and at the same time avoid complicating the error correction means. Transmission efficiency can also be improved.

[Brief explanation of the drawing]

1 is a diagram showing an example of a coded bit string generated by encoding an information bit string; FIG. 2 is a diagram showing an example of an information bit string used to generate the coded bit string in FIG. 1; FIG. 4 is a diagram showing an example of the configuration of a transmitting section implementing the present invention. FIG. 5 is a diagram showing an example configuration of a receiving section implementing the present invention. FIG. In the diagrams illustrating examples, FIGS. 3 and 4, 1 is an information bit output section, 3.10 is a memory, 4.9 is a control section, 6 is a code generator, and 8 is a decoding generator. (hT (lT2 b++ hr2 hr3 (h34
14 b2T b23 b2t (I21(h2 bs
TbM bss(223624ba+ bubts a
＋ #Hontato Sun Moon No. 7 No. 11
Ita 11 Figure 1 (hr (2t2 (h3 a14(hr (ln a)
za 12za (23t (2J2t2ss 4jt
Urushi A Car Riko l Truck 11 Ida J1 Fig. 2 Write 0 to Me 7 Snoring Recover B 8 ton Extrusion Fig. 5

Claims (1)

[Claims] Any error correction bits placed in a transmission bit string are placed between the information data units that generated the error correction bits, and are transmitted to correct errors occurring in the received information bits, including the error information bits. An error correction method characterized in that error correction is performed using received information data units and error correction bits between the information data units.