JPS61230536A - Frequency separation circuit - Google Patents

Frequency separation circuit

Info

Publication number
JPS61230536A
JPS61230536A JP7237085A JP7237085A JPS61230536A JP S61230536 A JPS61230536 A JP S61230536A JP 7237085 A JP7237085 A JP 7237085A JP 7237085 A JP7237085 A JP 7237085A JP S61230536 A JPS61230536 A JP S61230536A
Authority
JP
Japan
Prior art keywords
frequency
circuit
component
signal
differential amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7237085A
Other languages
Japanese (ja)
Other versions
JPH0618354B2 (en
Inventor
Junichi Hikita
純一 疋田
Giichi Shimada
義一 島田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP7237085A priority Critical patent/JPH0618354B2/en
Publication of JPS61230536A publication Critical patent/JPS61230536A/en
Publication of JPH0618354B2 publication Critical patent/JPH0618354B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/1646Circuits adapted for the reception of stereophonic signals

Abstract

PURPOSE:To obtain a frequency separation circuit with a simple constitution and low cost while the frequency selecting characteristic is attained by providing a parallel resonance circuit having a specific resonance frequency between the input sections of a differential amplifier in the frequency separation circuit. CONSTITUTION:When a multiplex signal is fed to an input terminal 2 and an input signal having frequency components f1, f2 to be detected is fed thereto, the impedance between the input terminals of the differential amplifier 23 shows the highest value at the resonance frequency f2. As a result, the attenuated frequency component of the frequency f2, that is, the frequency components including the frequency f1 as the major component is extracted. Further, since the component of the frequency f1 passes through a parallel resonance circuit 24, the frequency component having the frequency f2 mainly comprised of the difference component only between the signal in the fre quency f2 and the signal attenuated by the circuit 24 is extracted at the differential output of the differential amplifier 23 and the difference component of the frequency f1 is shut off. Thus, a specific component is extracted separately from an optional frequency component by the differential output side of the differential amplifier 23 and the input side of the differential amplifier 23 short-circuited by the parallel reso nance circuit 24.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、複数の周波数成分から特定の周波数成分を
分離する周波数分離回路に係り、たとえば、FMチュー
ナ、カセットテープレコーダ、テーププレーヤなどにお
ける放送受信装置において、テレビ音声多重放送を復調
する音声多重復調回路などに設置されて任意の周波数成
分から特定周波数成分を分離する帯域フィルタなどに適
する周波数分離回路に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a frequency separation circuit that separates a specific frequency component from a plurality of frequency components, and is used, for example, in broadcasting in FM tuners, cassette tape recorders, tape players, etc. The present invention relates to a frequency separation circuit that is suitable for use as a bandpass filter that is installed in an audio multiplex demodulation circuit that demodulates television audio multiplex broadcasts and separates a specific frequency component from arbitrary frequency components in a receiving device.

〔従来の技術〕[Conventional technology]

テレビジョン放送における音声多重放送には、主音声を
日本語、副音声を外国語で放送する2国語放送などの二
重音声放送と、主音声および副音声を用いたステレオ放
送とがある。
Audio multiplex broadcasts in television broadcasting include dual audio broadcasting such as bilingual broadcasting in which main audio is broadcast in Japanese and sub audio in a foreign language, and stereo broadcasting using main audio and sub audio.

このような音声多重放送の多重信号の周波数スペクトラ
ムは、第3図に示すように制定されており、Slは主チ
ヤンネル信号、S2゜は副搬送波、Sitは2国語放送
時の副チャンネル信号、S22はステレオ放送時の副チ
ャンネル信号、S、は制御チャンネル信号、S、。は制
御信号副搬送波、S、1、S3tは制御信号側波帯であ
る。この場合、ステレオ放送では、主チヤンネル信号に
左右信号り、Hの和信号(L+R)、副チャンネル信号
にその差信号(L−R)が設定されている。そして、テ
レビジョン放送の水平同期信号f)Iは約15.75k
Hzであり、副搬送波Shoは2 f H(=31.5
k Hz)、制御信号副搬送波S3゜は3.5f、  
(= 55.125kHz)の関係に設定されている。
The frequency spectrum of the multiplex signal of such audio multiplex broadcasting is established as shown in Figure 3, where Sl is the main channel signal, S2° is the subcarrier, Sit is the subchannel signal for bilingual broadcasting, and S22 is the sub-channel signal during stereo broadcasting, S is the control channel signal, and S is the control channel signal. is the control signal subcarrier, and S,1,S3t are the control signal sidebands. In this case, in stereo broadcasting, the sum signal (L+R) of left and right signals and H is set as the main channel signal, and the difference signal (L-R) between them is set as the sub-channel signal. And the horizontal synchronization signal f)I of television broadcasting is approximately 15.75k
Hz, and the subcarrier Sho is 2 f H (=31.5
kHz), control signal subcarrier S3° is 3.5f,
(= 55.125kHz).

このような音声多重放送を受信する受信装置には、第4
図に示すような音声多重復調回路が設置されている。
A receiving device that receives such audio multiplex broadcasting includes a fourth
An audio multiplex demodulation circuit as shown in the figure is installed.

アンテナで受信された多重放送波は、フロントエンドで
選局、高周波増幅などを経て中間周波数に変換され、中
間周波増幅部で増幅された後、FM検波回路で検波され
るが、このFM検波回路で得られた多重信号が入力端子
2に加えられる。通常、ステレオ復調回路を持つもので
は、このステレオ復調回路を通過させた多重信号を入力
端子2に加えるものと、ステレオ復調回路を通過させる
ことなく、独自のルートから入力端子2に加えるものと
があるが、何れの場合も多重信号の復調は可能である。
The multiplex broadcast waves received by the antenna are converted to an intermediate frequency through channel selection and high frequency amplification at the front end, amplified by the intermediate frequency amplification section, and then detected by the FM detection circuit. The multiplexed signal obtained is applied to input terminal 2. Normally, in devices with a stereo demodulation circuit, there are two types: one that applies the multiplexed signal that has passed through the stereo demodulation circuit to input terminal 2, and the other that applies the multiplexed signal to input terminal 2 from its own route without passing through the stereo demodulation circuit. However, demodulation of multiplexed signals is possible in either case.

この多重信号が低域フィルタ(LPF)4に加えられる
と、主チヤンネル信号(L+R)が抽出されてマトリク
ス回路6に加えられる。また、多重信号は帯域フィルタ
(BPF)8に加えられ、周波数31.5kHzの副搬
送波S20と、周波数55.125kHzの制御信号副
搬送波S3゜とが分離され、前者の副搬送波S2゜はF
M復調回路10に加えられ、後者の制御信号副搬送波S
3゜はAM復調回路12に加えられる。
When this multiplexed signal is applied to a low pass filter (LPF) 4, a main channel signal (L+R) is extracted and applied to a matrix circuit 6. The multiplexed signal is also applied to a bandpass filter (BPF) 8, which separates a subcarrier S20 with a frequency of 31.5kHz and a control signal subcarrier S3° with a frequency of 55.125kHz, with the former subcarrier S2° being F
M demodulation circuit 10, the latter control signal subcarrier S
3° is applied to the AM demodulation circuit 12.

この場合、F Mlz回路10では副チャンネル信号(
L−R)が復調されてマトリクス回路6に加えられ、A
M復調回路12では多重信号中の周波数922.5 H
zか982.5 Hzの何れかの制御信号が復調される
。922.5 Hzの制御信号が検出された場合には、
受信放送は二重音声モード、982.5 Hzの制御信
号が検出され場合には、ステレオ放送モードである。こ
れらの制御信号は判別回路14に加えられ、制御信号の
周波数からステレオ放送か、二重音声放送かが判別され
、その判別出力は、スイッチ回路16の切換制御入力と
なる。スイッチ回路16は、ステレオ放送か二重音声放
送かの判別出力に応じたスイッチ出力を発生し、マトリ
クス回路6に加える。
In this case, the F Mlz circuit 10 outputs the sub-channel signal (
L-R) is demodulated and added to the matrix circuit 6, and A
In the M demodulation circuit 12, the frequency in the multiplexed signal is 922.5H.
A control signal of either 982.5 Hz or 982.5 Hz is demodulated. If a 922.5 Hz control signal is detected,
The received broadcast is in dual audio mode, and if a 982.5 Hz control signal is detected, it is in stereo broadcast mode. These control signals are applied to a discrimination circuit 14, which discriminates whether it is a stereo broadcast or a dual audio broadcast based on the frequency of the control signal, and the discrimination output becomes a switching control input of a switch circuit 16. The switch circuit 16 generates a switch output according to the output for determining whether it is a stereo broadcast or a dual audio broadcast, and applies it to the matrix circuit 6.

マトリクス回路6は、スイッチ回路16からのスイッチ
出力に応じてステレオ復調モードまたは二重音声復調モ
ードかに切り換えられ、たとえば、ステレオ復調モード
とすると、主チヤンネル信号(L 十R)と副チャンネ
ル信号(L−R)との演算操作によって、左信号し、右
信号Rとが分離され、これらの信号り、Rは出力端子1
8.19がら個別に取り出されることになる。
The matrix circuit 6 is switched to the stereo demodulation mode or the dual audio demodulation mode according to the switch output from the switch circuit 16. For example, in the stereo demodulation mode, the main channel signal (L + R) and the sub channel signal ( LR), the left signal and right signal R are separated, and these signals R and R are output terminal 1.
8.19 will be taken out individually.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

そして、このような音声多重復調回路では、受信装置の
規模や要求される性能などによって異なるが、一般に1
チツプの半導体集積回路で構成されている。この場合、
帯域フィルタ8は、半導体集積回路化される主回路の外
部に周波数選択特性を持つ複数のインダクタおよびキャ
パシタで構成され、非常に高価になる欠点がある。
In this type of audio multiplexing demodulation circuit, although it varies depending on the size of the receiving device and the required performance, it is generally
It consists of a chip semiconductor integrated circuit. in this case,
The bandpass filter 8 is composed of a plurality of inductors and capacitors having frequency selection characteristics outside the main circuit integrated into a semiconductor circuit, and has the drawback of being very expensive.

そこで、この発明は、簡単な構成で優れた周波数選択特
性が得られ、しかも低価格で実現できる周波数分離回路
を提供することを目的とする。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a frequency separation circuit that can obtain excellent frequency selection characteristics with a simple configuration and can be realized at a low cost.

〔問題点を解決するための手段〕[Means for solving problems]

この発明を実施例に対応する第1図を参照して説明する
と、この発明の周波数分離回路22は、差動増幅器23
の入力部間に特定の共振周波数f2を持つ並列共振回路
24を設置したものである。そして、その共振周波数f
2および他の周波数f1の成分からなる信号を差動増幅
器23に加え、前記並列共振回路24を介してその共振
周波数の成分を除いた周波数成分を取り出すとともに、
前記差動増幅器23の差動出力部から前記共振周波数f
2を主成分とする周波数成分を取り出すようにしたもの
である。
The present invention will be explained with reference to FIG. 1 corresponding to an embodiment. The frequency separation circuit 22 of the present invention includes a differential amplifier 23
A parallel resonant circuit 24 having a specific resonant frequency f2 is installed between the input parts of the resonant circuit 24. And its resonant frequency f
2 and another frequency f1 component is applied to the differential amplifier 23, and the frequency component excluding the resonant frequency component is extracted via the parallel resonant circuit 24,
from the differential output section of the differential amplifier 23 to the resonant frequency f
2 is the main component.

〔作   用〕[For production]

したがって、差動増幅器23の入力部間が特定の共振周
波数f2を持つ並列共振回路24を介して短絡されてい
るので、検出すべき周波数成分子、 、f、を持つ入力
信号が加えられると、共振周波数f2において、差動増
幅器23の入力端子間のインピーダンスは最高値を呈し
、周波数f2の成分が減衰した周波数成分、すなわち、
周波数f、を主体とする周波数成分が取り出される・ま
た、周波数f、の成分は並列共振回路24を通過するの
で、差動増幅器23の差動出力側には周波数f、の並列
共振回路24で減衰した信号との差成分のみからなる周
波数成分、すなわち、周波数f、を主体とする周波数成
分が取り出され、周波数f1の差成分は遮断される。し
たがって、任意の複数の周波数成分を差動増幅器23の
差動出力側と、単一の並列共振回路24で短絡した差動
増幅器23の入力側とから特定の周波数成分を分離して
取り出すことができる。
Therefore, since the input parts of the differential amplifier 23 are short-circuited via the parallel resonant circuit 24 having a specific resonant frequency f2, when an input signal having a frequency component to be detected, , f, is applied, At the resonant frequency f2, the impedance between the input terminals of the differential amplifier 23 has the highest value, and the frequency component of the frequency f2 is attenuated, that is,
A frequency component mainly having the frequency f is extracted. Also, since the component of the frequency f passes through the parallel resonant circuit 24, the differential output side of the differential amplifier 23 has a parallel resonant circuit 24 with the frequency f. A frequency component consisting only of a difference component from the attenuated signal, that is, a frequency component mainly consisting of frequency f, is extracted, and a difference component of frequency f1 is cut off. Therefore, it is possible to separate and extract a specific frequency component from the differential output side of the differential amplifier 23 and the input side of the differential amplifier 23 short-circuited by the single parallel resonant circuit 24. can.

また、並列共振回路24は、単一の共振周波数を持つ一
対のインダクタ32およびキャパシタ34で構成され、
その従来のものに比較して回路構成の簡略化が図られる
Further, the parallel resonant circuit 24 is composed of a pair of inductor 32 and capacitor 34 having a single resonant frequency,
The circuit configuration can be simplified compared to the conventional one.

〔実 施 例〕〔Example〕

以下、この発明の実施例を図面を参照して詳細に説明す
る。
Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図はこの発明の周波数分離回路を用いた音声多重復
調回路の実施例を示し、第4図に示す音声多重復調回路
と同一部分には同一符号を付しである。
FIG. 1 shows an embodiment of an audio multiplexing demodulation circuit using the frequency separation circuit of the present invention, and the same parts as those of the audio multiplexing demodulation circuit shown in FIG. 4 are given the same reference numerals.

第1図に示すように、入力端子2に加えられた多重信号
は、ステレオモードでは、低域フィルタ4を介して主チ
ヤンネル信号(L 十R)が抽出されてマトリクス回路
6に加えられるとともに、高域フィルタ(HPF)20
を介して主チヤンネル信号(L+R)が除かれた後、バ
ッファ増幅器21を介して帯域フィルタ8として用いら
れた周波数分離回路22に加えられる。この場合、周波
数分離回路22に加えられる多重信号は、副チャンネル
信号(L−R)と制御信号とからなる複合信号である。
As shown in FIG. 1, in the stereo mode, the multiplexed signal applied to the input terminal 2 is passed through a low-pass filter 4 to extract the main channel signal (L + R) and applied to the matrix circuit 6. High pass filter (HPF) 20
After the main channel signal (L+R) is removed via a buffer amplifier 21, it is applied to a frequency separation circuit 22 which is used as a bandpass filter 8. In this case, the multiplexed signal applied to the frequency separation circuit 22 is a composite signal consisting of a sub-channel signal (LR) and a control signal.

周波数分離回路22は、第1および第2の周波数f、 
、f2の各成分を抽出するように設定されており、差動
増幅器23の差動入力部間に並列共振回路24を接続し
たものである。差動増幅器23はトランジスタ26.2
8および定電流源30、並列共振回路24はインダクタ
32およびキャパシタ34から構成されている。並列共
振回路24は、一対のインダクタ32およびキャパシタ
34を並列に接続したものであり、この実施例では、第
2の周波数f2を共振周波数(たとえば、55.125
kHz)に設定しである。
The frequency separation circuit 22 has first and second frequencies f,
, f2, and a parallel resonant circuit 24 is connected between the differential input sections of the differential amplifier 23. Differential amplifier 23 is transistor 26.2
8 and a constant current source 30, and the parallel resonant circuit 24 is composed of an inductor 32 and a capacitor 34. The parallel resonant circuit 24 is a pair of inductor 32 and capacitor 34 connected in parallel, and in this embodiment, the second frequency f2 is set to a resonant frequency (for example, 55.125
kHz).

また、差動増幅器23の各トランジスタ26.28のコ
レクタ側には、第2の周波数f2の成分を取り出すため
の出力回路としての能動負荷が設置されており、この実
施例ではトランジスタ36.38.40.42.44.
46からなる電流ミラー回路が設置されている。
Further, an active load as an output circuit for extracting the second frequency f2 component is installed on the collector side of each transistor 26.28 of the differential amplifier 23, and in this embodiment, the transistor 36.38. 40.42.44.
A current mirror circuit consisting of 46 is installed.

そして、第1の周波数f、の成分は、トランジスタ28
のベースから取り出され、バッファ増幅器48を介して
FM復調回路10に加えられ、また、トランジス外42
.46のコレクタ側から取り出された第2の周波数f2
の成分は、バッファ増幅器50を介してAM復調回路1
2に加えられており、その他の構成は、第4図に示す音
声多重復調回路と同一である。
The component of the first frequency f is the transistor 28
is taken out from the base of the FM demodulator 10 via the buffer amplifier 48,
.. The second frequency f2 taken out from the collector side of 46
The component of
2, and the other configuration is the same as the audio multiplex demodulation circuit shown in FIG.

以上の構成において、その動作を説明する。The operation of the above configuration will be explained.

入力端子2に加えられた多重信号は、低域フィルタ4に
加えられて主チヤンネル信号(L’+R)が抽出される
とともに、高域フィルタ20を介して主チヤンネル信号
(L+R)が除去された後、バッファ増幅器21から周
波数分離回路22に加えられる。
The multiplexed signal applied to the input terminal 2 is applied to the low-pass filter 4 to extract the main channel signal (L'+R), and the main channel signal (L+R) is removed via the high-pass filter 20. Thereafter, the signal is applied from the buffer amplifier 21 to the frequency separation circuit 22.

周波数分離回路22では、並列共振回路24が第2の周
波数f 2  (=55.125kHz)において共振
し、低インピーダンス特性を呈するから、差動増幅器2
3の入力端子間のインピーダンスは最高値を示す。した
がって、音声副搬送波の成分は、この並列共振回路24
を通過し、トランジスタ28のベースにはトランジスタ
26のベースに加えられる入力多重信号と同レベルの信
号が加えられ、第2の周波数f t  (=55.12
5k Hz)の制御信号副搬送波は数十dBだけ減衰し
た形でトランジスタ28のベースに現れ、バッファ増幅
器48に加えられることになる。
In the frequency separation circuit 22, the parallel resonant circuit 24 resonates at the second frequency f 2 (=55.125kHz) and exhibits low impedance characteristics, so the differential amplifier 2
The impedance between the input terminals of No. 3 shows the highest value. Therefore, the audio subcarrier component is transmitted through this parallel resonant circuit 24.
A signal having the same level as the input multiplexed signal applied to the base of the transistor 26 is applied to the base of the transistor 28, and the second frequency f t (=55.12
The control signal subcarrier (5kHz) appears attenuated by several tens of dB at the base of transistor 28 and is applied to buffer amplifier 48.

第2の周波数f z  (=55.125kHz)の制
御信号副搬送波は、増幅された形でトランジスタ42、
46のコレクタから取り出され、バッファ増幅器50に
加えられる。この場合、第1の周波数f。
The control signal subcarrier of the second frequency f z (=55.125kHz) is transmitted to the transistor 42 in an amplified form.
46 and applied to a buffer amplifier 50. In this case, the first frequency f.

の成分は、並列共振回路24を通過し、差動増幅器23
の能動負荷側の出力には、第2の周波数f2を共振周波
数に持つ並列共振回路24での減衰した信号との差成分
のみが現れ、第1の周波数f、の差成分は現れない。
The component passes through the parallel resonant circuit 24 and the differential amplifier 23
In the active load side output of , only the difference component from the attenuated signal in the parallel resonant circuit 24 having the second frequency f2 as the resonant frequency appears, and the difference component at the first frequency f does not appear.

第2図はこの場合の周波数分離回路22の出力レベル−
周波数特性を示しており、Aはトランジスタ28のベー
ス側から取り出される第1の周波数f1を主成分とする
副搬送波出力、Bは差動増幅器23の差動出力部側のト
ランジスタ42.46のコレクタ側から取り出される第
2の周波数f2を主成分とする制御信号副搬送波出力で
ある。
Figure 2 shows the output level of the frequency separation circuit 22 in this case.
It shows the frequency characteristics, where A is the subcarrier output whose main component is the first frequency f1 extracted from the base side of the transistor 28, and B is the collector of the transistors 42 and 46 on the differential output side of the differential amplifier 23. This is a control signal subcarrier output whose main component is the second frequency f2 extracted from the side.

そして、このような各出力からFM復調回路10では、
副チャンネル信号(L−R)が復調されてマトリクス回
路6に加えられ、AM復調回路12では制御信号が復調
され、その復調信号の周波数から判別回路14でステレ
オモードか二重音声モードかが判別され、その判別出力
に基づいてスイッチ回路16からマトリクス回路6にス
テレオモード、二重音声モードの何れかが設定される。
Then, in the FM demodulation circuit 10 from each output,
The sub-channel signal (LR) is demodulated and applied to the matrix circuit 6, the AM demodulation circuit 12 demodulates the control signal, and the discrimination circuit 14 discriminates whether it is stereo mode or dual audio mode based on the frequency of the demodulated signal. Based on the determined output, the switch circuit 16 sets the matrix circuit 6 to either the stereo mode or the dual audio mode.

この結果、ステレオ信号または二重音声信号が、マトリ
クス回路6で復調され、出力端子18.19から取り出
される。
As a result, a stereo signal or a dual audio signal is demodulated in the matrix circuit 6 and taken out from the output terminals 18, 19.

なお、実施例では周波数分離回路を音声多重復調回路の
帯域フィルタとして用いたが、この発明の周波数分離回
路は、複数の周波数成分を取り出す手段として音声多重
復調回路以外にも用いることができる。
In the embodiment, the frequency separation circuit is used as a bandpass filter of the audio multiplexing and demodulating circuit, but the frequency separating circuit of the present invention can also be used in addition to the audio multiplexing and demodulating circuit as a means for extracting a plurality of frequency components.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、この発明によれば、複数の周波数
成分の信号から特定の周波数成分を効率良く分離して取
り出すことができる°とともに、外付は部品が少なく、
回路構成が簡単であるので、半導体集積回路化が容易で
あり、たとえば、連続、不連続の周波数成分から特定の
周波数成分を取り出すための帯域フィルタなどに用いる
ことができる。
As explained above, according to the present invention, it is possible to efficiently separate and extract a specific frequency component from a signal of multiple frequency components, and there are fewer external parts.
Since the circuit configuration is simple, it can be easily integrated into a semiconductor circuit, and can be used, for example, as a bandpass filter for extracting a specific frequency component from continuous or discontinuous frequency components.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の周波数分離回路の実施例を示す回路
図、第2図はその出力レベルー周を数e性を示す説明図
、第3図はテレビ多重信号の周波数スペクトラムを示す
説明図、第4図は従来の音声多重復調回路を示すブロッ
ク図である。 22・・・周波数分離回路、23・・・差動増幅器、2
4・・・並列共振回路。 第2図 M 3 図−
FIG. 1 is a circuit diagram showing an embodiment of the frequency separation circuit of the present invention, FIG. 2 is an explanatory diagram showing the output level-frequency characteristic of several e, and FIG. 3 is an explanatory diagram showing the frequency spectrum of a television multiplexed signal. FIG. 4 is a block diagram showing a conventional audio multiplexing and demodulating circuit. 22... Frequency separation circuit, 23... Differential amplifier, 2
4...Parallel resonant circuit. Figure 2 M 3 Figure-

Claims (2)

【特許請求の範囲】[Claims] (1)差動増幅器の入力部間に特定の共振周波数を持つ
並列共振回路を設置してその共振周波数および他の周波
数の成分からなる信号を加え、前記並列共振回路を介し
てその共振周波数の成分を除いた周波数成分を取り出す
とともに、前記差動増幅器の差動出力部から前記共振周
波数を主成分とする周波数成分を取り出すことを特徴と
する周波数分離回路。
(1) A parallel resonant circuit with a specific resonant frequency is installed between the input sections of a differential amplifier, and a signal consisting of the resonant frequency and other frequency components is applied, and the resonant frequency is transmitted through the parallel resonant circuit. What is claimed is: 1. A frequency separation circuit characterized in that a frequency component is extracted from which the frequency component is removed, and a frequency component having the resonance frequency as a main component is extracted from a differential output section of the differential amplifier.
(2)前記並列共振回路は、一対のインダクタおよびキ
ャパシタで構成したことを特徴とする特許請求の範囲第
1項に記載の周波数分離回路。
(2) The frequency separation circuit according to claim 1, wherein the parallel resonant circuit includes a pair of inductor and capacitor.
JP7237085A 1985-04-05 1985-04-05 Frequency separation circuit Expired - Lifetime JPH0618354B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7237085A JPH0618354B2 (en) 1985-04-05 1985-04-05 Frequency separation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7237085A JPH0618354B2 (en) 1985-04-05 1985-04-05 Frequency separation circuit

Publications (2)

Publication Number Publication Date
JPS61230536A true JPS61230536A (en) 1986-10-14
JPH0618354B2 JPH0618354B2 (en) 1994-03-09

Family

ID=13487353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7237085A Expired - Lifetime JPH0618354B2 (en) 1985-04-05 1985-04-05 Frequency separation circuit

Country Status (1)

Country Link
JP (1) JPH0618354B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004040755A1 (en) * 2002-11-01 2004-05-13 Matsushita Electric Industrial Co., Ltd. Filter circuit and radio device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004040755A1 (en) * 2002-11-01 2004-05-13 Matsushita Electric Industrial Co., Ltd. Filter circuit and radio device
US7272187B2 (en) 2002-11-01 2007-09-18 Matsushita Electric Industrial Co., Ltd. Filter circuit and radio apparatus

Also Published As

Publication number Publication date
JPH0618354B2 (en) 1994-03-09

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