JPS61230323A - Etching apparatus - Google Patents

Etching apparatus

Info

Publication number
JPS61230323A
JPS61230323A JP7081185A JP7081185A JPS61230323A JP S61230323 A JPS61230323 A JP S61230323A JP 7081185 A JP7081185 A JP 7081185A JP 7081185 A JP7081185 A JP 7081185A JP S61230323 A JPS61230323 A JP S61230323A
Authority
JP
Japan
Prior art keywords
etching
light source
power supply
distance
change
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7081185A
Other languages
Japanese (ja)
Inventor
Teru Fujii
藤井 輝
Takashi Kamimura
隆 上村
Toru Otsubo
徹 大坪
Susumu Aiuchi
進 相内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7081185A priority Critical patent/JPS61230323A/en
Publication of JPS61230323A publication Critical patent/JPS61230323A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Abstract

PURPOSE:To improve the precision of the etching process, yield and efficiency by automatically correcting a change in the illuminance by a photo transistor, and causing the power supply voltage to correspond to a change in the distance between the light source and the object to be etched. CONSTITUTION:The surface of a wafer 6 is observed through a cylindrical lens 12, an interference filter 13 and an objective lens 14 which are arranged in front of a charge transfer device CCD 11. Image information changing with time due to the etching is inputted through CCD driver 15 to a data processing unit 16, and the process and end point of the etching are determined by a determination and control unit of the etching end point 17, thereby controlling the switching of a high-frequency power supply 9. Fluctuation of a light source 1 is corrected through a controller by control of an illumination power supply 2, based on the feedback signal of a photo transistor 3. With this, the precision of the process, yield and efficiency of LSI wafers or the like are improved.

Description

【発明の詳細な説明】 〔発明の利用分野) 本発明はエツチング進行状態を視覚認識するようになさ
れたエツチング装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an etching apparatus that visually recognizes the progress of etching.

〔発明の背景) 現在、半導体製造技術における超LSI化の工、チング
技術として、エツチングモニタ及びエツチング終点検出
の方式は、発光分光分析法によるものが主流であシ、他
釦もレーザ干渉法などによるものがあるが、何れも再現
性に優れた高精度の照明装置を備えていない。
[Background of the Invention] Currently, in semiconductor manufacturing technology, the mainstream method of etching monitoring and etching end point detection in ultra-LSI processing and etching technology is based on emission spectrometry, and other methods such as laser interferometry are also used. However, none of them are equipped with a high-precision illumination device with excellent reproducibility.

超LSI化に伴って、高精度が要求されるエツチング技
術はバッチ処理方式から枚葉処理方式へと移行している
。そのため、処理能力(スループット)を高める方策と
しては、エツチングレートの改善並びにウェハの大口径
化などで対処している。又、エツチングの高速化は、エ
ツチングの選択性や寸法制御性及び均一性に大きく影響
され、それ故エツチングの終点を正確且つ高精度に検出
することと、エツチングの未終了点及びエツチング過多
などを防止することが重要である。
With the shift to ultra-large scale integrated circuits, the etching technology that requires high precision is shifting from a batch processing method to a single wafer processing method. Therefore, measures to increase processing capacity (throughput) include improving the etching rate and increasing the diameter of wafers. In addition, increasing the speed of etching is greatly influenced by the selectivity, dimensional controllability, and uniformity of etching.Therefore, it is important to accurately and precisely detect the end point of etching, and to detect unfinished etching points and excessive etching. It is important to prevent this.

か\る技術に関するものとしては、特公昭58−424
57号公報及び特公昭58−52572号公報等におい
て開示されているが、前者は被照射対象物に均一な照明
を行なうとしてお)、後者は被照射対象物の寸法変化例
えば用紙寸法A4版、A3版等の如きものの変化に対応
した露光方法に関するものである。
For information on this technology, see the Special Publication No. 58-424.
57 and Japanese Patent Publication No. 58-52572, etc., the former assumes that the object to be irradiated is uniformly illuminated), while the latter deals with changes in the dimensions of the object to be irradiated, such as paper size A4 size, etc. This invention relates to an exposure method that can accommodate changes in size such as A3 size.

〔発明の目的J 本発明は、上記した従来技術の不具合を解消すべくなさ
れたものであfi、LSI及び超LSI用ウニへ等のエ
ツチング加工精度の向上、歩留勺効率の向上を図ったエ
ツチング装置!lを提供することを目的としている。
[Purpose of the Invention J The present invention has been made to solve the above-mentioned problems of the prior art, and aims to improve the etching accuracy of fi, LSI, and VLSI, and to improve the yield efficiency. Etching device! The aim is to provide l.

〔発明の概要」 上記目的達成のために、本発明のエツチング装置におい
て、照明用電源の変動や光源の減衰による照度の変化が
フォトトランジスタによって自動補正され、又光源と被
エツチング物との間の距離変化に電源電圧を対応せしめ
ることによって常時一定の照明が得られるように構成さ
れている。
[Summary of the Invention] In order to achieve the above object, in the etching apparatus of the present invention, changes in illuminance due to fluctuations in the illumination power supply and attenuation of the light source are automatically corrected by a phototransistor, and changes in the illumination intensity between the light source and the object to be etched are automatically corrected. By adjusting the power supply voltage to changes in distance, constant illumination can be obtained at all times.

〔発明の実施例j 以下、本発明の実施例であるエツチング装置について第
1図及び第2図を参照しつつ説明する。
[Embodiment j of the invention j Hereinafter, an etching apparatus which is an embodiment of the invention will be described with reference to FIGS. 1 and 2.

先ず、実施例の概略的な構成は、光源1の経時“ 変化
による減衰及び照明用電源2の電動による照度の変化を
フォトトランジスタ3で検出してこれを補正するように
なされている。又、エツチング条件によって対向する上
下一対の電極4.5同士の間隔が変化するが、被エツチ
ング物であシ且つ観測対象物でもあるウニノ・6と光源
1との距離も例えば250〜350%の如くに変化する
ので、この変化に対応できるように構成されている。
First, the general configuration of the embodiment is such that attenuation due to changes in the light source 1 over time and changes in illuminance due to the electric power of the illumination power source 2 are detected by the phototransistor 3 and corrected. The distance between the pair of upper and lower electrodes 4.5 that face each other varies depending on the etching conditions, but the distance between the light source 1 and the unino 6, which is the object to be etched and also the object to be observed, is also 250 to 350%, for example. The structure is designed to accommodate this change.

これらの詳しくは、第1図において、エツチング処理室
7の内部には上下一対の電極4.5が設けられ、上部電
極4はアース8電位に、そして下部電極5は高周波電源
9に夫々接続されている。
In detail, in FIG. 1, a pair of upper and lower electrodes 4.5 are provided inside the etching processing chamber 7, the upper electrode 4 is connected to a ground 8 potential, and the lower electrode 5 is connected to a high frequency power source 9. ing.

又、被エツチング物であるウニノ16は下部電極5の上
面中央部に担持装着され、エツチング処理室7の上方か
ら透明な覗き窓10全通してC0D(電荷転送装置)1
1で観測できる仕組みになっている。
The object to be etched 16 is supported and attached to the center of the upper surface of the lower electrode 5, and is passed through the entire transparent viewing window 10 from above the etching processing chamber 7 to the C0D (charge transfer device) 1.
The system is such that it can be observed with 1.

CCD11の前方妃はシリンドリカル・レンズ12、干
渉フィルタ13及び対物レンズ14が順に配置され、こ
れら各部材を通してウニノS6の表面を観測できる体制
となっている。エツチングによって経時変化する画像情
報をCODドライツク15を経てデータ処理装置16に
入力し、エツチング終点の判定制御装置17でエツチン
グ過程及び終点を判定して高周波電源9の0N1OFF
’の切換コントロールする。なお、モニタ用の照明装置
は、照明用電源2、光源7、レンズ18及びノー−7ミ
ラー19から構成され、このうち電#2は光量を任意に
コントロールできるようになっている。
A cylindrical lens 12, an interference filter 13, and an objective lens 14 are arranged in this order on the front side of the CCD 11, and the surface of the Unino S6 can be observed through these members. Image information that changes over time due to etching is input to the data processing device 16 via the COD drive 15, and the etching end point determination control device 17 determines the etching process and end point, and turns the high frequency power source 9 on and off.
' control switching. The monitor lighting device is composed of a lighting power source 2, a light source 7, a lens 18, and a no-7 mirror 19, of which the amount of light of the light source #2 can be controlled arbitrarily.

次に、第2図において、光源1とウニノ〜6との間の距
離が不変で固定されている場合、ウニノ)6の表面に適
切な照度を与えるようにコントローラ20によって光源
1の光量を調整して照明用の電源2が設定される。又、
ノ・−7ミラー19の収納ボックス内に設けられたフォ
トトランジスタ3の出力は、アンプ22t−介してコン
パレータ21の一方の入力端子Aに導入される。ここで
使用されるコンパレータ21としてはアナログ減算器が
使用され、他方の入力端子Bの電圧が端子Aの電圧に平
衡するように設定することで、この平衡電圧を基準値と
してウニ/S6表面の照度変化が、即ち光源1の変動が
フォトトランジスタ3のフィードバック信号によって、
コントローラ20を介して照明用電源2の制御で補正さ
れ、その結果安定した照明が得られるのである。
Next, in FIG. 2, when the distance between the light source 1 and the sea urchin 6 is fixed and unchanged, the light intensity of the light source 1 is adjusted by the controller 20 so as to give an appropriate illuminance to the surface of the sea urchin 6. Then, the power source 2 for lighting is set. or,
The output of the phototransistor 3 provided in the storage box of the No.7 mirror 19 is introduced into one input terminal A of the comparator 21 via the amplifier 22t. An analog subtracter is used as the comparator 21 used here, and by setting the voltage of the other input terminal B to be balanced with the voltage of terminal A, the surface of the sea urchin/S6 is set using this balanced voltage as a reference value. The illuminance change, that is, the fluctuation of the light source 1 is caused by the feedback signal of the phototransistor 3,
This is corrected by controlling the illumination power source 2 via the controller 20, and as a result, stable illumination is obtained.

このように、光源1とウニノ・6との間の距離を固定し
て考えた場合、コンパレータ21の入力端子Bに入力さ
れる基準電圧が簡単な回路構成で設定することができる
In this way, when considering the distance between the light source 1 and the unit 6 as fixed, the reference voltage input to the input terminal B of the comparator 21 can be set with a simple circuit configuration.

しかし、実際問題として光源1と試料のウニノ16との
距離りは変化し、この変化に対応して光量を高精度に調
整している。
However, as a practical matter, the distance between the light source 1 and the sample sea urchin 16 changes, and the amount of light is adjusted with high precision in response to this change.

即ち、ウェハ6の表面における照度をLとした場合、こ
の照度りは上記距離1の2乗に反比例する関数であシ、
照明の制御においてコンパレータ21の基準信号の電圧
Eは距離βの2乗に比例する関数となる。つま夛、 B=R1,2CVノ   ・・・・・・・・・・・・・
・・・・・・・・(1)で表わすことができる。
That is, if the illuminance on the surface of the wafer 6 is L, this illuminance is a function inversely proportional to the square of the distance 1.
In illumination control, the voltage E of the reference signal of the comparator 21 becomes a function proportional to the square of the distance β. Tsuma, B=R1,2CVノ ・・・・・・・・・・・・
......It can be expressed as (1).

ここでRは照度係数を示す。Here, R indicates an illuminance coefficient.

したがって、上記(1)式の距離1とEの関係から照度
係数Rを算出すれば、プリセッタ25のデジスイッチで
セツティングされた距離1は、!・V換算器24で距離
rの変化に対応した基準電圧に換算され、D/Aコンバ
ータ25に、介り、てコンパレータ21への入力によっ
て常に再現性の良−安定した照明が得られるのでるる。
Therefore, if the illuminance coefficient R is calculated from the relationship between the distance 1 and E in the above equation (1), the distance 1 set by the digital switch of the presetter 25 is !・The V converter 24 converts the voltage into a reference voltage that corresponds to the change in distance r, and inputs it to the D/A converter 25 and then to the comparator 21, so that stable illumination with good reproducibility can always be obtained. .

エツチング・モニタの照明は、距離りの他に被エツチン
グ材、その他絃々のエツチング条件によって異なるが、
諸条件の下に実験的に求められた各データをテーブル化
し、上記(1)式における照度係数Rを設定することで
対処されて、基本的に本実施例の方式は成立することと
なる。
The illumination of the etching monitor varies depending on the etching distance, the material to be etched, and other etching conditions.
This is handled by creating a table of each data obtained experimentally under various conditions and setting the illuminance coefficient R in the above equation (1), and basically the method of this embodiment is established.

以上から明らかな如く、本実施例はエツチングによって
経時変化するクエー16の表面のコントラストを観測す
るために照明の影響を強く受けるが、エツチング条件に
よって変化する光源1と被エツチング物である供試ウェ
ハ6との距離間隔や、元rA1の減衰、その他諸々の条
件変化による影響を大きく低減することができ、再現性
の良い安定した照明が得られる。
As is clear from the above, this example is strongly influenced by illumination in order to observe the contrast on the surface of the quay 16 that changes over time due to etching. 6, the attenuation of the source rA1, and other changes in conditions can be greatly reduced, and stable illumination with good reproducibility can be obtained.

〔発明の効果〕〔Effect of the invention〕

上記したことから理解されるように、本発明のエツチン
グ装置において、定量的な画像処理を可能にし、エツチ
ング終点の高精度の検出ができるから、LSI用ウェつ
等へ加工精度向上、歩留りの向上及び効率向上に効果が
るる。
As can be understood from the above, the etching apparatus of the present invention enables quantitative image processing and highly accurate detection of the end point of etching, thereby improving processing accuracy and yield for LSI etching etc. and is effective in improving efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1因は、本発明の実施例であるエツチングモニタめ照
明装置が採用されたエツチング装置の構成図、第2図は
本実施例の照明装置の構成図である。 1・・・光源、  2・・・照明用電源3・・・フォト
トランジスタ 4.5・・・上下部電極 6・・・被エツチング物としてのウェハ18・・・レン
ズ  19・・・ハーフミラ−20・・・照明用コント
ローラ
The first factor is a block diagram of an etching apparatus employing an etching monitor illumination apparatus according to an embodiment of the present invention, and FIG. 2 is a block diagram of the illumination apparatus of this embodiment. DESCRIPTION OF SYMBOLS 1...Light source 2...Illumination power source 3...Phototransistor 4.5...Upper and lower electrodes 6...Wafer 18 as an object to be etched 18...Lens 19...Half mirror 20 ...Lighting controller

Claims (1)

【特許請求の範囲】[Claims] パターン形成対象の被エッチング物の表面におけるエッ
チング進行状態を視覚認識するようになされたエッチン
グ装置であって、光源から一定の位置にてフォトトラン
ジスタが設置されて、前記フォトトランジスタの出力信
号によって照度が補正され且つ前記光源と前記被エッチ
ング物との距離の変化がプリセッタにおいて設定され、
前記距離の変化に対応した電圧に変換せしめることによ
って前記被エッチング物に対して常時一定の照度が得ら
れるように制御されることを特徴とするエッチング装置
This is an etching apparatus designed to visually recognize the progress of etching on the surface of an etched object to be patterned, in which a phototransistor is installed at a certain position from a light source, and the illuminance is controlled by the output signal of the phototransistor. corrected and a change in distance between the light source and the object to be etched is set in a presetter;
An etching apparatus characterized in that the etching apparatus is controlled so that a constant illuminance is always obtained on the object to be etched by converting the voltage into a voltage corresponding to the change in the distance.
JP7081185A 1985-04-05 1985-04-05 Etching apparatus Pending JPS61230323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7081185A JPS61230323A (en) 1985-04-05 1985-04-05 Etching apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7081185A JPS61230323A (en) 1985-04-05 1985-04-05 Etching apparatus

Publications (1)

Publication Number Publication Date
JPS61230323A true JPS61230323A (en) 1986-10-14

Family

ID=13442324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7081185A Pending JPS61230323A (en) 1985-04-05 1985-04-05 Etching apparatus

Country Status (1)

Country Link
JP (1) JPS61230323A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5578161A (en) * 1991-04-30 1996-11-26 International Business Machines Corporation Method and apparatus for in-situ and on-line monitoring of trench formation process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5578161A (en) * 1991-04-30 1996-11-26 International Business Machines Corporation Method and apparatus for in-situ and on-line monitoring of trench formation process

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