JPS61228667A - Solid-state image pick-up device - Google Patents

Solid-state image pick-up device

Info

Publication number
JPS61228667A
JPS61228667A JP60068822A JP6882285A JPS61228667A JP S61228667 A JPS61228667 A JP S61228667A JP 60068822 A JP60068822 A JP 60068822A JP 6882285 A JP6882285 A JP 6882285A JP S61228667 A JPS61228667 A JP S61228667A
Authority
JP
Japan
Prior art keywords
photoelectric conversion
signal
back gate
mos transistor
solid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60068822A
Other languages
Japanese (ja)
Inventor
Satoshi Hirose
広瀬 諭
Shuhei Iwade
岩出 秀平
Naoki Yuya
直毅 油谷
Hidenobu Ishikura
石倉 秀信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60068822A priority Critical patent/JPS61228667A/en
Publication of JPS61228667A publication Critical patent/JPS61228667A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers

Abstract

PURPOSE:To obtain a solid-state image pick-up device, in which a numerical aperture can be improved, the amount of a saturation signal is large and an accumulated signal can be amplified and read, by providing a specified MOS transistor photoelectric conversion element and a specified reading means. CONSTITUTION:Photoelectric conversion is performed by a P-N junction diode 14, which is formed by a source part 3, a drain part 4 and a back gate part 2 on a semiconductor substrate 1. A photoelectric conversion signal is accumulated in an MOS transistor photoelectric conversion element 30 by the potential change caused by incident light into the back gate part 2 in the floating state. The back gate part 2 in each photoelectric conversion element 30 is sequentially made to be in the floating state. When the threshold voltage of the MOS transistor 30 is changed by the potential change of the back gate part 2, a current flows in correspondence with the gate potential as a signal current. A reading means 40, which reads the signal current, is provided. Thus, the amount of the signal can be amplified and taken out, and the sensitivity is improved to a large extent. The solid-state image pick-up sensor having a large numerical aperture and the large dynamic range can be obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、固体撮像装置の回路方式に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit system for a solid-state imaging device.

〔従来の技術〕[Conventional technology]

従来、この種の装置として第5図に示すものがあった0
図において、51はp型半導体基板、52はMOSトラ
ンジスタロ4のソース、53.54.57は上記MO3
I−ランジスタロ4のドレイン、チャネル、ゲートであ
る。55はフィールド酸化膜、56は垂直信号線、58
は透明絶縁膜である。また59は平坦化膜、60は色フ
ィルタ、61は保護膜、62は遮光膜である。
Conventionally, there was a device of this type as shown in Figure 50.
In the figure, 51 is a p-type semiconductor substrate, 52 is the source of the MOS transistor 4, and 53, 54, and 57 are the MO3
These are the drain, channel, and gate of I-transistor 4. 55 is a field oxide film, 56 is a vertical signal line, 58
is a transparent insulating film. Further, 59 is a flattening film, 60 is a color filter, 61 is a protective film, and 62 is a light shielding film.

なお本装置ではMOSトランジスタロ4のソース52が
光電変換部、ソース52と基板51との接合面63が信
号電荷蓄積部となっており、スイッチング機能を有する
該トランジスタ64全体及び垂直信号線56の当該画素
部分が当該画素の走査回路部になっている。
In this device, the source 52 of the MOS transistor 4 is a photoelectric conversion section, and the junction surface 63 between the source 52 and the substrate 51 is a signal charge storage section, and the entire transistor 64 having a switching function and the vertical signal line 56 are The pixel portion is the scanning circuit section of the pixel.

第5図は固体撮像装置の1画素内の断面構造を示すもの
であるが、゛これを配列した装置全体の回路図を第6図
に示す、第6図において、71は水平走査回路、72は
垂直走査回路、73は垂直信号線、74は水平信号線で
あり、また上記トランジスタ64を含む破線で囲まれた
部分75は、第5図で断面を示した1画素単位に相当す
る。
FIG. 5 shows a cross-sectional structure within one pixel of a solid-state imaging device, and FIG. 6 shows a circuit diagram of the entire device in which these are arranged. In FIG. 73 is a vertical scanning circuit, 73 is a vertical signal line, and 74 is a horizontal signal line. A portion 75 surrounded by a broken line and including the transistor 64 corresponds to one pixel unit shown in cross section in FIG.

次に動作について説明する。第5図において、色フィル
タ60で分光されてMOS トランジスタロ4のソース
部52に達した光はここで吸収され、電子正札対を発生
する。ソース部52にはあらかじめ前回の信号読み出し
時に、チャネル54が導通しp型基板51との間で逆バ
イアスがかかるように垂直信号fi56.  ドレイン
53から定電圧が供給されており、これによりソース部
52と基板51との間の接合部63にキャリアが蓄積さ
れ、ソース部52の電位はフローティング状態になって
いる。このような状態でこのソース部52に光励起によ
って電子正孔対が供給されると、接合部63のドリフト
電界によって電子と正孔は分離され、この分離された電
子及び正札はあらかじめ蓄積されていたキャリアと再結
合し、ソース部52の電位は、光強度に応じて基板51
の電位に近づいてくる。そして信号読み出し時にドレイ
ン53からソース部52に流れ込んでくるキャリアの量
、即ちゲート57に所定のしきい値以上の電圧がかかっ
た時に垂直信号線56を流れる電流の大きさが、当該画
素内に入射した光の強度に対応している。
Next, the operation will be explained. In FIG. 5, the light that is separated by the color filter 60 and reaches the source part 52 of the MOS transistor 4 is absorbed there, and generates an electronic tag pair. In the source section 52, the vertical signal fi56. A constant voltage is supplied from the drain 53, so that carriers are accumulated in the junction 63 between the source section 52 and the substrate 51, and the potential of the source section 52 is in a floating state. When electron-hole pairs are supplied to the source section 52 by photoexcitation in such a state, the electrons and holes are separated by the drift electric field of the junction section 63, and the separated electrons and the correct tag were accumulated in advance. It recombines with the carriers, and the potential of the source part 52 changes depending on the light intensity of the substrate 51.
approaches the potential of The amount of carriers flowing into the source part 52 from the drain 53 during signal readout, that is, the magnitude of the current flowing through the vertical signal line 56 when a voltage higher than a predetermined threshold is applied to the gate 57, is determined within the pixel. It corresponds to the intensity of the incident light.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の固体撮像装置は以上のように構成されているので
、読み出し時以外にドレインに流れ込んでくるキャリア
をな(するために、遮光膜により光のあたる開口領域を
ソース部のみに限る必要があった。このため、有効に光
電変換される光量の割合を示す開口率が20〜30%と
大変低いという欠点があった。またキャリアの蓄積部が
ソース部の下のpn接合容量だけであるので、飽和信号
量が低いという欠点があった。
Conventional solid-state imaging devices are configured as described above, so in order to prevent carriers from flowing into the drain during periods other than readout, it is necessary to limit the aperture area exposed to light to only the source portion using a light-shielding film. As a result, the aperture ratio, which indicates the proportion of the amount of light that is effectively photoelectrically converted, was very low at 20 to 30%.Also, since the only carrier storage area is the pn junction capacitance below the source part, However, the disadvantage was that the saturation signal amount was low.

この発明は上記のような問題点を解消するためになされ
たもので、開口率を向上でき、飽和信号量が大きく、し
かも蓄積信号を増幅して読み出すことのできる固体撮像
装置を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and its purpose is to provide a solid-state imaging device that can improve the aperture ratio, have a large amount of saturated signal, and can amplify and read out accumulated signals. shall be.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る固体撮像装置は、半導体基板上に配置さ
れソース部、ドレイン部のそれぞれとバックゲート部と
で形成されるPN接合ダイオードにより光電変換を行な
いフローティング状態のバンクゲート部の入射光による
電位変化により前記光電変換信号を蓄積するMOSトラ
ンジスタ光電変換素子と、該各光電変換素子のバンクゲ
ート部を順次フローティング状態とするとともに前記バ
ンクゲート部の電位変化によりMOSトランジスタのし
きい値電圧が変化したとき所定のゲート電位に対応して
流れる電流を信号電流として読出す読出し手段とを設け
たものである。
The solid-state imaging device according to the present invention performs photoelectric conversion using a PN junction diode disposed on a semiconductor substrate and formed by each of a source section, a drain section, and a back gate section, and a potential of a bank gate section in a floating state due to incident light. As a result of the change, the MOS transistor photoelectric conversion element that accumulates the photoelectric conversion signal and the bank gate portion of each photoelectric conversion element are sequentially brought into a floating state, and the threshold voltage of the MOS transistor is changed due to the potential change of the bank gate portion. A readout means for reading out a current flowing in response to a predetermined gate potential as a signal current is provided.

(作用〕 この発明においては、MOSトランジスタ光電変換素子
のソース部、ドレイン部のそれぞれとバックゲート部と
で形成されるPN接合ダイオードにより充電変換が行な
われるから光電変換可能な領域が増大し、開口率が向上
する。また該MOSトランジスタのバックゲート部によ
り信号電荷が蓄積されるから、従来に比し信号蓄積領域
が増大し飽和信号量を大きくすることができる。しかも
バックゲート電位の変化により該MOSトランジスタの
しきい値電圧が変化し、ソース・ドレイン電流の流れや
すさが制御されるから、蓄積信号を増幅して外部に読出
すことができる。
(Function) In this invention, charge conversion is performed by the PN junction diode formed by each of the source part, the drain part, and the back gate part of the MOS transistor photoelectric conversion element, so the area where photoelectric conversion is possible is increased, and the aperture In addition, since signal charges are accumulated in the back gate portion of the MOS transistor, the signal accumulation area is increased compared to the conventional case, and the amount of saturated signal can be increased.Furthermore, the amount of saturation signal can be increased by changing the back gate potential. Since the threshold voltage of the MOS transistor changes and the ease with which the source-drain current flows is controlled, the accumulated signal can be amplified and read out to the outside.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図は本発明の一実施例による固体撮像装置を示し、その
一画素に相当する部分の断面を示す図である0図におい
て、1はn型半導体基板、2はp型半導体領域、3はn
型半導体領域であって、上記p型半導体領域2内に形成
されたMOSトランジスタ30のソース部、4はn型半
導体領域で、同じ(上記MOSトランジスタ30のドレ
イン部を形成している。また5はゲート酸化膜、6はゲ
ート電極、7はシリコン酸化膜、8,10゜ztLl:
配置、9はパフシベーシッン膜である。
An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a solid-state imaging device according to an embodiment of the present invention, and is a cross-sectional view of a portion corresponding to one pixel. In figure 0, 1 is an n-type semiconductor substrate, 2 is a p-type semiconductor region, and 3 is an n
4 is an n-type semiconductor region, which is the source part of the MOS transistor 30 formed in the p-type semiconductor region 2 (forming the drain part of the MOS transistor 30). is a gate oxide film, 6 is a gate electrode, 7 is a silicon oxide film, 8,10°ztLl:
Arrangement 9 is a puffy basin membrane.

このMOSトランジスタ30の動作を説明するための回
路図を第2図に示す、第2図において、11〜13は直
流電源、14はフォトダイオード、15はバックゲート
電位、16はゲート、17は負荷抵抗、18は出力端子
、19.20はスイッチである。また40は読出し手段
であり、上記両スイッチ19.20及びこれを開閉させ
る制御回路(図示せず)からなるものである。
A circuit diagram for explaining the operation of this MOS transistor 30 is shown in FIG. 2. In FIG. 2, 11 to 13 are DC power supplies, 14 is a photodiode, 15 is a back gate potential, 16 is a gate, and 17 is a load. 18 is an output terminal, and 19.20 is a switch. Reference numeral 40 denotes a reading means, which comprises both the switches 19 and 20 and a control circuit (not shown) for opening and closing them.

また第3図は、第1図、第2図に対応したパターンの一
例を示す0図において、第1図と同−鱒号は同一のもの
を示し、31.32.33はコンタクト穴である。
Also, in Figure 3, in Figure 0 showing an example of a pattern corresponding to Figures 1 and 2, the same numbers as in Figure 1 indicate the same numbers, and 31, 32, and 33 are contact holes. .

また本実施例装置の動作を説明するためのタイムチャー
トを第4図に示す、第4図において、同図(a)は第2
図におけるスイッチ19の開閉の行なわれるタイミング
を示し、同図(0)は同様にスイッチ20の開閉のタイ
ミングを示す、また、同図(e)は本固体撮像装置に照
射される光の強度変化を示し、同図(b)、 (d)は
光強度の大きさによって変化するバックゲート電位15
及び出力端子18の電位変化を示している。
In addition, a time chart for explaining the operation of the device of this embodiment is shown in FIG. 4. In FIG.
In the figure, the timing of opening and closing of the switch 19 is shown, (0) in the same figure shows the timing of opening and closing of the switch 20, and (e) of the figure shows changes in the intensity of light irradiated to the solid-state imaging device. Figures (b) and (d) show the back gate potential 15 which changes depending on the intensity of light.
and changes in the potential of the output terminal 18 are shown.

次に動作について説明する。Next, the operation will be explained.

第2図において、スイッチ19がオン状態になるとバッ
クゲート電位15は負の直流電位となる。
In FIG. 2, when the switch 19 is turned on, the back gate potential 15 becomes a negative DC potential.

このときフォトダイオード14には逆バイアスがかかる
ことになる。この状態で、スイッチ19をオフ状態にす
ると、バックゲート電位15はフローティング状態とな
り、入射光の存在によってp型半導体層2内に電子正孔
対が発生し、フォトダイオード14の逆バイアス電荷が
再結合によって減少する。即ちバックゲート電位15は
第4回申)に示すように上昇していく、なお電子正孔対
は実際にはp型半導体層2とn型半導体領域1,3゜4
との間に存在する各空乏層において発生するものである
At this time, a reverse bias is applied to the photodiode 14. In this state, when the switch 19 is turned off, the back gate potential 15 becomes a floating state, and electron-hole pairs are generated in the p-type semiconductor layer 2 due to the presence of incident light, and the reverse bias charge of the photodiode 14 is regenerated. Decreased by combination. That is, the back gate potential 15 rises as shown in the 4th section), and the electron-hole pairs are actually formed between the p-type semiconductor layer 2 and the n-type semiconductor region 1, 3°4.
This occurs in each depletion layer between the two.

ところで、MOSトランジスタの電流電圧特性はVDS
>Vsatの飽和領域では次式であられされる。
By the way, the current-voltage characteristics of a MOS transistor are VDS
In the saturated region of >Vsat, it is expressed by the following equation.

105−  (1/2)−β (VGS−VTR) ”
但し、IDSはドレイン電流、VCSはゲート・ソース
間の電位差、VTHはMOSトランジスタのしきい値電
圧、βは定数である。
105- (1/2)-β (VGS-VTR)”
However, IDS is the drain current, VCS is the potential difference between the gate and source, VTH is the threshold voltage of the MOS transistor, and β is a constant.

そして上述のしきい値電圧VTRは次式に示すようにバ
ックゲート電位VSBに依存している゛。
The threshold voltage VTR mentioned above depends on the back gate potential VSB as shown in the following equation.

VTII−VTHO−5it J9〒+BK  vsa
+ 21F+VTHCON  −VDS 但し、V THOは0バイアスしきい値電圧BKはバッ
クゲート効果係数 VSBはバックゲート電位 ΦFはフェルミ電位(’−0,3V) V TlIC0NはVTHのドレイン依存係数である。
VTII-VTHO-5it J9〒+BK vsa
+21F+VTHCON -VDS However, V THO is 0 bias threshold voltage BK is the back gate effect coefficient VSB is the back gate potential ΦF is the Fermi potential ('-0, 3 V) V TlIC0N is the drain dependence coefficient of VTH.

従ってバンクゲート電位が入射光量一応じて変化すると
、MOSトランジスタのドレイン電流は次式のように変
化する。飽和領域において計算すると aVSB    2)VTHaVsB 一β(VGS−VTR)  −BK  −2VSB+ 
24)F となる。
Therefore, when the bank gate potential changes depending on the amount of incident light, the drain current of the MOS transistor changes as shown in the following equation. When calculated in the saturation region, aVSB 2) VTHaVsB -β (VGS-VTR) -BK -2VSB+
24) It becomes F.

ここで数値計算を行なってみる。Let's do some numerical calculations here.

今、 μm600cm冨 /V  −5ec  +  
Cox= 4 X  1 0−’pF / t’ m”
 + W−10u m +  L−5a mとすると、
β−4,8X l O−’ (^ハ町 となり、VGS−5V、VTR−IV、BK −1゜v
sa−ov、  ΦF −0,3Vとすると、−−4,
8Xl0−’ (A/V) となる。
Now, μm600cm depth /V −5ec +
Cox = 4 X 1 0-'pF/t'm"
+ W-10um + L-5am,
β-4,8X l O-' (^Ha town, VGS-5V, VTR-IV, BK -1゜v
sa-ov, ΦF -0,3V, -4,
8Xl0-' (A/V).

即ち、バックゲート電圧がlv変化すると、該変化によ
りソース・ドレイン電流105は4.8 Xl0−’=
48μA変化することとなり、この変化量を負荷抵抗1
7を通して電圧変化分として読み出すこととなる。
That is, when the back gate voltage changes by lv, the source/drain current 105 becomes 4.8 Xl0-'=
This will result in a change of 48μA, and this amount of change can be calculated by applying the load resistance 1
7 as a voltage change.

ここで1画素のディテクタ部の面積Aを100、um”
、接合容量CJを0.01pP、入射光Pを10”(5
50nm)とすると、入射光によって発生する電荷量Δ
Qは に−h −c 680X6.6 Xl0−” X3 XIO”−6,5
4X10−′h(C) となり、これにより バックゲート電圧の変化分ΔvS8は ΔVSB−ΔQ/CJ −65,4(mV)となり、従
って ソース・ドレイン電流の変化分Δ105はA I 05
−、−−4,8 X1O−sX AVSB −−4,8
Xl0−’X 65.4 Xl0−’−−31.4X1
0−マ(A)−一3μAとなる。
Here, the area A of the detector part of one pixel is 100, um"
, the junction capacitance CJ is 0.01 pP, and the incident light P is 10” (5
50 nm), the amount of charge Δ generated by the incident light is
QHani-h -c 680X6.6 Xl0-"X3 XIO"-6,5
4X10-'h(C) Therefore, the change in back gate voltage ΔvS8 becomes ΔVSB-ΔQ/CJ -65,4 (mV), and therefore the change in source-drain current Δ105 becomes A I 05
-,--4,8 X1O-sX AVSB --4,8
Xl0-'X 65.4 Xl0-'--31.4X1
0-ma(A)--3μA.

ここで負荷抵抗値を10にΩとすると、出力端子より検
出される電圧変化は3 Xl0−6XIO’ −3Xt
O−冨(V)−30mVとなり、微小光であっても十分
検出可能な電圧変化が出力端子に現れ石こととなる。
Here, if the load resistance value is 10Ω, the voltage change detected from the output terminal is 3Xl0-6XIO'-3Xt
The voltage becomes O-Ten(V)-30 mV, and a voltage change that can be sufficiently detected even with a very small amount of light appears at the output terminal.

即ち、以上の計算で示したように、本実施例では、微小
光が入射する場合であってもゲート電圧。
That is, as shown in the above calculations, in this embodiment, even when a small amount of light is incident, the gate voltage remains constant.

ドレイン電圧、負荷抵抗の値を適宜調整することにより
出力値を十分検出可能な値とすることができる。これは
従来の増幅機能を持たない固体撮像装置では全く得られ
なかった利点である。なおnチャネルトランジスタの場
合は、ゲート電位を高(したり、ドレイン電圧を高くし
たりすることによって取り出す電流の量を大きくするこ
とができる。
By appropriately adjusting the values of the drain voltage and load resistance, the output value can be made sufficiently detectable. This is an advantage that could not be obtained with conventional solid-state imaging devices that do not have an amplification function. Note that in the case of an n-channel transistor, the amount of current taken out can be increased by increasing the gate potential or drain voltage.

また本実施例め光電変換素子は従来のものではソース領
域52のみが光電変換領域、該領域52下のPN接合6
3容量のみが信号蓄積領域であったのが、光電変換領域
がn型半導体領域1.3゜4とp型半導体領域2との間
にある各空乏層、信号蓄積領域がp型半導体領域2であ
るために、従来のものに比し開口率が大きく、しかも飽
和信号量を大きくできるものである。
In addition, in the conventional photoelectric conversion element of this embodiment, only the source region 52 is the photoelectric conversion region, and the PN junction 6 under the region 52 is
3 capacitance was the signal accumulation region, but the photoelectric conversion region is the depletion layer between the n-type semiconductor region 1.3°4 and the p-type semiconductor region 2, and the signal accumulation region is the p-type semiconductor region 2. Therefore, the aperture ratio is larger than that of the conventional one, and the amount of saturation signal can be increased.

なお、上記実施例では、n型半導体基板上に素子を形成
したものを示したが、これは、p型半導体基板上に形成
するようにしてもよく、上記実施例と同様の効果を奏す
る。但しこの場合、基板上に形成される各半導体領域の
導電形は当然反転していなければならないものである。
In the above embodiment, the element is formed on an n-type semiconductor substrate, but it may be formed on a p-type semiconductor substrate, and the same effects as in the above embodiment can be obtained. However, in this case, the conductivity type of each semiconductor region formed on the substrate must naturally be reversed.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、MOSトランジスタ
のバックゲート電位の変化分で蓄積信号量を表わすよう
にしたので、蓄積信号量に応じてソース・ドレイン電流
が大きく変化し、かつゲート電圧、ドレイン電圧によっ
て信号量を増幅して取り出すことができ、感度が格段に
向上した固体撮像装置が得られる。しかも光電変換領域
及び信号蓄積領域の面積が従来のものに比し大きいので
、開口率が大きくなり、飽和信号量が大きく取れるとい
う効果が得られ、ダイナミックレンジの太きい固体撮像
装置が得られる効果がある。
As described above, according to the present invention, since the amount of accumulated signal is expressed by the change in the back gate potential of the MOS transistor, the source-drain current changes greatly depending on the amount of accumulated signal, and the gate voltage and The amount of signal can be amplified and extracted by the drain voltage, and a solid-state imaging device with significantly improved sensitivity can be obtained. Moreover, since the areas of the photoelectric conversion region and signal accumulation region are larger than those of conventional ones, the aperture ratio is increased and a large amount of saturated signal can be obtained, resulting in a solid-state imaging device with a wide dynamic range. There is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による固体撮像装置の断面
図、第2図はこの発明の一実施例による固体撮像装置の
回路図、第3図はこの発明の一実施例による固体撮像装
置を一次元に配置したときのパターン図、第4図はこの
発明に係る固体撮像装置の動作を示すタイミングチャー
ト図、第5図は従来の固体撮像装置の断面図、第6図は
第5図の従来例の回路図である。 30・・・MOSトランジスタ光電変換素子、1・・・
n型半導体基板(第1導電型の半導体基板)、2・・・
p型半導体領域(第2導電型の半導体領域)、3.4・
・・れ型半導体領域、14・・・PN接合ダイオード、
19.20・・・スイッチ、17・・・負荷抵抗、40
・・・読出し手段。
FIG. 1 is a sectional view of a solid-state imaging device according to an embodiment of the invention, FIG. 2 is a circuit diagram of a solid-state imaging device according to an embodiment of the invention, and FIG. 3 is a solid-state imaging device according to an embodiment of the invention. FIG. 4 is a timing chart showing the operation of the solid-state imaging device according to the present invention, FIG. 5 is a cross-sectional view of a conventional solid-state imaging device, and FIG. FIG. 2 is a circuit diagram of a conventional example. 30...MOS transistor photoelectric conversion element, 1...
n-type semiconductor substrate (first conductivity type semiconductor substrate), 2...
p-type semiconductor region (second conductivity type semiconductor region), 3.4.
...Role type semiconductor region, 14...PN junction diode,
19.20...Switch, 17...Load resistance, 40
...Reading means.

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板上に配置されソース部、ドレイン部の
それぞれとバックゲート部とで形成されるPN接合ダイ
オードにより光電変換を行ないフローティング状態のバ
ックゲート部の入射光による電位変化により前記光電変
換信号を蓄積するMOSトランジスタ光電変換素子と、
該各光電変換素子のバックゲート部を順次フローティン
グ状態とするとともに前記バックゲート部の電位変化に
よりMOSトランジスタのしきい値電圧が変化したとき
所定のゲート電位に対応して流れる電流を信号電流とし
て読出す読出し手段とを備えたことを特徴とする固体撮
像装置。
(1) Photoelectric conversion is performed by a PN junction diode arranged on a semiconductor substrate and formed by a source section, a drain section, and a back gate section, and the photoelectric conversion signal is generated by a potential change due to incident light on the floating back gate section. a MOS transistor photoelectric conversion element that accumulates
The back gate portion of each photoelectric conversion element is sequentially brought into a floating state, and when the threshold voltage of the MOS transistor changes due to a change in the potential of the back gate portion, a current flowing in response to a predetermined gate potential is read as a signal current. What is claimed is: 1. A solid-state imaging device, comprising: reading means for reading out data.
(2)前記MOSトランジスタは、第1導電型の前記半
導体基板上に画素毎に対応して形成された第2導電型領
域内に形成されたものであることを特徴とする特許請求
の範囲第1項記載の固体撮像装置。
(2) The MOS transistor is formed in a second conductivity type region formed for each pixel on the semiconductor substrate of the first conductivity type. The solid-state imaging device according to item 1.
JP60068822A 1985-04-01 1985-04-01 Solid-state image pick-up device Pending JPS61228667A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60068822A JPS61228667A (en) 1985-04-01 1985-04-01 Solid-state image pick-up device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60068822A JPS61228667A (en) 1985-04-01 1985-04-01 Solid-state image pick-up device

Publications (1)

Publication Number Publication Date
JPS61228667A true JPS61228667A (en) 1986-10-11

Family

ID=13384787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60068822A Pending JPS61228667A (en) 1985-04-01 1985-04-01 Solid-state image pick-up device

Country Status (1)

Country Link
JP (1) JPS61228667A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6414959A (en) * 1987-04-10 1989-01-19 Texas Instruments Inc Device for sensing threshold of substrate charge modulation type transistor
JPS6427261A (en) * 1987-04-03 1989-01-30 Texas Instruments Inc Image sensor device of floating gate junction type field effect transistor and manufacture of the same
US5148249A (en) * 1988-04-14 1992-09-15 Kabushiki Kaisha Toshiba Semiconductor protection device
JP2007060070A (en) * 2005-08-23 2007-03-08 Casio Comput Co Ltd Image reader and its drive control method
JP2017076797A (en) * 2015-10-14 2017-04-20 キム,フン Image sensor having function of solar cell
WO2019211949A1 (en) * 2018-05-02 2019-11-07 Sony Semiconductor Solutions Corporation Solid-state image pickup element and image pickup apparatus

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427261A (en) * 1987-04-03 1989-01-30 Texas Instruments Inc Image sensor device of floating gate junction type field effect transistor and manufacture of the same
JPS6414959A (en) * 1987-04-10 1989-01-19 Texas Instruments Inc Device for sensing threshold of substrate charge modulation type transistor
US5148249A (en) * 1988-04-14 1992-09-15 Kabushiki Kaisha Toshiba Semiconductor protection device
JP2007060070A (en) * 2005-08-23 2007-03-08 Casio Comput Co Ltd Image reader and its drive control method
JP2017076797A (en) * 2015-10-14 2017-04-20 キム,フン Image sensor having function of solar cell
WO2019211949A1 (en) * 2018-05-02 2019-11-07 Sony Semiconductor Solutions Corporation Solid-state image pickup element and image pickup apparatus
US11483507B2 (en) 2018-05-02 2022-10-25 Sony Semiconductor Solution Corporation Solid-state image pickup element and image pickup apparatus
EP4224878A1 (en) * 2018-05-02 2023-08-09 Sony Semiconductor Solutions Corporation Solid-state image pickup element and image pickup apparatus

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