JPS61227413A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To match the phase of an output signal with high accuracy by applying a signal being the result of voltage division to an input signal to a connecting point between both emitter resistors of a couple of transistors (TR) being components of a differential amplifier via a capacitor. CONSTITUTION:The input signal Vin is divided by a resistor R8 and fed to a connecting point between both emitter resistors RB1 and RB2 via capacitors C1 and Cc. Actually the divided input signal is fed to a buffer TR Q6 and a coupling capacitor Co. The capacitor C1 is selected so that its capacitance value is large enough to neglect its AC impedance. The output of the differential amplifier is balanced by adjusting the voltage dividing ratio. Even when the variance in the element characteristic of the differential amplifier subjected to circuit integration exists, it is possible to balance the amplitude and phase characteristics of the output signals.

Description

[Detailed Description of the Invention] [Summary] This is a single-input differential amplifier circuit, which divides an input signal and applies the divided voltage to the connection point between both emitter resistors of differentially connected transistors via a coupling capacitor. Adjust the balance of frequency characteristics, etc. between differential outputs.

[Industrial application field]

The present invention relates to a circuit that converts a single input into differential outputs, and particularly relates to a circuit configuration that adjusts the balance of frequency characteristics between differential outputs.

[Conventional technology]

As a method of converting a single input signal into a differential signal with the same phase and opposite phase, input the signal to one input of the differential circuit,
There is a way to ground the other end in an AC way.

Figure 5 shows the circuit.
Ch has a differential configuration, VeI & t 1 , Vout
Outputs ZK differential signal. Input is transistor Q1
The base of the transistor Q is biased by dividing it with a resistor R4°RIJ, but from an AC perspective, it appears to be grounded. To obtain a balanced differential output, the load R1,1,=
RIJ t emitter resistance R11''RIH.Furthermore, not only the amplitude but also the phase characteristics are Veut 1 and VOμ
It is required that the signals be out of phase by 1800 at t2, that is, have opposite phases.

However, among the transistors Qs and C4 that constitute the constant current bias circuit, a stray capacitor C8 is inserted into the transistor Qs connected to the common emitter point of the transistors Q* and (h.
N) This is because a parasitic capacitance of about 1 pF is introduced as a stray capacitor (C8) between the collector of the transistor and the substrate (GND) due to the structure.

In the circuit of FIG. 5, the stray capacitor C8 shown in the figure is also included in (h, (h), but since it is balanced, it does not contribute to the phase shift of the output.

As is clear from equations (1) and (2), r at low frequencies. ,t
l (anti-phase output) mF + *t2 (in-phase output) have the same gain and phase difference of 1800, but at high frequency r
. ui2 has lower gain and phase delay than i'out
If it is larger than 1, the balance between the two will be poor.

As a circuit for improving this, there is a configuration shown in FIG. 4 proposed earlier by the present inventor. In the figure, the same parts as in FIG. 5 are indicated by the same reference numerals.

This circuit applies an input signal Vi to the collector of a constant current bias circuit Q1 via a coupling capacitance C0 having approximately the same value as a stray capacitor C8.

In addition, in the same circuit, the transistor Q6 is connected to the input
A') Qw is a transistor that applies a constant current bias to this, and is not essential.

The relationship between Vi and 'out 1 s 'age 2 is as follows.

It is expressed as follows.

When co=C1l, equations (3) and (4) become equal, and Vout IVaaht2 is balanced.

[Problem that the invention seeks to solve]

However, in the circuit shown in Figure 4, when the in-phase and anti-phase phase matches are to be made with high precision, two capacitors C8C0 with different structures are required.
It is necessary to match the capacitance ratio with high precision, for example, Rt=3
Ω and C8-1pF, the in-phase and anti-phase difference is 180±
To achieve 1 degree, C0 had to be designed within Cl1O±221. However, this is difficult to achieve in practice.

The present invention aims to solve this problem and achieve highly accurate phase matching even in a rough design.

[Means to solve problems]

In the present invention, in a differential amplifier in which one side of the differential amplifier is AC grounded and an input signal is applied to the other side, the input signal is applied to the connection point between both emitter resistances of a pair of transistors constituting the differential amplifier. The voltage-divided signal is applied via the capacitor.

[For production]

According to the above, when an input signal is divided into voltages and applied to the connection point between both emitter resistors of a pair of transistors constituting a differential amplifier, the output (F, at 1 , Vout2) can be adjusted over a wide range.

〔Example〕

FIG. 1 shows the circuit configuration of an embodiment of the present invention.
The same parts as in FIGS. 4 and 5 are designated by the same reference numerals. In the figure, it has been added to the times in Figure 5. Note that in reality, a divided voltage input signal is applied via the transistor Qse coupling capacitor C0 of the illustrated buffer. Here, the capacity C
Let r have a large capacitance value and be so small that the AC impedance can be ignored, and k is the voltage division ratio of the resistor R8. .

At that time, the AC equivalent circuit of FIG. 1 becomes as shown in FIG. 2. Using this, the relationship between Vin + Vout 1 is determined below.

Veui 1 =-(R) 1 /CB ) i#1 Furthermore, the following relational expression also holds true.

If Rml = R, , = R1t RLI = RL, then the formula (6) becomes.

Solving equation (8) for rea, we get 'in e', and substituting equation (9) into equation (7), 'in e
The relational expression for Vout 1 is found.

CCaCa"lCo + kR* Cm)'in Meanwhile, Vout2 can be obtained in the same manner as follows.

Here, if the voltage division ratio of resistor 8 is set to 0, then the conventional circuit (fifth
The relationship between Vine Vout and Vine Vout is the same as that shown in Figure 1.

Furthermore, when k←0 (&≦1), the difference in gain and the phase difference become smaller, as is clear from the equation αl, am). Therefore, even if the element characteristics vary, by changing k,
The balance between Vent 1 and Vout 2 can be adjusted.

Based on the above +111 an formula, the value of 08 and Vout
The value of k that minimizes the phase difference between 1 and Vout 2 is shown below.

As a condition, Coupling capacitor C6=2.0ρF Emitsuta resistance 4 to 3 Ω Frequency f = 4.2MHz Then, it becomes as follows.

ζHere, we have shown that the partial pressure ratio k should be adjusted when Cs changes while keeping Co constant, but even if we consider that C8 is constant and 00 changes, Vout 1 can be similarly adjusted by adjusting the partial pressure ratio.
+ Vout2 can be adjusted.

In reality, variations occur in the capacitance values of both CS and C0, and it was not easy to balance the outputs Vout 1 and Vout 2 in the conventional method, but in this example,
This becomes possible.

In Fig. 1, the signal division (resistance Rs) is performed outside the integrated circuit, but if the capacitance ratio Ccs and co) is determined, the signal division CTo'f L RH) can be performed inside the integrated circuit as shown in Fig. 5. You may also do this using Also, the resistance Rf
? , R□ may be adjusted by trimming after forming the integrated circuit.

〔Effect of the invention〕

As is clear from the above, according to the present invention, in a differential amplifier in which one input of the differential amplifier is AC-grounded and an input signal is applied to the other, the input signal is applied to the ground point of both emitter resistors. Add a signal that is
By adjusting the voltage division ratio, the output of the differential amplifier can be balanced. In particular, according to the present invention, even if there are variations in the element characteristics of a differential amplifier integrated as an integrated circuit, which was difficult in the past, it is possible to balance the amplitude and phase characteristics of the output signal by adjusting the voltage division ratio of the input signal. It becomes possible to take

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is an equivalent circuit diagram of an embodiment of the present invention, Fig. 3 is a circuit diagram of another embodiment of the invention, and Fig. 4 is a circuit diagram of a conventional example. FIG. 5 is a circuit diagram of another conventional example. Q, ~Q? ...Transistors RIl, Rゎ...Emitter resistance co...Coupling capacitor (capacitance) C8...Stray capacitor

Claims (1)

[Claims] A differential amplifier circuit in which one of the inputs of the differential amplifier is AC grounded and an input signal is applied to the other input, comprising a voltage dividing means for the input signal, and a voltage dividing means for the input signal, and a voltage dividing means for dividing the input signal. A differential amplifier circuit characterized in that the differential amplifier circuit is connected to a connection point between both emitter resistors of a differential transistor of a differential amplifier via a coupling capacitor.