JPS6122511B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention receives and stores a still image signal that is superimposed and sent separately from the video signal of a normal television broadcast image during the vertical retrace period of a television signal, and then freezes the signal. Regarding a device that displays images, when receiving a signal in which still image signals of multiple programs are arranged in chronological order and each program is sent continuously for one page, the reception of any of the programs. During the waiting period from when the program is specified until the still image signal of the program actually starts to be received, the still image of the non-designated program that is received each time is displayed on the screen in a special manner. An object of the present invention is to provide a device capable of notifying a viewer that it is in a standby state.

The following system has been considered as one of the systems for transmitting still images such as characters and figures using television signals.

In this system, one page of still images to be transmitted is made up of 200 horizontal television scanning lines, and each line is made up of 256-bit picture elements. Therefore, the total number of picture elements for one page is 51,
It is 200 bits.

Then, on the transmitting side, such a still image is scanned in the horizontal direction sequentially from the upper line as shown by the dashed line in FIG.
An image signal V of 256 bits per line is obtained, and as shown in FIG.
One line is superimposed and sent at the 283rd H. At the same time, the start signal indicates the reference phase of all signals
STX, a 4-bit program code signal PC indicating which program the image signal V belongs to,
A code signal such as an 8-bit line number signal LN indicating which line from the top of the still image the image signal is on is also superimposed and transmitted as a still image signal. The image signals V are superimposed one line per field as described above in order from the line above the still image, and the image signals for one page of one program, that is, 200 lines, are continuous. Continuously overlap between 200 fields. However, in one field prior to the transmission of these 200 lines, only the above-mentioned code signals are superimposed and the image signal V is not superimposed in order to facilitate control on the receiving side. Therefore, the image signal for one page is transmitted in 201 field periods, that is, 3.35 seconds.

Furthermore, in order to transmit a wide variety of still images such as news and weather forecasts, it is necessary to increase the number of programs; for example, about 10 programs are transmitted. In that case, for each program, one page worth of still image signals is continuously transmitted across 201 fields as described above, but when transmitting 10 programs, such one continuous program is transmitted continuously. Unit 1
As shown in Figure E, still image signals for 10 programs A, B, ..., R, N are arranged in chronological order and transmitted. According to this transmission method, still image signals for 10 programs are transmitted one time in 33.5 seconds.
Still image signals of the same program will be transmitted every 33.5 seconds.

However, when receiving a still image signal sent by such a transmission method and displaying the still image, the still image signal of one program is transmitted for 3.35 seconds every 33.5 seconds as described above. Therefore, the receiving side must wait up to 30.15 seconds after specifying the desired program to begin receiving the still image signal of the specified program.

As a way to shorten this waiting time as much as possible,
If the still image is text, divide the whole image into multiple parts,
For example, as shown in Figure 1A, one line of characters is 18 lines, and the space between lines is 7 lines, making up a still image of 8 lines and a total of 200 lines, and a line number code signal is used as a signal representing each line.
Not normally used in LN. Specially uses "209" to "216" as a row code signal, and transmits this by superimposing it on the field one field before the first line still image signal of each row is sent, and transmits the part corresponding to the space between rows. It is conceivable that the still image signal of 100% is not transmitted. However, in that case, the image signal is not superimposed on the field that transmits the row code signal. According to this method, the transmission time required per program can be saved by 48 field periods, compared to a method that uses 7 fields to superimpose the image signal V of the interline space (all at the "0" level). However, even if this is done, the waiting time will only be reduced by 24%, and it will still take a considerable amount of time.

If this waiting time is short, there will be no problem, but if it is long as described above, the viewer will not be able to tell whether or not the reception operation is being performed correctly for a long time until the still image is displayed. arise.

Therefore, when receiving a still image signal using such a transmission method, the present invention provides a screen in a special manner every time a still image of a program other than the specified one is received, from when a program is specified until the reception of the specified program is started. It is an object of the present invention to provide a device which can display the standby state during the waiting time in an easy-to-understand manner by displaying the above information, and which can also have a simple configuration.

For this reason, the present invention does not use a line number code signal, and when in standby mode, still images of non-designated programs are rolled on only a portion of the screen, and still images of designated programs are rolled on the entire screen. There is a characteristic that

An embodiment of the present invention will be described below with reference to FIGS. 2 and 3.

In the figure, 1 is a receiving circuit that includes a tuner/VIF circuit, a video detection circuit, etc. and receives a normal television signal and a still image signal superimposed thereon, and 2 is a waveform of the output of the receiving circuit 1 into a binary signal. A shaping circuit, 3 a synchronization separation circuit, and 4 a horizontal/vertical pulse generation circuit for generating horizontal/vertical signals. Using these horizontal and vertical pulse signals, a sampling gate pulse generation circuit 5 is used to generate a still image signal.
A sampling gate pulse is generated at the 20th H and the 283rd H (hereinafter, only the 20th H will be explained, and the 283rd H will be omitted), and the 20th H sampling circuit 6 is controlled to control the stationary signal superimposed on the 20th H. Extract the image signal.

The extracted still image signal is added to the buffer memory 7, and the buffer memory 7, which temporarily stores the image signal V, is a dynamic shift register or the like having a storage capacity of 256 bits capable of storing one line of the image signal V. It is composed of

The image signal V for one line stored in the buffer memory 7 is transferred to the main memory 9 at a predetermined timing via the input gate circuit 8, and stored at a predetermined storage location. This main memory 9 has a storage capacity that can store image signals for one page of still images, that is, 256 bits x 200 lines = 51,200.
It has a storage capacity of bits, and is composed of, for example, a static shift register.

Thereafter, the image signal stored in the main memory 7 is transferred to the main memory 9 in synchronization with the scanning of the display cathode ray tube.
A still image is displayed in a predetermined roll display mode, as shown in FIGS. 3A and 3B, by reading out the signal from the source and applying it to the cathode ray tube 12 via the output gate circuit 10 and the video amplification circuit 11. In Figure 3,
The display mode is when A is displaying a still image of a non-designated program in a partial roll display at the bottom of the screen during the standby period, and B is displaying the still image of a designated program when it receives the still image signal of the designated program. This is the display mode when one page of still images is displayed in roll display.

Next, the input/output control section of the image signal V and the clock control section of both memories 7 and 9 for realizing such a display mode will be explained.

First, in the input and clock control circuit 13, 14 is a main clock generation circuit, which synchronizes with the scanning of the cathode ray tube 12 and operates from the 41st H to the 41st H to project a still image as shown in FIG. 3B.
During the 200H period up to the 240th H, a main clock of 256 bits per hour is generated, and OR gate 1 is generated.
5 to the main memory 9. As a result, the main memory 9 is clocked by 51,200 bits per field, and the stored contents are circulated once per field. The main clock is generated by multiplying and dividing the color subcarrier, and its frequency is preferably approximately 6MHz or higher.
It is necessary to strictly synchronize with the horizontal synchronization signal. At this clock time, the image signal is read from the main memory 9 and all of it is output to the gate circuit 10.
If the output gate circuit 10
If only a portion of the image is extracted, a still image can be partially displayed as shown in FIG. 3A.

On the other hand, reference numeral 16 stores the image signal V stored in the buffer memory 7 so that it is suitable for the above-mentioned roll display when in a standby state when a signal other than the designated program is being received and when a signal from the designated program is being received. This is a transfer clock generation circuit that generates a transfer clock for transferring data from the main memory 9 to the main memory 9 for storage.This transfer clock also generates a clock of 256 bits per 1H, similar to the main clock. However, while the main clock occurs from the 41st H to the 240th H, the transfer clock is always generated. The transfer clock is applied to buffer memory 7 and main memory 9 simultaneously via AND gate 17 and OR gate 15.

The output control circuit 18 also outputs all the image signals read from the main memory 9 to the output gate circuit 10.
Generates an output gate control pulse for switching between outputting from the output gate circuit 10 to display a full screen as shown in FIG. 3B, or outputting only a portion from the output gate circuit 10 to display a partial display as shown in FIG. 3A. 20th to 262nd H when full-screen display is performed, and 262nd H when partial display is performed.
It is equipped with a flip-flop 19 that produces an output during the period from the 221st H to the 262nd H. Note that the horizontal blanking pulse generated by the horizontal blanking pulse generation circuit 20 is also applied to the output gate circuit 10 via the NAND gate 21.

The output gate circuit 10 controls the output of the image signal from the main memory 9 and at the same time controls the output of the normal television reception signal obtained by the reception circuit 1. Cathode ray tube 1 displays only television images
Analog switch circuits 22a and 2 switch in opposite modes to each other so that when a still image signal is received, the normal television reception image of the portion where the still image is displayed is erased.
2b.

Next, we will explain how each of the circuits described above is switched between the standby state where a still image signal from a program other than the designated program is being received after a program has been specified, and when a still image signal from a designated program is received. do.

To do this, first, the program code signal PC of the 20th H still image signal extracted by the 20th H sampling circuit 6 is extracted by the program code sampling circuit 23, and held until another program code signal PC is sent. . On the other hand, in the program designation circuit 24, any one of the 10 types of programs (I to N) is designated by operating a push button switch or the like.
At the time of the specified operation, the operation detection pulse must be generated no matter which program is specified, and the NOR
It is applied to flip-flop 26 through gate 25 and reset. At the same time, a code signal of the specified program is created and this is sent to the program comparison circuit 27.
In addition, the still image signal being received here is compared with the program code signal, and when the two match, that is, when the still image signal of the designated program is received, a matching signal that becomes low level is generated and sent to the flip-flop 26. to be set.

Therefore, in the standby state after program specification, the flip-flop 26 is in the reset state, so its Q terminal output is at a low level and its '' terminal output is at a high level, so that the input and clock control circuits 13
The AND gate 28b is made conductive to allow the pulse generated from the line counter 29 during the 1H period of the 262nd H to pass through, and the AND gate 17 is also made conductive via the OR gate 30 to transfer the transfer clock to the buffer memory 7 at the 262nd H. Add to main memory 9.
At the same time, the output of AND gate 28b is connected to OR gate 30.
In this 262nd H, the AND gate 31a is cut off, and the AND gate 31
b is made conductive, and the image signal V for one line from the buffer memory 7 is transferred to and stored in the storage position of the bottom line of the main memory 9. At this time, the main memory 9 is clocked by one line in addition to the main clock, so the storage position of the previous image signal in the main memory 9 is shifted upward by one line. By repeating this transfer operation, it is possible to display a still image that rolls from bottom to top.

At the same time, in this standby state, the output of the flip-flop 26 controls the AND output in the output control circuit 18.
The gate 32b is made conductive to allow the 221st H pulse generated from the line counter 29 to pass;
Flip-flop 19 via NOR gate 33
Reset. Since the flip-flop is then set again by the 262nd H pulse from the line counter 29, the output gate control pulse is generated from the 221st H to the 262nd H. This is added to the output gate circuit 10 via the NAND gate 21, and the 221st to 262nd H
The analog switch circuit 25a is opened and the analog switch circuit 22b is closed only until the end. As a result, in this standby state, the normal television reception image is erased only from the 221st H to the 262nd H, and the image signal read out from the main memory 9 is applied to the cathode ray tube 12, and only a portion below it is erased. As shown in FIG. 3A, the still image is displayed in a roll for 20 lines.

Therefore, by displaying this partial display, the viewer can be informed that the standby state is in progress, and by rolling the still image in the standby state, the still image will not be omitted. This means that it can be displayed all at once.

Next, when this standby state ends and a still image signal of the designated program is received, the program comparison circuit 27 generates a low-level coincidence signal and sets the flip-flop 26 as described above, so that the standby state can be continued. On the contrary, AND gates 28a and 32a are made conductive. In addition, the signal obtained by inverting this coincidence signal is
AND gate 34 is made conductive and line counter 2
The 262nd H 1H period width pulse from 9 is passed through, and the OR gate 35, AND gate 28a and
AND with input gate circuit 8 via OR gate 30
Add to gate 17. Therefore, this
The operation of transferring the image signal V from the buffer memory 7 to the main memory 9 at the 262nd H is performed in exactly the same way as in the standby state, and the image signal V is stored in the main memory 9 so as to be suitable for displaying a still image in a roll. .

However, if the method is to omit the transmission of the still image signal in the portion corresponding to the line spacing as described above, if the still image signal is stored as is, a still image with no line spacing will be displayed. When storing a line, a storage position corresponding to the space between lines must be inserted.

Therefore, in this device, the row code signal extraction circuit 36 first extracts the row code signal, the row change detection circuit 37 detects the change, and when the row changes to a new row, a detection signal is generated and the flip-flop for skip feed control is activated. Set 38. The row code signal is
Since the detection signal is superimposed on the 20th H, the detection signal is also generated on the 20th H, and the flip-flop 38 produces a control output from the 20th H. After that, the 27th H pulse is generated by the line counter 39.
If the flip-flop 38 is reset at the beginning of the eye, the control output will be the 20th to 26th H of that field.
By applying this control output to the AND gate 17 via the gates 35, 28a, and 30, an extra 7 lines of the roll transfer clock are taken out, and the main memory 9 can be supplied to perform blank feed for the space between lines. Of course, since the image signal V is not superimposed on the field where the row code signal is superimposed, there is no risk that the image signal will be input to the main memory 9 during idle feeding for the inter-row space.

In addition, if the flip-flop 38 is configured to have an inverted version of the match signal output from the program comparison circuit 27 applied to the J terminal, and to enable the flip-flop 38 to operate only when a designated program is being received, the line spacing will be This eliminates space and allows the display density to be increased when only a portion of the image is displayed. Of course, it is possible to always apply a high level voltage to the J terminal of the flip-flop 38 and to display images including the spaces between lines even in the standby state.

Note that the following method may be used to detect a line change. First, as the line code signal, "209" is in the same format as the line number signal LN and is not in the line number signal LN.
(“11010001”) to “216” (“11011000”), detect the first four digits of the code signal and detect that the line has changed when it becomes “1101”. good. Since the first four digits of the line number signal LN will never be "1101", there is no risk of false detection. Alternatively, it is also possible to store the previous row code signal and detect a row change when a different row code signal is sent. This detection means may be appropriately determined depending on the row code signal used.

At this time, the AND gate 32b of the output control circuit 18 is made conductive by the output of the flip-flop 26, and the AND gate 32a is cut off.
The AND gate 32a and the NOR gate 33 generate a pulse to be generated at the 20th H from the line counter 29.
via the flip-flop 19, which is then reset by the pulse generated at the 262nd H. As a result, the flip-flop 19
From then on, an output is generated from the 20th H to the 262nd H, and this is used to control the output gate 10 to output all the image signals read from the main memory 9, so that a still image is displayed on the entire screen of the cathode ray tube 12. to be projected.

In this manner, when a still image signal of a designated program is received, the entire page of still images is displayed on the cathode ray tube 12 in roll display, making it possible to display images that are easy to understand. Moreover, if the roll display is used, there is no need to detect all the line number signals LN and control the transfer position to the main memory 9, so the configuration can be simplified.

Note that in the case of a method in which the still image signal is transmitted including the space between two lines instead of omitting the transmission of the line space as described above, there is no need to use the line code signal, and the line code signal is not required. Then,
Gates 28a, 28b, 30, 34 in FIG.
35, the row code signal sampling circuit 36, the row change detection circuit 37, and the flip-flop 38 are omitted;
The 262nd H pulse may be applied directly to the input gate circuit 8 and the AND gate 17, and the configuration can be further simplified.

As described in detail above, the still image receiving device of the present invention arranges still image signals of a plurality of programs in chronological order during the vertical retrace period of the television signal, and within each program, the still image signals are arranged consecutively on a page-by-page basis. The received image signal is written to the last storage location of the memory, and the storage location is sequentially shifted and rolled until the still image signal of the designated program is received. In the standby state, only a part of the image signal of a still image is read out from the above-mentioned memory and only a part of the still image is displayed on the cathode ray tube in roll mode, and when the still image of the specified program is received, all the image signals are read out from the above-mentioned memory. This system is characterized by displaying the entire still image in a roll on a cathode ray tube.

Therefore, according to the present invention, even if the still image signal of the designated program is not received immediately after the program is specified, the still image of the non-designated program can be displayed in the standby state by partially rolling the still image of the non-designated program during the previous standby state. It is possible to notify the viewer of this in an easy-to-understand manner, and when the standby state ends, the still image of the designated program can be displayed in an easy-to-understand manner on the entire screen. In addition, since all the storage modes are for roll display, the storage control circuit portion of the memory can be simplified.

[Brief explanation of the drawing]

1A, B, C, D, and E are schematic diagrams and waveform diagrams for explaining a still image signal transmission system, and FIG. 2 is a block diagram of a still image receiving device in an embodiment of the present invention. 3A and 3B are front views showing the display mode of the device. 1... Receiving circuit, 2... Waveform shaping circuit, 3...
Synchronous separation circuit, 4...Horizontal/vertical pulse generation circuit, 5...20H sampling pulse generation circuit, 6...
20H sampling circuit, 7... Buffer memory, 8...
Input gate circuit, 9... Main memory, 10...
Output gate circuit, 11... Video amplification circuit, 12...
... Cathode ray tube, 13 ... Input and clock control circuit, 14 ... Main memory generation circuit, 16 ... Roll transfer clock generation circuit, 18 ... Output control circuit, 23 ... Program code signal extraction circuit, 24 ...
...Program designation circuit, 26...Flip-flop, 2
7...Program comparison circuit, 29...Line counter,
34...Line program code extraction circuit, 35...Line comparison circuit, 36...Line code extraction circuit, 37
...Row change detection circuit, 38...Flip-flop.

Claims (1)

[Claims] 1. During the vertical blanking period of a television signal, still image signals of a plurality of programs are arranged in chronological order and are superimposed so that they are sent continuously on a page-by-page basis within each program. a receiving means for receiving a desired still image program; a storage display means for sequentially writing the received image signals in the last storage position of the memory and rolling and displaying the received image signals by sequentially shifting the storage positions; a standby detection means for detecting a standby state until a still image signal of the designated program is received; Only a portion of the still image is read out and rolled displayed on the cathode ray tube along with a normal television image, and when a still image of a designated program is received, all of the still image is read out from the memory under the control of the detection output. 1. A still image receiving device comprising: display control means for reading an image signal of the still image and displaying the entire still image in a roll on a cathode ray tube. 2. The still image receiving device according to claim 1, wherein at least a portion of a normal television reception image in which a still image is displayed is erased. 3. When receiving a signal in which one page of still images is composed of multiple lines, a line code signal for identifying the lines is attached to the still image signal, and no image signal is sent in the space between the lines. , the above-mentioned line code signal is identified, and the image signal is written into the memory while additionally clocking the memory by the amount of the line spacing at a time corresponding to the line spacing. The still image receiving device described in . 4. The still image receiving device according to claim 3, characterized in that, in a standby state, idle clocking for the space between lines is not performed.