JPS61220076A - Hybrid type picture processing device - Google Patents

Abstract

PURPOSE:To reduce the size of a processor and to speed up its processing by performing background removal and pattern matching at the stage of a video signal and then carrying out AD conversion. CONSTITUTION:An object image is picked up by an ITV camera 1 and inputted as a video signal, and a signal after the background removal of a computing element 3 is digitized by an AD converter 4 and converted into a binary signal through a selecting circuit 6, a comparing circuit 7, and a latch circuit 8. This binary signal is stored in a binary memory 9 temporarily and an area dividing circuit 11 recognizes the object at the same time. The background image, on the other hand, is picked up by the same ITV camera 1 and stored in a multilevel memory 5. The contents of the memory 5 are switched through a selecting circuit 15 with the binary memory 9 and converted by a DA converter 16 into a video signal, which is displayed on a monitor display device 17.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an image processing device, and in particular to a hybrid type that is compact and suitable for high-speed image processing by taking advantage of the features of analog calculation and digital calculation. The present invention relates to an image processing device.

[Background of the invention]

A conventional image processing device of this type is disclosed in Japanese Patent Application Laid-Open No. 56-9620.
As shown in No. 4, video signals are converted into analog/digital (A/D) regardless of whether they are binary signals or multi-value signals.
Most of the images were digitized through conversion, and then processed using digital calculations. More specifically, image processing such as background removal and pattern matching is generally performed using a background or template pattern stored in a digital memory within an image processing device and a video signal input from an industrial television camera (ITV). It is usual to digitize the data using an analog/digital (AD) converter, and then perform digital calculation, subtraction, or comparison processing using a digital arithmetic unit. However, when using an image processing device online, it is necessary to shorten the signal processing time, so a general-purpose arithmetic unit such as a microcontroller cannot keep up with the processing time.

Therefore, recently, devices using processors dedicated to image processing have been used, but these devices are large and expensive. However, in order to ensure high-speed processing, the digital circuitry has become complex, and LSIs dedicated to image processing may be required, making the device more compact.

[Purpose of the invention]

An object of the present invention is to easily perform image processing such as background removal, pattern matching, and floating binarization at high speed.
An object of the present invention is to provide a hybrid image processing device that is miniaturized.

[Summary of the invention]

The present invention does not perform image processing after digitizing everything, but performs background removal and pattern matching at the video signal stage, and then performs human conversion. It is also possible to digitally extract features with high accuracy by converting and binarizing them.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described based on the drawings. I
A target image is photographed by a TV camera 1 and used as a video signal. The video signal is serially input to the image processing device as a video signal.

Since the DC level of the video signal is generally not constant, the DC reproducing circuit 2 has a white level of 9. Fix the black level voltage to a constant value. The computing unit 3 computes nine strokes stored in advance in the image processing device and the currently input image.

The arithmetic unit 3 operates as a simple subtracter during processing such as background removal and pattern matching. That is, ITv
When the background image gIt- is subtracted from the image inputted by the camera 21, the signal from which the background has been removed by the arithmetic unit 3 is digitized by the AD converter 4, passed through the selection circuit 6, the comparison circuit 7, and the latch circuit 8. It is converted into a binary code. This binary code is temporarily stored in the binary memory 9, and at the same time, it is sent to the area division (segmentation) circuit 11 via the latch circuit 10t to recognize the object (number, area, position @
Do the following. On the other hand, the background image is photographed in advance using the same ITV camera 1 and stored in the multilevel memory 5. The contents of the multilevel memory 5 are transferred to the 2i memory 9 through the selection circuit 15.
It is converted into a video signal by a digital/analog (DA) converter 16, and displayed on a monitor display 17.
is displayed. The video signal from this DA converter 16 is also input to the arithmetic circuit 3. The addresses of the multi-level memory 5 and the binary memory 9 are generated by the address generation circuit 13 in synchronization with the address of one screen or the signal of the ITV camera 1. An address C is given to the address of the binary memory 9 by the latch circuit 14 at the same timing. The arithmetic unit 12 is a positional deviation correction circuit;
In response to the positional deviation signal, the address of the address generation circuit 13 is changed to perform positioning.

FIG. 2 is a diagram shown to explain an example of background removal. If there is an object such as a steel plate 21, consider extracting only the steel plate 21 from the pipe.

FIG. 3 is a diagram showing a video signal when scanning along the arrows in FIG. 2. Figure 3(a) shows the ITV when there is a steel plate 21.
The video signal is captured by the camera 1 and output from the DC reproducing circuit 2. Figure (b) shows the video signal captured by the TV camera 21 when the steel plate 21 is not present. The nine tDA converters 16 are stored in the multilevel memory 5 via ADCl.
This is the background of the signal being converted to an analog signal. Figure (C) is a signal obtained by subtracting the background signal of the video signal in Figure (a) using the calculator 3, and only the portion of the steel plate 21 can be extracted. This extracted ratio signal is directly input to the binarization circuit 8 without passing through the multivalued memo IJ5, where segmentation is performed and object recognition is performed.

FIG. 4 is a diagram illustrating an example of character recognition and pattern matching. In Figure 4, A
An object labeled BCDE is imaged by ITV camera 1,
A video signal scanned at the position of the arrow and output from the DC reproduction circuit 2 is shown in FIG. 5(a). Let's take an example of black text on a white background.

(in Fig. 5) is stored in advance in the multilevel memory 5 in the image processing device.
The template pattern stored in advance is taken out via the tDA converter 16i. The signal shown in FIG. 9 (a) is subtracted by the arithmetic unit 3, and the resulting signal becomes the signal shown in FIG. 9 (c). If the result of subtraction is below a certain level, it can be considered that they match. However, this determination is generally not simple. Therefore, in this embodiment, the signal (
By inputting the area Its to the magnification circuit 11 and calculating it in this circuit 11, it is possible to detect a coincidence IIL in a short time. By the way, it goes without saying that when /(turn matching is performed, positional deviation correction is required.

FIG. 6 is a diagram for explaining a method of correcting positional deviation. When making corrections, a reference is required;
Generally, alignment marks 20 are used. In this case, the position of the alignment mark 20 is determined by the segmentation circuit 11 from the position and area.

FIG. 7 is a flowchart shown to explain the alignment processing procedure by the segmentation circuit 11. When performing pattern matching, it is necessary to take out the template pattern t in synchronization with the video signal from the ITV camera l, so a control signal is given from the positional deviation correction circuit 12 to the address generation circuit 13 to generate the address. Shifting and synchronizing. That is, first, the original image is captured by ITV camera 1. DC regeneration circuit 2. The data is stored in the binary memory 9 via the arithmetic unit 3, AD converter 4, and output circuit 8 (step 1).
00). The original image stored in the binary memory 9 is transferred to the latch circuit 1.
0t - Apply alignment mark 2 to segment circuit 11 through
01'' is detected (step 101).

When the alignment mark 20 is detected, the position of the mark 20 is calculated by the arithmetic unit 12 (step 102), and the result is supported by the address generation circuit 13 for address shifting (step 104). The address generating circuit 13 controlled by the result of the address shift shifts the address of the multilevel memory 5, and uses this to shift the address of the memory 5 on the template pattern.
The signal is read out from the input signal and applied to the DA converter 16 via the switch 15t to start matching (step 10G) (FIG. 5(C)). Here, the area of the mismatched portion of the output signal from the arithmetic unit 3 is calculated by the segment circuit 11 (step 105), and a final match determination is made (step 106).
). In this way, by performing the area calculation of the mismatched part and the segmentation circuit 11 in parallel with image capture, it becomes possible to simultaneously process each character on the corresponding screen in a short time. .

FIG. 8 is shown to explain an example of extracting a fine image of a flaw or the like. The screen shown in Figure 8 is
The video waveform when the camera 1 scans in the direction of the arrow is shown in FIG. 9(a). In FIG. 9 Φ), the input from the ITV camera 1 is stored in the multi-value memory 5, and after a certain time delay, it is taken out by the selection circuit 15 and converted by the DA converter 16, resulting in nine signals. These two are subtracted by the calculator 3, and the result is shown in FIG. 9(C).
Obtain the differential waveform of By digitizing this signal, it is possible to obtain images with good contrast.

Furthermore, in order to obtain a slight bleed waveform, there are cases in which the digital method is impossible due to the resolution. In this case, the video signal t
-1 Before AD converter 4 performs ADf conversion,
By performing a differential operation and then performing AD conversion using the ADD converter 4, it is possible to emphasize minute defects.

Due to this defect signal t segmentation circuit 11, the defect t
- Identify the size and location of the flaw by calculating its area and location, and distinguish between harmful and non-hazardous flaws.

It becomes possible to distinguish it from a flaw. In the current digital ll1ii image processing, devices with various digital calculation functions have been developed, but they are highly general-purpose, and in many cases, analog systems are superior for specific applications. The present invention makes effective use of this analog method and digital segmentation function to perform image processing at high speed and with high precision.

Here, the features of the all-digital image processing apparatus and the hybrid image processing apparatus according to the present invention will be compared.

The major difference between the two is the accuracy of AD conversion.

The ADD converter 4 converts the video signal into a digital signal.
Generally, 4- to 8-bit configurations are often used.

If the number of bits is 8 or more, the conversion index of AD conversion will be improved, but the number of bits to be calculated in the subsequent digital image processing section will increase, resulting in an increase in the size of the device. However, when performing AD conversion on delicately shaded images, 8 bits may be insufficient. In this case, after outputting an appropriate level signal to the t-1DA converter 16 and subtracting it from the video signal, increase the gain necessary for AD conversion and perform AD conversion. 9. Improve AD conversion accuracy. can be done. FIG. 1O is a diagram shown to explain such an AD conversion method. Video signal input on the horizontal axis,
On the vertical axis, the video signal is AD converted and digitized into 0 to 2560 gradations, resulting in nine signals t. Figure 1O(a)
If the entire range of the video signal is AD converted, as shown in Figure 10(b), the accuracy will deteriorate, or as shown in Figure 10(b), only a certain signal level m will be converted into a digital signal with gradations from 0 to 256. It will be understood that the accuracy will be improved by matching. A case where such an AD converter tube is applied will be explained. First, as shown in FIG. 5(C), the signal level of the target object becomes small after background removal. For this reason, if this tl were to be calculated using a digital subtracter as in the prior art, for example, the setting of the next threshold after binarization would be very delicate, and stable operation would not be obtained. Become. Therefore, in the present invention, when performing background removal, etc., the background removal process is performed in an analog manner, and then AD conversion is performed. For this,
As shown in FIG. 10(b), emphasizing only a specific signal level leads to improved accuracy.

FIGS. 11 and 12 illustrate the above explanation as a difference in hardware configuration. FIG. 11 shows the method of the present invention, in which the bias signal t1 is converted into a digital analog signal by the DA converter 16, and after calculation by the arithmetic unit 3, is converted into a digital signal by the ADD converter 4.

FIG. 12 shows a conventional method in which a video signal is
The converter 4 converts the data, digitizes the data, and then processes the data in a digital arithmetic unit 22 such as a subtracter. In other words, the AD conversion method shown in Figure 11 can magnify and digitize only a certain brightness, and at the same time uses an operational amplifier in the calculation section, so it is easy to obtain the necessary amplification degree. On the other hand, in the digital system shown in FIG. 12, amplification after digitalization requires a complicated circuit and cannot be easily implemented. Various methods can be considered for setting the bias level for this video signal.

That is, (1) Set a certain fixed level. ...This is effective if the image is fixed in advance.

C) I of a certain part of the image! Refer to the light and determine the bias level based on that value. ...This is effective when the brightness of the image changes.

(8) Stored in advance and changed to next image.

...This method is used for background removal or pattern matching.

As described above, signal processing at analog level voices before digitization is a very effective method for image processing. In particular, an image processing apparatus requires a monitor CRT, and therefore an ODA converter is already installed. Therefore, the time it takes to input an image is usually very short, 15 m5, so even if you momentarily switch the output for the monitor CRT to the output for image calculation, only a momentary flicker will occur on the monitor, and there will be no major problem. It won't happen.

According to this embodiment, by converting some of the processes such as background removal and pattern matching into analog processing, high-speed image processing is possible with a simple hardware configuration.
FACTORY AUTOMATION) line, etc.
It can be used as a visual sensor.

〔Effect of the invention〕

As described above, according to the present invention, image processing can be performed easily at high speed, and the apparatus can be miniaturized.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the overall configuration of an embodiment of the present invention;
FIG. 2 is a diagram shown to explain the operation of the same embodiment, and FIG.
The figure is a time chart showing the signal state when photographing the subject 1r of Figure 2 with the ITV camera, Figure 4 is a diagram shown to explain other effects of the same embodiment, and Figure 5 is the subject ' of Figure 4. t A time chart showing the signal state when photographed with an ITV camera, Fig. 6 is a diagram shown in the ninth to explain positional deviation correction, Fig. 7 is a flowchart shown to explain positional deviation correction, and Fig. 8 is a The ninth figure is a diagram illustrating still another operation of the same embodiment.
A time chart showing the signal state in nine cases taken by a camera, and a waveform diagram shown in FIG. 10 explaining the AD conversion method.
11 and 12 are block diagrams illustrating the explanation of FIG. 1O as a hardware configuration. l...Industrial television (ITV) camera, 2... DC reproducing circuit, 3... Arithmetic circuit, 4... Analog-digital (AD) converter, 5... Multi-value image memory, 6...・・・
selection circuit, 7... latch circuit, 8... binarization circuit,
9... Binary image memory, 10... Latch circuit, 11
... segmentation circuit, 12 ... positional deviation correction circuit, 13 ... address generation circuit, 14 ... latch circuit, 15 ... selection circuit, 16 ... digital-to-analog (DA) converter, 17...Monitor display, 21
...Steel plate.

Claims (1)

[Claims] 1. Industrial television (I) that captures images of objects and obtains video signals.
TV) camera, an analog-to-digital (AD) converter that digitizes the video signal from the ITV camera, an image memory that can store the digital video signal from the AD converter, and a digital video signal stored in the image memory. and a digital-to-analog DA converter for converting the IT into an analog video signal.
An arithmetic unit is provided that takes in the video signal from the V camera, an analog video signal from the DA converter, and calculates these signals, and the output from the arithmetic unit is supplied to the AD converter. A hybrid image processing device characterized by: